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drm/i915: Finalize Wa_1408961008:icl 

The icl wm1+ underrun w/a has been added to the spec. It changed
slightly from the previous incarnation by requiring that we mirror
the lines watermark and the ignore lines bit from WM0 into WM1.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190228173639.18422-1-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Clint Taylor <Clinton.A.Taylor@intel.com>
This commit is contained in:
Ville Syrjälä 2019-02-28 19:36:39 +02:00
parent 3ef7114982
commit c384afe352
1 changed files with 6 additions and 2 deletions
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8
drivers/gpu/drm/i915/intel_pm.c
View File

@ -4467,11 +4467,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
wm = &cstate->wm.skl.optimal.planes[plane_id];
memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
/* W/A for underruns with WM1+ disabled */
/*
* Wa_1408961008:icl
* Underruns with WM1+ disabled
*/
if (IS_ICELAKE(dev_priv) &&
level == 1 && wm->wm[0].plane_en) {
wm->wm[level].plane_res_b = wm->wm[0].plane_res_b;
wm->wm[level].ignore_lines = true;
wm->wm[level].plane_res_l = wm->wm[0].plane_res_l;
wm->wm[level].ignore_lines = wm->wm[0].ignore_lines;
}
}
}