arm64: dts: meson-sm1: add cpu thermal nodes
Add thermal nodes for the Amlogic SM1 SoCs based on the G12A and G12B thermal nodes. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200512093916.19676-3-narmstrong@baylibre.com
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@ -56,6 +56,7 @@
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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@ -64,6 +65,7 @@
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu2: cpu@2 {
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@ -72,6 +74,7 @@
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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cpu3: cpu@3 {
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@ -80,6 +83,7 @@
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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#cooling-cells = <2>;
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};
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l2: l2-cache0 {
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@ -466,6 +470,26 @@
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compatible = "amlogic,sm1-clkc";
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};
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&cpu_thermal {
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cooling-maps {
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map0 {
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trip = <&cpu_passive>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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map1 {
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trip = <&cpu_hot>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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ðmac {
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power-domains = <&pwrc PWRC_SM1_ETH_ID>;
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};
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