RDMA/mlx5: Lift implicit_mr_alloc() into the two routines that call it
This makes the routines easier to understand, particularly with respect the locking requirements of the entire sequence. The implicit_mr_alloc() had a lot of ifs specializing it to each of the callers, and only a very small amount of code was actually shared. Following patches will cause the flow in the two functions to diverge further. Link: https://lore.kernel.org/r/20191009160934.3143-7-jgg@ziepe.ca Reviewed-by: Artemy Kovalyov <artemyko@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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c2edcd6935
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@ -416,74 +416,13 @@ static void mlx5_ib_page_fault_resume(struct mlx5_ib_dev *dev,
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wq_num, err);
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}
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static struct mlx5_ib_mr *implicit_mr_alloc(struct ib_pd *pd,
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struct ib_umem_odp *umem_odp,
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bool ksm, int access_flags)
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{
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struct mlx5_ib_dev *dev = to_mdev(pd->device);
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struct mlx5_ib_mr *mr;
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int err;
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mr = mlx5_mr_cache_alloc(dev, ksm ? MLX5_IMR_KSM_CACHE_ENTRY :
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MLX5_IMR_MTT_CACHE_ENTRY);
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if (IS_ERR(mr))
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return mr;
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err = xa_reserve(&dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key),
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GFP_KERNEL);
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if (err)
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goto out_mr;
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mr->ibmr.pd = pd;
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mr->dev = dev;
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mr->access_flags = access_flags;
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mr->mmkey.iova = 0;
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mr->umem = &umem_odp->umem;
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if (ksm) {
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err = mlx5_ib_update_xlt(mr, 0,
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mlx5_imr_ksm_entries,
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MLX5_KSM_PAGE_SHIFT,
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MLX5_IB_UPD_XLT_INDIRECT |
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MLX5_IB_UPD_XLT_ZAP |
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MLX5_IB_UPD_XLT_ENABLE);
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} else {
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err = mlx5_ib_update_xlt(mr, 0,
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MLX5_IMR_MTT_ENTRIES,
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PAGE_SHIFT,
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MLX5_IB_UPD_XLT_ZAP |
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MLX5_IB_UPD_XLT_ENABLE |
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MLX5_IB_UPD_XLT_ATOMIC);
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}
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if (err)
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goto out_release;
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mr->ibmr.lkey = mr->mmkey.key;
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mr->ibmr.rkey = mr->mmkey.key;
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mlx5_ib_dbg(dev, "key %x dev %p mr %p\n",
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mr->mmkey.key, dev->mdev, mr);
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return mr;
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out_release:
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xa_release(&dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key));
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out_mr:
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mlx5_ib_err(dev, "Failed to register MKEY %d\n", err);
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mlx5_mr_cache_free(dev, mr);
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return ERR_PTR(err);
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}
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static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
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unsigned long idx)
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{
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struct ib_umem_odp *odp;
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struct mlx5_ib_mr *mtt;
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struct mlx5_ib_mr *mr;
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struct mlx5_ib_mr *ret;
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int err;
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odp = ib_umem_odp_alloc_child(to_ib_umem_odp(imr->umem),
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idx * MLX5_IMR_MTT_SIZE,
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@ -491,21 +430,52 @@ static struct mlx5_ib_mr *implicit_get_child_mr(struct mlx5_ib_mr *imr,
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if (IS_ERR(odp))
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return ERR_CAST(odp);
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mtt = implicit_mr_alloc(imr->ibmr.pd, odp, 0, imr->access_flags);
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if (IS_ERR(mtt)) {
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ib_umem_odp_release(odp);
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return mtt;
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ret = mr = mlx5_mr_cache_alloc(imr->dev, MLX5_IMR_MTT_CACHE_ENTRY);
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if (IS_ERR(mr))
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goto out_umem;
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err = xa_reserve(&imr->dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key),
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GFP_KERNEL);
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if (err) {
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ret = ERR_PTR(err);
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goto out_mr;
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}
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odp->private = mtt;
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mtt->umem = &odp->umem;
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mtt->mmkey.iova = idx * MLX5_IMR_MTT_SIZE;
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mtt->parent = imr;
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mr->ibmr.pd = imr->ibmr.pd;
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mr->access_flags = imr->access_flags;
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mr->umem = &odp->umem;
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mr->ibmr.lkey = mr->mmkey.key;
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mr->ibmr.rkey = mr->mmkey.key;
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mr->mmkey.iova = 0;
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mr->parent = imr;
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odp->private = mr;
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INIT_WORK(&odp->work, mr_leaf_free_action);
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xa_store(&mtt->dev->odp_mkeys, mlx5_base_mkey(mtt->mmkey.key),
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&mtt->mmkey, GFP_ATOMIC);
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return mtt;
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err = mlx5_ib_update_xlt(mr, 0,
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MLX5_IMR_MTT_ENTRIES,
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PAGE_SHIFT,
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MLX5_IB_UPD_XLT_ZAP |
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MLX5_IB_UPD_XLT_ENABLE |
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MLX5_IB_UPD_XLT_ATOMIC);
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if (err) {
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ret = ERR_PTR(err);
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goto out_release;
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}
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mr->mmkey.iova = idx * MLX5_IMR_MTT_SIZE;
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xa_store(&imr->dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key),
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&mr->mmkey, GFP_ATOMIC);
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mlx5_ib_dbg(imr->dev, "key %x mr %p\n", mr->mmkey.key, mr);
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return mr;
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out_release:
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xa_release(&imr->dev->odp_mkeys, mlx5_base_mkey(mr->mmkey.key));
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out_mr:
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mlx5_mr_cache_free(imr->dev, mr);
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out_umem:
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ib_umem_odp_release(odp);
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return ret;
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}
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static struct ib_umem_odp *implicit_mr_get_data(struct mlx5_ib_mr *imr,
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@ -573,27 +543,54 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd,
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struct ib_udata *udata,
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int access_flags)
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{
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struct mlx5_ib_mr *imr;
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struct mlx5_ib_dev *dev = to_mdev(pd->ibpd.device);
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struct ib_umem_odp *umem_odp;
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struct mlx5_ib_mr *imr;
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int err;
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umem_odp = ib_umem_odp_alloc_implicit(udata, access_flags);
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if (IS_ERR(umem_odp))
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return ERR_CAST(umem_odp);
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imr = implicit_mr_alloc(&pd->ibpd, umem_odp, 1, access_flags);
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imr = mlx5_mr_cache_alloc(dev, MLX5_IMR_KSM_CACHE_ENTRY);
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if (IS_ERR(imr)) {
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ib_umem_odp_release(umem_odp);
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return ERR_CAST(imr);
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err = PTR_ERR(imr);
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goto out_umem;
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}
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imr->ibmr.pd = &pd->ibpd;
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imr->access_flags = access_flags;
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imr->mmkey.iova = 0;
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imr->umem = &umem_odp->umem;
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imr->ibmr.lkey = imr->mmkey.key;
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imr->ibmr.rkey = imr->mmkey.key;
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imr->umem = &umem_odp->umem;
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init_waitqueue_head(&imr->q_leaf_free);
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atomic_set(&imr->num_leaf_free, 0);
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atomic_set(&imr->num_pending_prefetch, 0);
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xa_store(&imr->dev->odp_mkeys, mlx5_base_mkey(imr->mmkey.key),
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&imr->mmkey, GFP_ATOMIC);
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err = mlx5_ib_update_xlt(imr, 0,
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mlx5_imr_ksm_entries,
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MLX5_KSM_PAGE_SHIFT,
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MLX5_IB_UPD_XLT_INDIRECT |
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MLX5_IB_UPD_XLT_ZAP |
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MLX5_IB_UPD_XLT_ENABLE);
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if (err)
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goto out_mr;
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err = xa_err(xa_store(&dev->odp_mkeys, mlx5_base_mkey(imr->mmkey.key),
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&imr->mmkey, GFP_KERNEL));
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if (err)
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goto out_mr;
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mlx5_ib_dbg(dev, "key %x mr %p\n", imr->mmkey.key, imr);
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return imr;
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out_mr:
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mlx5_ib_err(dev, "Failed to register MKEY %d\n", err);
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mlx5_mr_cache_free(dev, imr);
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out_umem:
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ib_umem_odp_release(umem_odp);
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return ERR_PTR(err);
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}
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void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr)
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