drm/i915/glk: Introduce Geminilake platform definition
Geminilake is an Intel® Processor containing Intel® HD Graphics following Broxton. Let's start by adding the platform definition. PCI IDs and plaform specific code will follow. v2: Rebase (don't allow dev to be used with the new macro). v3: Update ddb size. (Matt) Rebase on s/preliminary_hw/alpha/ Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1479133526-32389-1-git-send-email-ander.conselvan.de.oliveira@intel.com
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@ -703,6 +703,7 @@ struct intel_csr {
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func(is_broadwell); \
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func(is_skylake); \
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func(is_broxton); \
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func(is_geminilake); \
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func(is_kabylake); \
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func(is_alpha_support); \
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/* Keep has_* in alphabetical order */ \
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@ -2522,6 +2523,7 @@ intel_info(const struct drm_i915_private *dev_priv)
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#define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell)
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#define IS_SKYLAKE(dev_priv) ((dev_priv)->info.is_skylake)
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#define IS_BROXTON(dev_priv) ((dev_priv)->info.is_broxton)
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#define IS_GEMINILAKE(dev_priv) ((dev_priv)->info.is_geminilake)
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#define IS_KABYLAKE(dev_priv) ((dev_priv)->info.is_kabylake)
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#define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
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#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
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@ -373,6 +373,13 @@ static const struct intel_device_info intel_broxton_info = {
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.ddb_size = 512,
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};
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static const struct intel_device_info intel_geminilake_info = {
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.is_alpha_support = 1,
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.is_geminilake = 1,
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GEN9_LP_FEATURES,
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.ddb_size = 1024,
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};
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static const struct intel_device_info intel_kabylake_info = {
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BDW_FEATURES,
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.is_kabylake = 1,
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