viafb: Add 1200x900 DCON/LCD panel modes for OLPC XO-1.5
[jc: extensive merge conflict fixes] Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de> Cc: ScottFang@viatech.com.cn Cc: JosephChan@via.com.tw Signed-off-by: Chris Ball <cjb@laptop.org>
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1317824376
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c205d93253
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@ -62,6 +62,7 @@ static struct pll_map pll_value[] = {
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CX700_52_977M, VX855_52_977M},
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{CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M,
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CX700_56_250M, VX855_56_250M},
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{CLK_57_275M, 0, 0, 0, VX855_57_275M},
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{CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M,
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CX700_60_466M, VX855_60_466M},
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{CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M,
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@ -75,7 +75,7 @@
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/*SAMM operation flag*/
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#define OP_SAMM 0x80
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#define LCD_PANEL_ID_MAXIMUM 22
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#define LCD_PANEL_ID_MAXIMUM 23
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#define STATE_ON 0x1
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#define STATE_OFF 0x0
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@ -398,6 +398,15 @@ static void fp_id_to_vindex(int panel_id)
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viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
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viaparinfo->lvds_setting_info->LCDDithering = 1;
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break;
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case 0x17:
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/* OLPC XO-1.5 panel */
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viaparinfo->lvds_setting_info->lcd_panel_hres = 1200;
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viaparinfo->lvds_setting_info->lcd_panel_vres = 900;
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viaparinfo->lvds_setting_info->lcd_panel_id =
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LCD_PANEL_IDD_1200X900;
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viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
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viaparinfo->lvds_setting_info->LCDDithering = 0;
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break;
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default:
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viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
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viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
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@ -60,6 +60,8 @@
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#define LCD_PANEL_IDB_1360X768 0x0B
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/* Resolution: 480x640, Channel: single, Dithering: Enable */
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#define LCD_PANEL_IDC_480X640 0x0C
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/* Resolution: 1200x900, Channel: single, Dithering: Disable */
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#define LCD_PANEL_IDD_1200X900 0x0D
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extern int viafb_LCD2_ON;
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@ -570,6 +570,10 @@
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#define M1200X720_R60_HSP NEGATIVE
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#define M1200X720_R60_VSP POSITIVE
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/* 1200x900@60 Sync Polarity (DCON) */
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#define M1200X900_R60_HSP NEGATIVE
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#define M1200X900_R60_VSP NEGATIVE
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/* 1280x600@60 Sync Polarity (GTF Mode) */
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#define M1280x600_R60_HSP NEGATIVE
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#define M1280x600_R60_VSP POSITIVE
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@ -651,6 +655,7 @@
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#define CLK_52_406M 52406000
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#define CLK_52_977M 52977000
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#define CLK_56_250M 56250000
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#define CLK_57_275M 57275000
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#define CLK_60_466M 60466000
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#define CLK_61_500M 61500000
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#define CLK_65_000M 65000000
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@ -939,6 +944,7 @@
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#define VX855_52_406M 0x00580C03
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#define VX855_52_977M 0x00940C05
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#define VX855_56_250M 0x009D0C05
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#define VX855_57_275M 0x009D8C85 /* Used by XO panel */
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#define VX855_60_466M 0x00A90C05
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#define VX855_61_500M 0x00AC0C05
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#define VX855_65_000M 0x006D0C03
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@ -1065,6 +1071,7 @@
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#define RES_1600X1200_60HZ_PIXCLOCK 6172
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#define RES_1600X1200_75HZ_PIXCLOCK 4938
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#define RES_1280X720_60HZ_PIXCLOCK 13426
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#define RES_1200X900_60HZ_PIXCLOCK 17459
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#define RES_1920X1080_60HZ_PIXCLOCK 5787
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#define RES_1400X1050_60HZ_PIXCLOCK 8214
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#define RES_1400X1050_75HZ_PIXCLOCK 6410
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@ -66,6 +66,7 @@ struct res_map_refresh res_map_refresh_tbl[] = {
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{1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60},
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{1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60},
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{1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60},
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{1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60},
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{1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60},
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{1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50},
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{1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50},
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@ -759,6 +760,16 @@ struct crt_mode_table CRTM1200x720[] = {
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{1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} }
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};
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/* 1200x900 (DCON) */
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struct crt_mode_table DCON1200x900[] = {
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/* r_rate, vclk, hsp, vsp */
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{REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP,
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/* The correct htotal is 1240, but this doesn't raster on VX855. */
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/* Via suggested changing to a multiple of 16, hence 1264. */
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/* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
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{1264, 1200, 1200, 64, 1211, 32, 912, 900, 900, 12, 901, 10} }
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};
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/* 1280x600 (GTF) */
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struct crt_mode_table CRTM1280x600[] = {
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/* r_rate, vclk, hsp, vsp */
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@ -937,6 +948,9 @@ struct VideoModeTable viafb_modes[] = {
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/* Display : 1200x720 (GTF) */
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{CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
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/* Display : 1200x900 (DCON) */
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{DCON1200x900, ARRAY_SIZE(DCON1200x900)},
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/* Display : 1280x600 (GTF) */
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{CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
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