stmmac: merge get_rx_owner into rx_status routine.
The RDES0 register can be read several times while doing RX of a packet. This patch slightly improves RX path performance by reading rdes0 once for two operation: check rx owner, get rx status bits. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -238,10 +238,11 @@ struct stmmac_extra_stats {
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/* Rx IPC status */
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enum rx_frame_status {
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good_frame = 0,
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discard_frame = 1,
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csum_none = 2,
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llc_snap = 4,
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good_frame = 0x0,
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discard_frame = 0x1,
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csum_none = 0x2,
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llc_snap = 0x4,
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dma_own = 0x8,
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};
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enum dma_irq_status {
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@ -356,7 +357,6 @@ struct stmmac_desc_ops {
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/* Get the buffer size from the descriptor */
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int (*get_tx_len) (struct dma_desc *p);
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/* Handle extra events on specific interrupts hw dependent */
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int (*get_rx_owner) (struct dma_desc *p);
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void (*set_rx_owner) (struct dma_desc *p);
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/* Get the receive frame size */
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int (*get_rx_frame_len) (struct dma_desc *p, int rx_coe_type);
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@ -186,6 +186,9 @@ static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x,
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unsigned int rdes0 = p->des0;
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int ret = good_frame;
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if (unlikely(rdes0 & RDES0_OWN))
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return dma_own;
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if (unlikely(rdes0 & RDES0_ERROR_SUMMARY)) {
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if (unlikely(rdes0 & RDES0_DESCRIPTOR_ERROR)) {
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x->rx_desc++;
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@ -272,11 +275,6 @@ static int enh_desc_get_tx_owner(struct dma_desc *p)
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return (p->des0 & ETDES0_OWN) >> 31;
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}
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static int enh_desc_get_rx_owner(struct dma_desc *p)
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{
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return (p->des0 & RDES0_OWN) >> 31;
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}
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static void enh_desc_set_tx_owner(struct dma_desc *p)
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{
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p->des0 |= ETDES0_OWN;
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@ -402,7 +400,6 @@ const struct stmmac_desc_ops enh_desc_ops = {
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.init_rx_desc = enh_desc_init_rx_desc,
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.init_tx_desc = enh_desc_init_tx_desc,
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.get_tx_owner = enh_desc_get_tx_owner,
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.get_rx_owner = enh_desc_get_rx_owner,
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.release_tx_desc = enh_desc_release_tx_desc,
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.prepare_tx_desc = enh_desc_prepare_tx_desc,
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.clear_tx_ic = enh_desc_clear_tx_ic,
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@ -82,6 +82,9 @@ static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x,
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unsigned int rdes0 = p->des0;
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struct net_device_stats *stats = (struct net_device_stats *)data;
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if (unlikely(rdes0 & RDES0_OWN))
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return dma_own;
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if (unlikely(!(rdes0 & RDES0_LAST_DESCRIPTOR))) {
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pr_warn("%s: Oversized frame spanned multiple buffers\n",
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__func__);
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@ -155,11 +158,6 @@ static int ndesc_get_tx_owner(struct dma_desc *p)
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return (p->des0 & TDES0_OWN) >> 31;
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}
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static int ndesc_get_rx_owner(struct dma_desc *p)
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{
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return (p->des0 & RDES0_OWN) >> 31;
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}
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static void ndesc_set_tx_owner(struct dma_desc *p)
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{
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p->des0 |= TDES0_OWN;
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@ -277,7 +275,6 @@ const struct stmmac_desc_ops ndesc_ops = {
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.init_rx_desc = ndesc_init_rx_desc,
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.init_tx_desc = ndesc_init_tx_desc,
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.get_tx_owner = ndesc_get_tx_owner,
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.get_rx_owner = ndesc_get_rx_owner,
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.release_tx_desc = ndesc_release_tx_desc,
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.prepare_tx_desc = ndesc_prepare_tx_desc,
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.clear_tx_ic = ndesc_clear_tx_ic,
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@ -2205,7 +2205,11 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
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else
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p = priv->dma_rx + entry;
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if (priv->hw->desc->get_rx_owner(p))
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/* read the status of the incoming frame */
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status = priv->hw->desc->rx_status(&priv->dev->stats,
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&priv->xstats, p);
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/* check if managed by the DMA otherwise go ahead */
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if (unlikely(status & dma_own))
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break;
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count++;
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@ -2218,9 +2222,6 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
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else
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prefetch(priv->dma_rx + next_entry);
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/* read the status of the incoming frame */
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status = priv->hw->desc->rx_status(&priv->dev->stats,
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&priv->xstats, p);
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if ((priv->extend_desc) && (priv->hw->desc->rx_extended_status))
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priv->hw->desc->rx_extended_status(&priv->dev->stats,
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&priv->xstats,
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