[ARM] 3370/2: ep93xx: add crunch support
Patch from Lennert Buytenhek Add the necessary kernel bits for crunch task switching. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
Russell King
parent
5429b060df
commit
c17fad11f3
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@ -22,6 +22,9 @@ obj-$(CONFIG_PCI) += bios32.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
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obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
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AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
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obj-$(CONFIG_IWMMXT) += iwmmxt.o
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AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
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@ -59,6 +59,9 @@ int main(void)
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DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
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#ifdef CONFIG_IWMMXT
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DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
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#endif
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#ifdef CONFIG_CRUNCH
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DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
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#endif
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BLANK();
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DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
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@ -0,0 +1,305 @@
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/*
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* arch/arm/kernel/crunch-bits.S
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* Cirrus MaverickCrunch context switching and handling
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* Shamelessly stolen from the iWMMXt code by Nicolas Pitre, which is
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* Copyright (c) 2003-2004, MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/ptrace.h>
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#include <asm/thread_info.h>
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#include <asm/asm-offsets.h>
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#include <asm/arch/ep93xx-regs.h>
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/*
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* We can't use hex constants here due to a bug in gas.
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*/
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#define CRUNCH_MVDX0 0
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#define CRUNCH_MVDX1 8
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#define CRUNCH_MVDX2 16
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#define CRUNCH_MVDX3 24
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#define CRUNCH_MVDX4 32
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#define CRUNCH_MVDX5 40
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#define CRUNCH_MVDX6 48
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#define CRUNCH_MVDX7 56
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#define CRUNCH_MVDX8 64
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#define CRUNCH_MVDX9 72
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#define CRUNCH_MVDX10 80
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#define CRUNCH_MVDX11 88
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#define CRUNCH_MVDX12 96
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#define CRUNCH_MVDX13 104
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#define CRUNCH_MVDX14 112
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#define CRUNCH_MVDX15 120
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#define CRUNCH_MVAX0L 128
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#define CRUNCH_MVAX0M 132
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#define CRUNCH_MVAX0H 136
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#define CRUNCH_MVAX1L 140
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#define CRUNCH_MVAX1M 144
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#define CRUNCH_MVAX1H 148
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#define CRUNCH_MVAX2L 152
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#define CRUNCH_MVAX2M 156
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#define CRUNCH_MVAX2H 160
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#define CRUNCH_MVAX3L 164
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#define CRUNCH_MVAX3M 168
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#define CRUNCH_MVAX3H 172
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#define CRUNCH_DSPSC 176
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#define CRUNCH_SIZE 184
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.text
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/*
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* Lazy switching of crunch coprocessor context
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*
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* r10 = struct thread_info pointer
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* r9 = ret_from_exception
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* lr = undefined instr exit
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*
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* called from prefetch exception handler with interrupts disabled
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*/
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ENTRY(crunch_task_enable)
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ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
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ldr r1, [r8, #0x80]
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tst r1, #0x00800000 @ access to crunch enabled?
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movne pc, lr @ if so no business here
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mov r3, #0xaa @ unlock syscon swlock
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str r3, [r8, #0xc0]
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orr r1, r1, #0x00800000 @ enable access to crunch
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str r1, [r8, #0x80]
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ldr r3, =crunch_owner
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add r0, r10, #TI_CRUNCH_STATE @ get task crunch save area
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ldr r2, [sp, #60] @ current task pc value
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ldr r1, [r3] @ get current crunch owner
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str r0, [r3] @ this task now owns crunch
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sub r2, r2, #4 @ adjust pc back
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str r2, [sp, #60]
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ldr r2, [r8, #0x80]
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mov r2, r2 @ flush out enable (@@@)
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teq r1, #0 @ test for last ownership
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mov lr, r9 @ normal exit from exception
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beq crunch_load @ no owner, skip save
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crunch_save:
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cfstr64 mvdx0, [r1, #CRUNCH_MVDX0] @ save 64b registers
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cfstr64 mvdx1, [r1, #CRUNCH_MVDX1]
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cfstr64 mvdx2, [r1, #CRUNCH_MVDX2]
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cfstr64 mvdx3, [r1, #CRUNCH_MVDX3]
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cfstr64 mvdx4, [r1, #CRUNCH_MVDX4]
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cfstr64 mvdx5, [r1, #CRUNCH_MVDX5]
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cfstr64 mvdx6, [r1, #CRUNCH_MVDX6]
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cfstr64 mvdx7, [r1, #CRUNCH_MVDX7]
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cfstr64 mvdx8, [r1, #CRUNCH_MVDX8]
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cfstr64 mvdx9, [r1, #CRUNCH_MVDX9]
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cfstr64 mvdx10, [r1, #CRUNCH_MVDX10]
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cfstr64 mvdx11, [r1, #CRUNCH_MVDX11]
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cfstr64 mvdx12, [r1, #CRUNCH_MVDX12]
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cfstr64 mvdx13, [r1, #CRUNCH_MVDX13]
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cfstr64 mvdx14, [r1, #CRUNCH_MVDX14]
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cfstr64 mvdx15, [r1, #CRUNCH_MVDX15]
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#ifdef __ARMEB__
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#error fix me for ARMEB
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#endif
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cfmv32al mvfx0, mvax0 @ save 72b accumulators
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX0L]
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cfmv32am mvfx0, mvax0
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX0M]
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cfmv32ah mvfx0, mvax0
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX0H]
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cfmv32al mvfx0, mvax1
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX1L]
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cfmv32am mvfx0, mvax1
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX1M]
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cfmv32ah mvfx0, mvax1
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX1H]
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cfmv32al mvfx0, mvax2
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX2L]
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cfmv32am mvfx0, mvax2
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX2M]
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cfmv32ah mvfx0, mvax2
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX2H]
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cfmv32al mvfx0, mvax3
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX3L]
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cfmv32am mvfx0, mvax3
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX3M]
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cfmv32ah mvfx0, mvax3
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cfstr32 mvfx0, [r1, #CRUNCH_MVAX3H]
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cfmv32sc mvdx0, dspsc @ save status word
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cfstr64 mvdx0, [r1, #CRUNCH_DSPSC]
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teq r0, #0 @ anything to load?
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cfldr64eq mvdx0, [r1, #CRUNCH_MVDX0] @ mvdx0 was clobbered
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moveq pc, lr
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crunch_load:
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cfldr64 mvdx0, [r0, #CRUNCH_DSPSC] @ load status word
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cfmvsc32 dspsc, mvdx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX0L] @ load 72b accumulators
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cfmval32 mvax0, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX0M]
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cfmvam32 mvax0, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX0H]
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cfmvah32 mvax0, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX1L]
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cfmval32 mvax1, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX1M]
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cfmvam32 mvax1, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX1H]
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cfmvah32 mvax1, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX2L]
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cfmval32 mvax2, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX2M]
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cfmvam32 mvax2, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX2H]
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cfmvah32 mvax2, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX3L]
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cfmval32 mvax3, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX3M]
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cfmvam32 mvax3, mvfx0
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cfldr32 mvfx0, [r0, #CRUNCH_MVAX3H]
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cfmvah32 mvax3, mvfx0
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cfldr64 mvdx0, [r0, #CRUNCH_MVDX0] @ load 64b registers
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cfldr64 mvdx1, [r0, #CRUNCH_MVDX1]
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cfldr64 mvdx2, [r0, #CRUNCH_MVDX2]
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cfldr64 mvdx3, [r0, #CRUNCH_MVDX3]
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cfldr64 mvdx4, [r0, #CRUNCH_MVDX4]
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cfldr64 mvdx5, [r0, #CRUNCH_MVDX5]
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cfldr64 mvdx6, [r0, #CRUNCH_MVDX6]
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cfldr64 mvdx7, [r0, #CRUNCH_MVDX7]
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cfldr64 mvdx8, [r0, #CRUNCH_MVDX8]
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cfldr64 mvdx9, [r0, #CRUNCH_MVDX9]
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cfldr64 mvdx10, [r0, #CRUNCH_MVDX10]
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cfldr64 mvdx11, [r0, #CRUNCH_MVDX11]
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cfldr64 mvdx12, [r0, #CRUNCH_MVDX12]
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cfldr64 mvdx13, [r0, #CRUNCH_MVDX13]
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cfldr64 mvdx14, [r0, #CRUNCH_MVDX14]
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cfldr64 mvdx15, [r0, #CRUNCH_MVDX15]
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mov pc, lr
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/*
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* Back up crunch regs to save area and disable access to them
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* (mainly for gdb or sleep mode usage)
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*
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* r0 = struct thread_info pointer of target task or NULL for any
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*/
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ENTRY(crunch_task_disable)
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stmfd sp!, {r4, r5, lr}
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mrs ip, cpsr
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orr r2, ip, #PSR_I_BIT @ disable interrupts
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msr cpsr_c, r2
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ldr r4, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
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ldr r3, =crunch_owner
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add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
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ldr r1, [r3] @ get current crunch owner
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teq r1, #0 @ any current owner?
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beq 1f @ no: quit
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teq r0, #0 @ any owner?
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teqne r1, r2 @ or specified one?
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bne 1f @ no: quit
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ldr r5, [r4, #0x80] @ enable access to crunch
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mov r2, #0xaa
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str r2, [r4, #0xc0]
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orr r5, r5, #0x00800000
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str r5, [r4, #0x80]
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mov r0, #0 @ nothing to load
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str r0, [r3] @ no more current owner
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ldr r2, [r4, #0x80] @ flush out enable (@@@)
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mov r2, r2
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bl crunch_save
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mov r2, #0xaa @ disable access to crunch
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str r2, [r4, #0xc0]
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bic r5, r5, #0x00800000
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str r5, [r4, #0x80]
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ldr r5, [r4, #0x80] @ flush out enable (@@@)
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mov r5, r5
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1: msr cpsr_c, ip @ restore interrupt mode
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ldmfd sp!, {r4, r5, pc}
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/*
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* Copy crunch state to given memory address
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*
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* r0 = struct thread_info pointer of target task
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* r1 = memory address where to store crunch state
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*
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* this is called mainly in the creation of signal stack frames
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*/
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ENTRY(crunch_task_copy)
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mrs ip, cpsr
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orr r2, ip, #PSR_I_BIT @ disable interrupts
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msr cpsr_c, r2
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ldr r3, =crunch_owner
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add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
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ldr r3, [r3] @ get current crunch owner
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teq r2, r3 @ does this task own it...
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beq 1f
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@ current crunch values are in the task save area
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msr cpsr_c, ip @ restore interrupt mode
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mov r0, r1
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mov r1, r2
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mov r2, #CRUNCH_SIZE
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b memcpy
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1: @ this task owns crunch regs -- grab a copy from there
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mov r0, #0 @ nothing to load
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mov r3, lr @ preserve return address
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bl crunch_save
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msr cpsr_c, ip @ restore interrupt mode
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mov pc, r3
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/*
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* Restore crunch state from given memory address
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*
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* r0 = struct thread_info pointer of target task
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* r1 = memory address where to get crunch state from
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*
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* this is used to restore crunch state when unwinding a signal stack frame
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*/
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ENTRY(crunch_task_restore)
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mrs ip, cpsr
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orr r2, ip, #PSR_I_BIT @ disable interrupts
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msr cpsr_c, r2
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ldr r3, =crunch_owner
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add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
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ldr r3, [r3] @ get current crunch owner
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teq r2, r3 @ does this task own it...
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beq 1f
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@ this task doesn't own crunch regs -- use its save area
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msr cpsr_c, ip @ restore interrupt mode
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mov r0, r2
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mov r2, #CRUNCH_SIZE
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b memcpy
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1: @ this task owns crunch regs -- load them directly
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mov r0, r1
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mov r1, #0 @ nothing to save
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mov r3, lr @ preserve return address
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bl crunch_load
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msr cpsr_c, ip @ restore interrupt mode
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mov pc, r3
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@ -0,0 +1,83 @@
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/*
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* arch/arm/kernel/crunch.c
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* Cirrus MaverickCrunch context switching and handling
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <asm/arch/ep93xx-regs.h>
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#include <asm/thread_notify.h>
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#include <asm/io.h>
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struct crunch_state *crunch_owner;
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void crunch_task_release(struct thread_info *thread)
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{
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local_irq_disable();
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if (crunch_owner == &thread->crunchstate)
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crunch_owner = NULL;
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local_irq_enable();
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}
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static int crunch_enabled(u32 devcfg)
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{
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return !!(devcfg & EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE);
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}
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static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t)
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{
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struct thread_info *thread = (struct thread_info *)t;
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struct crunch_state *crunch_state;
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u32 devcfg;
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crunch_state = &thread->crunchstate;
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switch (cmd) {
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case THREAD_NOTIFY_FLUSH:
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memset(crunch_state, 0, sizeof(*crunch_state));
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/*
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* FALLTHROUGH: Ensure we don't try to overwrite our newly
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* initialised state information on the first fault.
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*/
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case THREAD_NOTIFY_RELEASE:
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crunch_task_release(thread);
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break;
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case THREAD_NOTIFY_SWITCH:
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devcfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
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if (crunch_enabled(devcfg) || crunch_owner == crunch_state) {
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devcfg ^= EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
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__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
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__raw_writel(devcfg, EP93XX_SYSCON_DEVICE_CONFIG);
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}
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break;
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}
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return NOTIFY_DONE;
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}
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static struct notifier_block crunch_notifier_block = {
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.notifier_call = crunch_do,
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};
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static int __init crunch_init(void)
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{
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thread_register_notifier(&crunch_notifier_block);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
late_initcall(crunch_init);
|
||||
|
|
@ -492,9 +492,15 @@ call_fpe:
|
|||
b do_fpe @ CP#1 (FPE)
|
||||
b do_fpe @ CP#2 (FPE)
|
||||
mov pc, lr @ CP#3
|
||||
#ifdef CONFIG_CRUNCH
|
||||
b crunch_task_enable @ CP#4 (MaverickCrunch)
|
||||
b crunch_task_enable @ CP#5 (MaverickCrunch)
|
||||
b crunch_task_enable @ CP#6 (MaverickCrunch)
|
||||
#else
|
||||
mov pc, lr @ CP#4
|
||||
mov pc, lr @ CP#5
|
||||
mov pc, lr @ CP#6
|
||||
#endif
|
||||
mov pc, lr @ CP#7
|
||||
mov pc, lr @ CP#8
|
||||
mov pc, lr @ CP#9
|
||||
|
|
|
|||
|
|
@ -2,6 +2,11 @@ if ARCH_EP93XX
|
|||
|
||||
menu "Cirrus EP93xx Implementation Options"
|
||||
|
||||
config CRUNCH
|
||||
bool "Support for MaverickCrunch"
|
||||
help
|
||||
Enable kernel support for MaverickCrunch.
|
||||
|
||||
comment "EP93xx Platforms"
|
||||
|
||||
config MACH_GESBC9312
|
||||
|
|
|
|||
|
|
@ -72,6 +72,14 @@ union fp_state {
|
|||
|
||||
#define FP_SIZE (sizeof(union fp_state) / sizeof(int))
|
||||
|
||||
struct crunch_state {
|
||||
unsigned int mvdx[16][2];
|
||||
unsigned int mvax[4][3];
|
||||
unsigned int dspsc[2];
|
||||
};
|
||||
|
||||
#define CRUNCH_SIZE sizeof(struct crunch_state)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -59,6 +59,7 @@ struct thread_info {
|
|||
struct cpu_context_save cpu_context; /* cpu context */
|
||||
__u8 used_cp[16]; /* thread used copro */
|
||||
unsigned long tp_value;
|
||||
struct crunch_state crunchstate;
|
||||
union fp_state fpstate __attribute__((aligned(8)));
|
||||
union vfp_state vfpstate;
|
||||
struct restart_block restart_block;
|
||||
|
|
@ -101,6 +102,11 @@ extern void free_thread_info(struct thread_info *);
|
|||
#define thread_saved_fp(tsk) \
|
||||
((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
|
||||
|
||||
extern void crunch_task_disable(struct thread_info *);
|
||||
extern void crunch_task_copy(struct thread_info *, void *);
|
||||
extern void crunch_task_restore(struct thread_info *, void *);
|
||||
extern void crunch_task_release(struct thread_info *);
|
||||
|
||||
extern void iwmmxt_task_disable(struct thread_info *);
|
||||
extern void iwmmxt_task_copy(struct thread_info *, void *);
|
||||
extern void iwmmxt_task_restore(struct thread_info *, void *);
|
||||
|
|
|
|||
Loading…
Reference in New Issue