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ARM: OMAP2+: Configure voltage controller for cpcap to low-speed 

Looks like the i2c timings in high-speed mode do not work properly to
allow us to clear I2C_DISABLE bits for PRM_VOLTCTRL register and the
device reboots if I2C_DISABLE bits are cleared.

Let's configure the voltage controller i2c for low-speed mode as done in
the Motorola Mapphone Android Linux kernel. This saves us about 7mW of
power during retention compared to the high-speed values.

Let's also change the low-speed warning to pr_info about relying on the
bootloader configured low-speed values like we currently do.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2019-10-17 06:34:34 -07:00
parent 71065d3fe8
commit c145649bf2
2 changed files with 14 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/arm/mach-omap2/pmic-cpcap.c
View File

@ -61,7 +61,7 @@ static struct omap_voltdm_pmic omap_cpcap_core = {
.i2c_slave_addr = 0x02,
.volt_reg_addr = 0x00,
.cmd_reg_addr = 0x01,
.i2c_high_speed = true,
.i2c_high_speed = false,
.vsel_to_uv = omap_cpcap_vsel_to_uv,
.uv_to_vsel = omap_cpcap_uv_to_vsel,
};
@ -78,7 +78,7 @@ static struct omap_voltdm_pmic omap_cpcap_iva = {
.i2c_slave_addr = 0x44,
.volt_reg_addr = 0x0,
.cmd_reg_addr = 0x01,
.i2c_high_speed = true,
.i2c_high_speed = false,
.vsel_to_uv = omap_cpcap_vsel_to_uv,
.uv_to_vsel = omap_cpcap_uv_to_vsel,
};
@ -125,7 +125,7 @@ static struct omap_voltdm_pmic omap443x_max8952_mpu = {
.i2c_slave_addr = 0x60,
.volt_reg_addr = 0x03,
.cmd_reg_addr = 0x03,
.i2c_high_speed = true,
.i2c_high_speed = false,
.vsel_to_uv = omap_max8952_vsel_to_uv,
.uv_to_vsel = omap_max8952_uv_to_vsel,
};
@ -212,7 +212,7 @@ static struct omap_voltdm_pmic omap4_fan_core = {
.vddmax = 1375000,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = 0x4A,
.i2c_high_speed = true,
.i2c_high_speed = false,
.volt_reg_addr = 0x01,
.cmd_reg_addr = 0x01,
.vsel_to_uv = omap_fan535508_vsel_to_uv,
@ -232,7 +232,7 @@ static struct omap_voltdm_pmic omap4_fan_iva = {
.i2c_slave_addr = 0x48,
.volt_reg_addr = 0x01,
.cmd_reg_addr = 0x01,
.i2c_high_speed = true,
.i2c_high_speed = false,
.vsel_to_uv = omap_fan535503_vsel_to_uv,
.uv_to_vsel = omap_fan535503_uv_to_vsel,
};
@ -263,3 +263,11 @@ int __init omap4_cpcap_init(void)
return 0;
}
static int __init cpcap_late_init(void)
{
omap4_vc_set_pmic_signaling(PWRDM_POWER_RET);
return 0;
}
omap_late_initcall(cpcap_late_init);

2
arch/arm/mach-omap2/vc.c
View File

@ -670,7 +670,7 @@ static void __init omap4_vc_i2c_timing_init(struct voltagedomain *voltdm)
const struct i2c_init_data *i2c_data;
if (!voltdm->pmic->i2c_high_speed) {
pr_warn("%s: only high speed supported!\n", __func__);
pr_info("%s: using bootloader low-speed timings\n", __func__);
return;
}