platform/x86: mlx-platform: Remove PSU EEPROM configuration
Remove PSU EEPROM configuration for systems class equipped with
Mellanox chip Spectrume-2. Till now all the systems from this class
used few types of power units, all equipped with EEPROM device with
address space two bytes. Thus, all these devices have been handled by
EEPROM driver "24c32".
There is a new requirement is to support power unit replacement by "off
the shelf" device, matching electrical required parameters. Such device
could be equipped with different EEPROM type, which could be one byte
address space addressing or even could be not equipped with EEPROM.
In such case "24c32" will not work.
Fixes: 1bd42d94cc
("platform/x86: mlx-platform: Add support for new 200G IB and Ethernet systems")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20200923172053.26296-2-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
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@ -328,15 +328,6 @@ static struct i2c_board_info mlxplat_mlxcpld_psu[] = {
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},
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};
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static struct i2c_board_info mlxplat_mlxcpld_ng_psu[] = {
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{
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I2C_BOARD_INFO("24c32", 0x51),
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},
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{
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I2C_BOARD_INFO("24c32", 0x50),
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},
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};
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static struct i2c_board_info mlxplat_mlxcpld_pwr[] = {
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{
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I2C_BOARD_INFO("dps460", 0x59),
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@ -770,15 +761,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_psu_items_data[] = {
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.label = "psu1",
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.reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
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.mask = BIT(0),
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.hpdev.brdinfo = &mlxplat_mlxcpld_ng_psu[0],
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.hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
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.hpdev.nr = MLXPLAT_CPLD_NR_NONE,
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},
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{
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.label = "psu2",
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.reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
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.mask = BIT(1),
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.hpdev.brdinfo = &mlxplat_mlxcpld_ng_psu[1],
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.hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
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.hpdev.nr = MLXPLAT_CPLD_NR_NONE,
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},
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};
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