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powerpc/powernv/ioda2: Use new helpers to do proper cleanup on PE release 

The existing code programmed TVT#0 with some address and then
immediately released that memory.

This makes use of pnv_pci_ioda2_unset_window() and
pnv_pci_ioda2_set_bypass() which do correct resource release and
TVT update.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Alexey Kardashevskiy 2015-06-05 16:35:21 +10:00 committed by Michael Ellerman
parent 4793d65d1a
commit c035e37b58
1 changed files with 6 additions and 19 deletions
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25
arch/powerpc/platforms/powernv/pci-ioda.c
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@ -1288,34 +1288,21 @@ m64_failed:
return -EBUSY;
}
static long pnv_pci_ioda2_unset_window(struct iommu_table_group *table_group,
int num);
static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable);
static void pnv_pci_ioda2_release_dma_pe(struct pci_dev *dev, struct pnv_ioda_pe *pe)
{
struct pci_bus *bus;
struct pci_controller *hose;
struct pnv_phb *phb;
struct iommu_table *tbl;
unsigned long addr;
int64_t rc;
bus = dev->bus;
hose = pci_bus_to_host(bus);
phb = hose->private_data;
tbl = pe->table_group.tables[0];
addr = tbl->it_base;
opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number,
pe->pe_number << 1, 1, __pa(addr),
0, 0x1000);
rc = opal_pci_map_pe_dma_window_real(pe->phb->opal_id,
pe->pe_number,
(pe->pe_number << 1) + 1,
pe->tce_bypass_base,
0);
rc = pnv_pci_ioda2_unset_window(&pe->table_group, 0);
if (rc)
pe_warn(pe, "OPAL error %ld release DMA window\n", rc);
pnv_pci_unlink_table_and_group(tbl, &pe->table_group);
pnv_pci_ioda2_set_bypass(pe, false);
if (pe->table_group.group) {
iommu_group_put(pe->table_group.group);
BUG_ON(pe->table_group.group);