arm64: perf: fix event number mask
This patch fixes ARMV8_EVTYPE_* macros since evtCount (event number) field width is 10bits in event selection register. Signed-off-by: Vinayak Kale <vkale@apm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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arch/arm64/kernel
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@ -784,8 +784,8 @@ static const unsigned armv8_pmuv3_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
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/*
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* PMXEVTYPER: Event selection reg
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*/
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#define ARMV8_EVTYPE_MASK 0xc80000ff /* Mask for writable bits */
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#define ARMV8_EVTYPE_EVENT 0xff /* Mask for EVENT bits */
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#define ARMV8_EVTYPE_MASK 0xc80003ff /* Mask for writable bits */
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#define ARMV8_EVTYPE_EVENT 0x3ff /* Mask for EVENT bits */
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/*
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* Event filters for PMUv3
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@ -1175,7 +1175,8 @@ static void armv8pmu_reset(void *info)
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static int armv8_pmuv3_map_event(struct perf_event *event)
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{
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return map_cpu_event(event, &armv8_pmuv3_perf_map,
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&armv8_pmuv3_perf_cache_map, 0xFF);
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&armv8_pmuv3_perf_cache_map,
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ARMV8_EVTYPE_EVENT);
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}
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static struct arm_pmu armv8pmu = {
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