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pinctrl: nand: meson-gxl: fix missing data pins 

The data pin 0-7 of the NAND controller are actually missing from
the nand pinctrl group, so we fix it here.

Fixes: 0f15f500ff ("pinctrl: meson: Add GXL pinctrl definitions")
Reported-by: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Yixun Lan 2018-05-09 22:08:27 +00:00 committed by Linus Walleij
parent e3678b6470
commit c0136ef651
1 changed files with 2 additions and 2 deletions
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4
drivers/pinctrl/meson/pinctrl-meson-gxl.c
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@ -617,8 +617,8 @@ static const char * const sdio_groups[] = {
};
static const char * const nand_groups[] = {
"nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", "nand_cle",
"nand_wen_clk", "nand_ren_wr", "nand_dqs",
"emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale",
"nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs",
};
static const char * const uart_a_groups[] = {