Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King: "A few fixes for ARM, mostly just one liners with the exception of the missing section specification. We decided not to rely on .previous to fix this but to explicitly state the section we want the code to be in." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7778/1: smp_twd: twd_update_frequency need be run on all online CPUs ARM: 7782/1: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP ARM: mm: fix boot on SA1110 Assabet ARM: 7781/1: mmu: Add debug_ll_io_init() mappings to early mappings ARM: 7780/1: add missing linker section markup to head-common.S
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commit
bfd65dd9fe
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@ -1316,7 +1316,7 @@ config ARM_ERRATA_754327
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config ARM_ERRATA_364296
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bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
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depends on CPU_V6 && !SMP
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depends on CPU_V6
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help
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This options enables the workaround for the 364296 ARM1136
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r0p2 erratum (possible cache data corruption with
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@ -133,6 +133,9 @@ ENTRY(lookup_processor_type)
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ldmfd sp!, {r4 - r6, r9, pc}
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ENDPROC(lookup_processor_type)
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__FINIT
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.text
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/*
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* Read processor ID register (CP#15, CR0), and look up in the linker-built
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* supported processor list. Note that we can't use the absolute addresses
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@ -120,7 +120,7 @@ static int twd_rate_change(struct notifier_block *nb,
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* changing cpu.
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*/
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if (flags == POST_RATE_CHANGE)
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smp_call_function(twd_update_frequency,
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on_each_cpu(twd_update_frequency,
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(void *)&cnd->new_rate, 1);
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return NOTIFY_OK;
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@ -597,7 +597,7 @@ void __init mem_init(void)
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#ifdef CONFIG_SA1111
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/* now that our DMA memory is actually so designated, we can free it */
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free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, -1, NULL);
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free_reserved_area(__va(PHYS_OFFSET), swapper_pg_dir, -1, NULL);
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#endif
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free_highpages();
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@ -950,7 +950,7 @@ void __init debug_ll_io_init(void)
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map.virtual &= PAGE_MASK;
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map.length = PAGE_SIZE;
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map.type = MT_DEVICE;
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create_mapping(&map);
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iotable_init(&map, 1);
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}
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#endif
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