IB/hfi1,PCI: Allow bus reset while probing
Calling into the new API to reset the secondary bus results in a deadlock. This occurs because the device/bus is already locked at probe time. Reverting back to the old behavior while the API is improved. Link: https://bugzilla.kernel.org/show_bug.cgi?id=200985 Fixes:c6a44ba950
("PCI: Rename pci_try_reset_bus() to pci_reset_bus()") Fixes:409888e096
("IB/hfi1: Use pci_try_reset_bus() for initiating PCI Secondary Bus Reset") Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Cc: Sinan Kaya <okaya@codeaurora.org>
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@ -893,14 +893,11 @@ static int trigger_sbr(struct hfi1_devdata *dd)
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}
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/*
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* A secondary bus reset (SBR) issues a hot reset to our device.
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* The following routine does a 1s wait after the reset is dropped
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* per PCI Trhfa (recovery time). PCIe 3.0 section 6.6.1 -
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* Conventional Reset, paragraph 3, line 35 also says that a 1s
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* delay after a reset is required. Per spec requirements,
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* the link is either working or not after that point.
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* This is an end around to do an SBR during probe time. A new API needs
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* to be implemented to have cleaner interface but this fixes the
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* current brokenness
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*/
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return pci_reset_bus(dev);
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return pci_bridge_secondary_bus_reset(dev->bus->self);
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}
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/*
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@ -4547,6 +4547,7 @@ int pci_bridge_secondary_bus_reset(struct pci_dev *dev)
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return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
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}
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EXPORT_SYMBOL_GPL(pci_bridge_secondary_bus_reset);
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static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
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{
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@ -1235,6 +1235,9 @@ void pci_bus_remove_resources(struct pci_bus *bus);
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int devm_request_pci_bus_resources(struct device *dev,
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struct list_head *resources);
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/* Temporary until new and working PCI SBR API in place */
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int pci_bridge_secondary_bus_reset(struct pci_dev *dev);
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#define pci_bus_for_each_resource(bus, res, i) \
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for (i = 0; \
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(res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
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