KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD

To signify that the macros only support 8-bit xAPIC destination ID.

Suggested-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220519102709.24125-3-suravee.suthikulpanit@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Suravee Suthikulpanit 2022-05-19 05:26:54 -05:00 committed by Paolo Bonzini
parent aae99a7c9a
commit bf348f667e
6 changed files with 8 additions and 8 deletions

View File

@ -46,7 +46,7 @@ static void hv_apic_icr_write(u32 low, u32 id)
{ {
u64 reg_val; u64 reg_val;
reg_val = SET_APIC_DEST_FIELD(id); reg_val = SET_XAPIC_DEST_FIELD(id);
reg_val = reg_val << 32; reg_val = reg_val << 32;
reg_val |= low; reg_val |= low;

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@ -89,8 +89,8 @@
#define APIC_DM_EXTINT 0x00700 #define APIC_DM_EXTINT 0x00700
#define APIC_VECTOR_MASK 0x000FF #define APIC_VECTOR_MASK 0x000FF
#define APIC_ICR2 0x310 #define APIC_ICR2 0x310
#define GET_APIC_DEST_FIELD(x) (((x) >> 24) & 0xFF) #define GET_XAPIC_DEST_FIELD(x) (((x) >> 24) & 0xFF)
#define SET_APIC_DEST_FIELD(x) ((x) << 24) #define SET_XAPIC_DEST_FIELD(x) ((x) << 24)
#define APIC_LVTT 0x320 #define APIC_LVTT 0x320
#define APIC_LVTTHMR 0x330 #define APIC_LVTTHMR 0x330
#define APIC_LVTPC 0x340 #define APIC_LVTPC 0x340

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@ -275,7 +275,7 @@ void native_apic_icr_write(u32 low, u32 id)
unsigned long flags; unsigned long flags;
local_irq_save(flags); local_irq_save(flags);
apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); apic_write(APIC_ICR2, SET_XAPIC_DEST_FIELD(id));
apic_write(APIC_ICR, low); apic_write(APIC_ICR, low);
local_irq_restore(flags); local_irq_restore(flags);
} }

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@ -99,7 +99,7 @@ sendmask:
static inline int __prepare_ICR2(unsigned int mask) static inline int __prepare_ICR2(unsigned int mask)
{ {
return SET_APIC_DEST_FIELD(mask); return SET_XAPIC_DEST_FIELD(mask);
} }
static inline void __xapic_wait_icr_idle(void) static inline void __xapic_wait_icr_idle(void)

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@ -1326,7 +1326,7 @@ void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
if (apic_x2apic_mode(apic)) if (apic_x2apic_mode(apic))
irq.dest_id = icr_high; irq.dest_id = icr_high;
else else
irq.dest_id = GET_APIC_DEST_FIELD(icr_high); irq.dest_id = GET_XAPIC_DEST_FIELD(icr_high);
trace_kvm_apic_ipi(icr_low, irq.dest_id); trace_kvm_apic_ipi(icr_low, irq.dest_id);

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@ -303,7 +303,7 @@ static int avic_kick_target_vcpus_fast(struct kvm *kvm, struct kvm_lapic *source
if (apic_x2apic_mode(source)) if (apic_x2apic_mode(source))
dest = icrh; dest = icrh;
else else
dest = GET_APIC_DEST_FIELD(icrh); dest = GET_XAPIC_DEST_FIELD(icrh);
if (dest_mode == APIC_DEST_PHYSICAL) { if (dest_mode == APIC_DEST_PHYSICAL) {
/* broadcast destination, use slow path */ /* broadcast destination, use slow path */
@ -397,7 +397,7 @@ static void avic_kick_target_vcpus(struct kvm *kvm, struct kvm_lapic *source,
*/ */
kvm_for_each_vcpu(i, vcpu, kvm) { kvm_for_each_vcpu(i, vcpu, kvm) {
if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK, if (kvm_apic_match_dest(vcpu, source, icrl & APIC_SHORT_MASK,
GET_APIC_DEST_FIELD(icrh), GET_XAPIC_DEST_FIELD(icrh),
icrl & APIC_DEST_MASK)) { icrl & APIC_DEST_MASK)) {
vcpu->arch.apic->irr_pending = true; vcpu->arch.apic->irr_pending = true;
svm_complete_interrupt_delivery(vcpu, svm_complete_interrupt_delivery(vcpu,