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ASoC: tlv320aic32x4: Break out clock setting into separate function 

Break the clock setting logic out from the main hw_params.  It's
rather large and unweildy and makes for a large function.  This
also better enables some of the following changes to the clock
tree access in the driver.

Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Annaliese McDermond 2019-03-18 20:37:44 -07:00 committed by Mark Brown
parent 0f91d24f2c
commit bf31cbfbe2
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 18 additions and 8 deletions
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26
sound/soc/codecs/tlv320aic32x4.c
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@ -696,17 +696,13 @@ static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
return 0; return 0;
} }
static int aic32x4_hw_params(struct snd_pcm_substream *substream, static int aic32x4_setup_clocks(struct snd_soc_component *component,
struct snd_pcm_hw_params *params, unsigned int sample_rate,
struct snd_soc_dai *dai) unsigned int parent_rate)
{ {
struct snd_soc_component *component = dai->component;
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
u8 iface1_reg = 0;
u8 dacsetup_reg = 0;
int i; int i;
i = aic32x4_get_divs(aic32x4->sysclk, params_rate(params)); i = aic32x4_get_divs(parent_rate, sample_rate);
if (i < 0) { if (i < 0) {
printk(KERN_ERR "aic32x4: sampling rate not supported\n"); printk(KERN_ERR "aic32x4: sampling rate not supported\n");
return i; return i;
@ -763,6 +759,20 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
snd_soc_component_update_bits(component, AIC32X4_BCLKN, snd_soc_component_update_bits(component, AIC32X4_BCLKN,
AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N); AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N);
return 0;
}
static int aic32x4_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_component *component = dai->component;
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
u8 iface1_reg = 0;
u8 dacsetup_reg = 0;
aic32x4_setup_clocks(component, params_rate(params), aic32x4->sysclk);
switch (params_width(params)) { switch (params_width(params)) {
case 16: case 16:
iface1_reg |= (AIC32X4_WORD_LEN_16BITS << iface1_reg |= (AIC32X4_WORD_LEN_16BITS <<