drm/msm: fix bus scaling
This got a bit broken with original patches when re-arranging things to move dependencies on mach-msm inside #ifndef OF. Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -414,6 +414,9 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
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gpu->fast_rate = config->fast_rate;
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gpu->slow_rate = config->slow_rate;
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gpu->bus_freq = config->bus_freq;
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#ifdef CONFIG_MSM_BUS_SCALING
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gpu->bus_scale_table = config->bus_scale_table;
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#endif
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DBG("fast_rate=%u, slow_rate=%u, bus_freq=%u",
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gpu->fast_rate, gpu->slow_rate, gpu->bus_freq);
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@ -436,12 +439,17 @@ fail:
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* The a3xx device:
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*/
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#if defined(CONFIG_MSM_BUS_SCALING) && !defined(CONFIG_OF)
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# include <mach/kgsl.h>
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#endif
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static int a3xx_probe(struct platform_device *pdev)
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{
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static struct adreno_platform_config config = {};
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#ifdef CONFIG_OF
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/* TODO */
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#else
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struct kgsl_device_platform_data *pdata = pdev->dev.platform_data;
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uint32_t version = socinfo_get_version();
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if (cpu_is_apq8064ab()) {
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config.fast_rate = 450000000;
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@ -473,6 +481,9 @@ static int a3xx_probe(struct platform_device *pdev)
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config.rev = ADRENO_REV(3, 0, 5, 0);
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}
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# ifdef CONFIG_MSM_BUS_SCALING
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config.bus_scale_table = pdata->bus_scale_table;
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# endif
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#endif
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pdev->dev.platform_data = &config;
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a3xx_pdev = pdev;
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@ -70,6 +70,9 @@ struct adreno_gpu {
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struct adreno_platform_config {
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struct adreno_rev rev;
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uint32_t fast_rate, slow_rate, bus_freq;
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#ifdef CONFIG_MSM_BUS_SCALING
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struct msm_bus_scale_pdata *bus_scale_table;
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#endif
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};
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#define ADRENO_IDLE_TIMEOUT (20 * 1000)
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@ -25,20 +25,10 @@
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#ifdef CONFIG_MSM_BUS_SCALING
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#include <mach/board.h>
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#include <mach/kgsl.h>
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static void bs_init(struct msm_gpu *gpu, struct platform_device *pdev)
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static void bs_init(struct msm_gpu *gpu)
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{
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struct drm_device *dev = gpu->dev;
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struct kgsl_device_platform_data *pdata;
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if (!pdev) {
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dev_err(dev->dev, "could not find dtv pdata\n");
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return;
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}
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pdata = pdev->dev.platform_data;
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if (pdata->bus_scale_table) {
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gpu->bsc = msm_bus_scale_register_client(pdata->bus_scale_table);
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if (gpu->bus_scale_table) {
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gpu->bsc = msm_bus_scale_register_client(gpu->bus_scale_table);
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DBG("bus scale client: %08x", gpu->bsc);
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}
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}
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@ -59,7 +49,7 @@ static void bs_set(struct msm_gpu *gpu, int idx)
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}
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}
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#else
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static void bs_init(struct msm_gpu *gpu, struct platform_device *pdev) {}
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static void bs_init(struct msm_gpu *gpu) {}
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static void bs_fini(struct msm_gpu *gpu) {}
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static void bs_set(struct msm_gpu *gpu, int idx) {}
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#endif
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@ -452,7 +442,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
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goto fail;
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}
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bs_init(gpu, pdev);
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bs_init(gpu);
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return 0;
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@ -85,7 +85,11 @@ struct msm_gpu {
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struct regulator *gpu_reg, *gpu_cx;
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struct clk *ebi1_clk, *grp_clks[5];
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uint32_t fast_rate, slow_rate, bus_freq;
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#ifdef CONFIG_MSM_BUS_SCALING
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struct msm_bus_scale_pdata *bus_scale_table;
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uint32_t bsc;
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#endif
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/* Hang Detction: */
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#define DRM_MSM_HANGCHECK_PERIOD 500 /* in ms */
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