Two regression fixes for omaps and one fix for device signaling:
- L2 cache regression fix for a warning about trying to access a read-only register - GPMC ECC software fallback regression fix for omap3 - Fix for dra7 pinctrl pull-up direction that causes signal issues for anybody trying to use the internal pull up or down -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJT0PDDAAoJEBvUPslcq6Vz2kkP/2XcaWEl5xWEP6vTFDwy1RDL apjp2qURWpJ579bT5y5KlGP8vyBeSLfdXl+ccCuHhBrRtYCZfsUdRaii/AHDcsd/ N0p1ZaAQLwfMXUo1sVgW2grSOJEo8QZs8DEZ7eJfE8SnH2g/i4j+VFknYOO1t6vA +QoHRWcY0CRLNVHSyGGFk235pfdq1ZAKskayzQ4wCjOXuH2tKILjFsiCxItPStih CmKqZCoO+BQMz7dLTGZsdchDTqf0PceMh7w6PWO65QeJxr16nWmGbqnZRlUGeBqo vTZO1Rsfb4DlRYRGBxJ1ybVJw2cgmsx8fWKv4eYVrulGNKUE2m3UYj+oYCst0g5i VOPMwLiLapciCZi/4er2VWtb9sFWY6XaTAJHVRtrtX6RZgZC5c3cWGzkykXOkF7N Ut7He/TT41uc5OIjuG6WGQNCIfKOmfBcSDeNRqyr9YzZpn6lbJ+U4kk0kco1pyda IHrRUD+yHuXK0FjZvZMDlWmKqP3QLK+xjL7LRzsiJ4yfymikckjS2RH0iP9PGuCV T68PPl+rzyHjmVUnbBCgLnatTAQ9uHPCb4Eb5rRZaiO+4nUyqeqikMWU/DsiS4jc 1igudgOx53/0zCCQC/VHVL9HGb4fSrbevMzq8YR3uyyS2b/R8FFbGs6Y6TCIDWdi TUSv/ckpA4uUbe22SFTn =/FMt -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Merge "Two regression fixes for omaps and one fix for device signaling" from Tony Lindgren: - L2 cache regression fix for a warning about trying to access a read-only register - GPMC ECC software fallback regression fix for omap3 - Fix for dra7 pinctrl pull-up direction that causes signal issues for anybody trying to use the internal pull up or down * tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable() pinctrl: dra: dt-bindings: Fix pull enable/disable ARM: OMAP2+: l2c: squelch warning dump on power control setting Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit
bf1d9879ea
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@ -50,6 +50,16 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
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soc_is_omap54xx() || soc_is_dra7xx())
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return 1;
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if (ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW ||
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ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW) {
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if (cpu_is_omap24xx())
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return 0;
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else if (cpu_is_omap3630() && (GET_OMAP_REVISION() == 0))
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return 0;
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else
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return 1;
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}
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/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
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* which require H/W based ECC error detection */
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if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
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@ -57,14 +67,6 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
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(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
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return 0;
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/*
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* For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
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* and AM33xx derivates. Other chips may be added if confirmed to work.
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*/
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if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
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(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
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return 0;
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/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
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if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
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return 1;
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@ -168,6 +168,10 @@ static void omap4_l2c310_write_sec(unsigned long val, unsigned reg)
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smc_op = OMAP4_MON_L2X0_PREFETCH_INDEX;
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break;
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case L310_POWER_CTRL:
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pr_info_once("OMAP L2C310: ROM does not support power control setting\n");
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return;
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default:
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WARN_ONCE(1, "OMAP L2C310: ignoring write to reg 0x%x\n", reg);
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return;
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@ -30,7 +30,8 @@
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#define MUX_MODE14 0xe
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#define MUX_MODE15 0xf
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#define PULL_ENA (1 << 16)
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#define PULL_ENA (0 << 16)
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#define PULL_DIS (1 << 16)
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#define PULL_UP (1 << 17)
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#define INPUT_EN (1 << 18)
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#define SLEWCONTROL (1 << 19)
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@ -38,10 +39,10 @@
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#define WAKEUP_EVENT (1 << 25)
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/* Active pin states */
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#define PIN_OUTPUT 0
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#define PIN_OUTPUT (0 | PULL_DIS)
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#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
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#define PIN_INPUT INPUT_EN
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#define PIN_INPUT (INPUT_EN | PULL_DIS)
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#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
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#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
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