Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
This commit is contained in:
commit
bef6e7e768
12
MAINTAINERS
12
MAINTAINERS
|
@ -1010,6 +1010,15 @@ L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: arch/arm/mach-s5p*/
|
F: arch/arm/mach-s5p*/
|
||||||
|
|
||||||
|
ARM/SAMSUNG MOBILE MACHINE SUPPORT
|
||||||
|
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||||
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
|
S: Maintained
|
||||||
|
F: arch/arm/mach-s5pv210/mach-aquila.c
|
||||||
|
F: arch/arm/mach-s5pv210/mach-goni.c
|
||||||
|
F: arch/arm/mach-exynos4/mach-universal_c210.c
|
||||||
|
F: arch/arm/mach-exynos4/mach-nuri.c
|
||||||
|
|
||||||
ARM/SAMSUNG S5P SERIES FIMC SUPPORT
|
ARM/SAMSUNG S5P SERIES FIMC SUPPORT
|
||||||
M: Kyungmin Park <kyungmin.park@samsung.com>
|
M: Kyungmin Park <kyungmin.park@samsung.com>
|
||||||
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
M: Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||||
|
@ -3520,7 +3529,7 @@ F: drivers/hwmon/jc42.c
|
||||||
F: Documentation/hwmon/jc42
|
F: Documentation/hwmon/jc42
|
||||||
|
|
||||||
JFS FILESYSTEM
|
JFS FILESYSTEM
|
||||||
M: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
|
M: Dave Kleikamp <shaggy@kernel.org>
|
||||||
L: jfs-discussion@lists.sourceforge.net
|
L: jfs-discussion@lists.sourceforge.net
|
||||||
W: http://jfs.sourceforge.net/
|
W: http://jfs.sourceforge.net/
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git
|
||||||
|
@ -5169,6 +5178,7 @@ F: drivers/char/random.c
|
||||||
|
|
||||||
RAPIDIO SUBSYSTEM
|
RAPIDIO SUBSYSTEM
|
||||||
M: Matt Porter <mporter@kernel.crashing.org>
|
M: Matt Porter <mporter@kernel.crashing.org>
|
||||||
|
M: Alexandre Bounine <alexandre.bounine@idt.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: drivers/rapidio/
|
F: drivers/rapidio/
|
||||||
|
|
||||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
||||||
VERSION = 2
|
VERSION = 2
|
||||||
PATCHLEVEL = 6
|
PATCHLEVEL = 6
|
||||||
SUBLEVEL = 38
|
SUBLEVEL = 38
|
||||||
EXTRAVERSION = -rc7
|
EXTRAVERSION = -rc8
|
||||||
NAME = Flesh-Eating Bats with Fangs
|
NAME = Flesh-Eating Bats with Fangs
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
@ -149,6 +149,7 @@ static int
|
||||||
titan_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
|
titan_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
|
||||||
bool force)
|
bool force)
|
||||||
{
|
{
|
||||||
|
unsigned int irq = d->irq;
|
||||||
spin_lock(&titan_irq_lock);
|
spin_lock(&titan_irq_lock);
|
||||||
titan_cpu_set_irq_affinity(irq - 16, *affinity);
|
titan_cpu_set_irq_affinity(irq - 16, *affinity);
|
||||||
titan_update_irq_hw(titan_cached_irq_mask);
|
titan_update_irq_hw(titan_cached_irq_mask);
|
||||||
|
|
|
@ -6,6 +6,8 @@ config ARM_VIC
|
||||||
|
|
||||||
config ARM_VIC_NR
|
config ARM_VIC_NR
|
||||||
int
|
int
|
||||||
|
default 4 if ARCH_S5PV210
|
||||||
|
default 3 if ARCH_S5P6442 || ARCH_S5PC100
|
||||||
default 2
|
default 2
|
||||||
depends on ARM_VIC
|
depends on ARM_VIC
|
||||||
help
|
help
|
||||||
|
|
|
@ -15,10 +15,6 @@ struct meminfo;
|
||||||
struct sys_timer;
|
struct sys_timer;
|
||||||
|
|
||||||
struct machine_desc {
|
struct machine_desc {
|
||||||
/*
|
|
||||||
* Note! The first two elements are used
|
|
||||||
* by assembler code in head.S, head-common.S
|
|
||||||
*/
|
|
||||||
unsigned int nr; /* architecture number */
|
unsigned int nr; /* architecture number */
|
||||||
const char *name; /* architecture name */
|
const char *name; /* architecture name */
|
||||||
unsigned long boot_params; /* tagged list */
|
unsigned long boot_params; /* tagged list */
|
||||||
|
|
|
@ -10,6 +10,8 @@
|
||||||
#ifndef _ASMARM_PGALLOC_H
|
#ifndef _ASMARM_PGALLOC_H
|
||||||
#define _ASMARM_PGALLOC_H
|
#define _ASMARM_PGALLOC_H
|
||||||
|
|
||||||
|
#include <linux/pagemap.h>
|
||||||
|
|
||||||
#include <asm/domain.h>
|
#include <asm/domain.h>
|
||||||
#include <asm/pgtable-hwdef.h>
|
#include <asm/pgtable-hwdef.h>
|
||||||
#include <asm/processor.h>
|
#include <asm/processor.h>
|
||||||
|
|
|
@ -836,9 +836,11 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr,
|
||||||
/*
|
/*
|
||||||
* One-time initialisation.
|
* One-time initialisation.
|
||||||
*/
|
*/
|
||||||
static void reset_ctrl_regs(void *unused)
|
static void reset_ctrl_regs(void *info)
|
||||||
{
|
{
|
||||||
int i;
|
int i, cpu = smp_processor_id();
|
||||||
|
u32 dbg_power;
|
||||||
|
cpumask_t *cpumask = info;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* v7 debug contains save and restore registers so that debug state
|
* v7 debug contains save and restore registers so that debug state
|
||||||
|
@ -849,6 +851,17 @@ static void reset_ctrl_regs(void *unused)
|
||||||
* later on.
|
* later on.
|
||||||
*/
|
*/
|
||||||
if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
|
if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
|
||||||
|
/*
|
||||||
|
* Ensure sticky power-down is clear (i.e. debug logic is
|
||||||
|
* powered up).
|
||||||
|
*/
|
||||||
|
asm volatile("mrc p14, 0, %0, c1, c5, 4" : "=r" (dbg_power));
|
||||||
|
if ((dbg_power & 0x1) == 0) {
|
||||||
|
pr_warning("CPU %d debug is powered down!\n", cpu);
|
||||||
|
cpumask_or(cpumask, cpumask, cpumask_of(cpu));
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Unconditionally clear the lock by writing a value
|
* Unconditionally clear the lock by writing a value
|
||||||
* other than 0xC5ACCE55 to the access register.
|
* other than 0xC5ACCE55 to the access register.
|
||||||
|
@ -887,6 +900,7 @@ static struct notifier_block __cpuinitdata dbg_reset_nb = {
|
||||||
static int __init arch_hw_breakpoint_init(void)
|
static int __init arch_hw_breakpoint_init(void)
|
||||||
{
|
{
|
||||||
u32 dscr;
|
u32 dscr;
|
||||||
|
cpumask_t cpumask = { CPU_BITS_NONE };
|
||||||
|
|
||||||
debug_arch = get_debug_arch();
|
debug_arch = get_debug_arch();
|
||||||
|
|
||||||
|
@ -911,7 +925,13 @@ static int __init arch_hw_breakpoint_init(void)
|
||||||
* Reset the breakpoint resources. We assume that a halting
|
* Reset the breakpoint resources. We assume that a halting
|
||||||
* debugger will leave the world in a nice state for us.
|
* debugger will leave the world in a nice state for us.
|
||||||
*/
|
*/
|
||||||
on_each_cpu(reset_ctrl_regs, NULL, 1);
|
on_each_cpu(reset_ctrl_regs, &cpumask, 1);
|
||||||
|
if (!cpumask_empty(&cpumask)) {
|
||||||
|
core_num_brps = 0;
|
||||||
|
core_num_reserved_brps = 0;
|
||||||
|
core_num_wrps = 0;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
ARM_DBG_READ(c1, 0, dscr);
|
ARM_DBG_READ(c1, 0, dscr);
|
||||||
if (dscr & ARM_DSCR_HDBGEN) {
|
if (dscr & ARM_DSCR_HDBGEN) {
|
||||||
|
|
|
@ -996,10 +996,10 @@ static int ptrace_gethbpregs(struct task_struct *tsk, long num,
|
||||||
while (!(arch_ctrl.len & 0x1))
|
while (!(arch_ctrl.len & 0x1))
|
||||||
arch_ctrl.len >>= 1;
|
arch_ctrl.len >>= 1;
|
||||||
|
|
||||||
if (idx & 0x1)
|
if (num & 0x1)
|
||||||
reg = encode_ctrl_reg(arch_ctrl);
|
|
||||||
else
|
|
||||||
reg = bp->attr.bp_addr;
|
reg = bp->attr.bp_addr;
|
||||||
|
else
|
||||||
|
reg = encode_ctrl_reg(arch_ctrl);
|
||||||
}
|
}
|
||||||
|
|
||||||
put:
|
put:
|
||||||
|
|
|
@ -132,7 +132,7 @@ out:
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __init davinci_cpu_init(struct cpufreq_policy *policy)
|
static int davinci_cpu_init(struct cpufreq_policy *policy)
|
||||||
{
|
{
|
||||||
int result = 0;
|
int result = 0;
|
||||||
struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
|
struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
|
||||||
|
|
|
@ -480,8 +480,15 @@ static struct platform_device da850_mcasp_device = {
|
||||||
.resource = da850_mcasp_resources,
|
.resource = da850_mcasp_resources,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct platform_device davinci_pcm_device = {
|
||||||
|
.name = "davinci-pcm-audio",
|
||||||
|
.id = -1,
|
||||||
|
};
|
||||||
|
|
||||||
void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
|
void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
|
||||||
{
|
{
|
||||||
|
platform_device_register(&davinci_pcm_device);
|
||||||
|
|
||||||
/* DA830/OMAP-L137 has 3 instances of McASP */
|
/* DA830/OMAP-L137 has 3 instances of McASP */
|
||||||
if (cpu_is_davinci_da830() && id == 1) {
|
if (cpu_is_davinci_da830() && id == 1) {
|
||||||
da830_mcasp1_device.dev.platform_data = pdata;
|
da830_mcasp1_device.dev.platform_data = pdata;
|
||||||
|
|
|
@ -58,7 +58,7 @@ static int tnetv107x_gpio_request(struct gpio_chip *chip, unsigned offset)
|
||||||
|
|
||||||
spin_lock_irqsave(&ctlr->lock, flags);
|
spin_lock_irqsave(&ctlr->lock, flags);
|
||||||
|
|
||||||
gpio_reg_set_bit(®s->enable, gpio);
|
gpio_reg_set_bit(regs->enable, gpio);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&ctlr->lock, flags);
|
spin_unlock_irqrestore(&ctlr->lock, flags);
|
||||||
|
|
||||||
|
@ -74,7 +74,7 @@ static void tnetv107x_gpio_free(struct gpio_chip *chip, unsigned offset)
|
||||||
|
|
||||||
spin_lock_irqsave(&ctlr->lock, flags);
|
spin_lock_irqsave(&ctlr->lock, flags);
|
||||||
|
|
||||||
gpio_reg_clear_bit(®s->enable, gpio);
|
gpio_reg_clear_bit(regs->enable, gpio);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&ctlr->lock, flags);
|
spin_unlock_irqrestore(&ctlr->lock, flags);
|
||||||
}
|
}
|
||||||
|
@ -88,7 +88,7 @@ static int tnetv107x_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
|
||||||
|
|
||||||
spin_lock_irqsave(&ctlr->lock, flags);
|
spin_lock_irqsave(&ctlr->lock, flags);
|
||||||
|
|
||||||
gpio_reg_set_bit(®s->direction, gpio);
|
gpio_reg_set_bit(regs->direction, gpio);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&ctlr->lock, flags);
|
spin_unlock_irqrestore(&ctlr->lock, flags);
|
||||||
|
|
||||||
|
@ -106,11 +106,11 @@ static int tnetv107x_gpio_dir_out(struct gpio_chip *chip,
|
||||||
spin_lock_irqsave(&ctlr->lock, flags);
|
spin_lock_irqsave(&ctlr->lock, flags);
|
||||||
|
|
||||||
if (value)
|
if (value)
|
||||||
gpio_reg_set_bit(®s->data_out, gpio);
|
gpio_reg_set_bit(regs->data_out, gpio);
|
||||||
else
|
else
|
||||||
gpio_reg_clear_bit(®s->data_out, gpio);
|
gpio_reg_clear_bit(regs->data_out, gpio);
|
||||||
|
|
||||||
gpio_reg_clear_bit(®s->direction, gpio);
|
gpio_reg_clear_bit(regs->direction, gpio);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&ctlr->lock, flags);
|
spin_unlock_irqrestore(&ctlr->lock, flags);
|
||||||
|
|
||||||
|
@ -124,7 +124,7 @@ static int tnetv107x_gpio_get(struct gpio_chip *chip, unsigned offset)
|
||||||
unsigned gpio = chip->base + offset;
|
unsigned gpio = chip->base + offset;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = gpio_reg_get_bit(®s->data_in, gpio);
|
ret = gpio_reg_get_bit(regs->data_in, gpio);
|
||||||
|
|
||||||
return ret ? 1 : 0;
|
return ret ? 1 : 0;
|
||||||
}
|
}
|
||||||
|
@ -140,9 +140,9 @@ static void tnetv107x_gpio_set(struct gpio_chip *chip,
|
||||||
spin_lock_irqsave(&ctlr->lock, flags);
|
spin_lock_irqsave(&ctlr->lock, flags);
|
||||||
|
|
||||||
if (value)
|
if (value)
|
||||||
gpio_reg_set_bit(®s->data_out, gpio);
|
gpio_reg_set_bit(regs->data_out, gpio);
|
||||||
else
|
else
|
||||||
gpio_reg_clear_bit(®s->data_out, gpio);
|
gpio_reg_clear_bit(regs->data_out, gpio);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&ctlr->lock, flags);
|
spin_unlock_irqrestore(&ctlr->lock, flags);
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,6 +1,8 @@
|
||||||
#ifndef __MACH_CLKDEV_H
|
#ifndef __MACH_CLKDEV_H
|
||||||
#define __MACH_CLKDEV_H
|
#define __MACH_CLKDEV_H
|
||||||
|
|
||||||
|
struct clk;
|
||||||
|
|
||||||
static inline int __clk_get(struct clk *clk)
|
static inline int __clk_get(struct clk *clk)
|
||||||
{
|
{
|
||||||
return 1;
|
return 1;
|
||||||
|
|
|
@ -193,10 +193,12 @@ static void omap2_mbox_disable_irq(struct omap_mbox *mbox,
|
||||||
omap_mbox_type_t irq)
|
omap_mbox_type_t irq)
|
||||||
{
|
{
|
||||||
struct omap_mbox2_priv *p = mbox->priv;
|
struct omap_mbox2_priv *p = mbox->priv;
|
||||||
u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
|
u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit;
|
||||||
l = mbox_read_reg(p->irqdisable);
|
|
||||||
l &= ~bit;
|
if (!cpu_is_omap44xx())
|
||||||
mbox_write_reg(l, p->irqdisable);
|
bit = mbox_read_reg(p->irqdisable) & ~bit;
|
||||||
|
|
||||||
|
mbox_write_reg(bit, p->irqdisable);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
|
static void omap2_mbox_ack_irq(struct omap_mbox *mbox,
|
||||||
|
|
|
@ -282,6 +282,7 @@ error:
|
||||||
dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
|
dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
|
||||||
"interrupt handler. Smartreflex will"
|
"interrupt handler. Smartreflex will"
|
||||||
"not function as desired\n", __func__);
|
"not function as desired\n", __func__);
|
||||||
|
kfree(name);
|
||||||
kfree(sr_info);
|
kfree(sr_info);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -879,7 +880,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
|
||||||
ret = sr_late_init(sr_info);
|
ret = sr_late_init(sr_info);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
pr_warning("%s: Error in SR late init\n", __func__);
|
pr_warning("%s: Error in SR late init\n", __func__);
|
||||||
return ret;
|
goto err_release_region;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -890,14 +891,17 @@ static int __init omap_sr_probe(struct platform_device *pdev)
|
||||||
* not try to create rest of the debugfs entries.
|
* not try to create rest of the debugfs entries.
|
||||||
*/
|
*/
|
||||||
vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm);
|
vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm);
|
||||||
if (!vdd_dbg_dir)
|
if (!vdd_dbg_dir) {
|
||||||
return -EINVAL;
|
ret = -EINVAL;
|
||||||
|
goto err_release_region;
|
||||||
|
}
|
||||||
|
|
||||||
dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir);
|
dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir);
|
||||||
if (IS_ERR(dbg_dir)) {
|
if (IS_ERR(dbg_dir)) {
|
||||||
dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
|
dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
|
||||||
__func__);
|
__func__);
|
||||||
return PTR_ERR(dbg_dir);
|
ret = PTR_ERR(dbg_dir);
|
||||||
|
goto err_release_region;
|
||||||
}
|
}
|
||||||
|
|
||||||
(void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir,
|
(void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, dbg_dir,
|
||||||
|
@ -913,7 +917,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
|
||||||
if (IS_ERR(nvalue_dir)) {
|
if (IS_ERR(nvalue_dir)) {
|
||||||
dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
|
dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
|
||||||
"for n-values\n", __func__);
|
"for n-values\n", __func__);
|
||||||
return PTR_ERR(nvalue_dir);
|
ret = PTR_ERR(nvalue_dir);
|
||||||
|
goto err_release_region;
|
||||||
}
|
}
|
||||||
|
|
||||||
omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
|
omap_voltage_get_volttable(sr_info->voltdm, &volt_data);
|
||||||
|
@ -922,23 +927,15 @@ static int __init omap_sr_probe(struct platform_device *pdev)
|
||||||
" corresponding vdd vdd_%s. Cannot create debugfs"
|
" corresponding vdd vdd_%s. Cannot create debugfs"
|
||||||
"entries for n-values\n",
|
"entries for n-values\n",
|
||||||
__func__, sr_info->voltdm->name);
|
__func__, sr_info->voltdm->name);
|
||||||
return -ENODATA;
|
ret = -ENODATA;
|
||||||
|
goto err_release_region;
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < sr_info->nvalue_count; i++) {
|
for (i = 0; i < sr_info->nvalue_count; i++) {
|
||||||
char *name;
|
char name[NVALUE_NAME_LEN + 1];
|
||||||
char volt_name[32];
|
|
||||||
|
|
||||||
name = kzalloc(NVALUE_NAME_LEN + 1, GFP_KERNEL);
|
snprintf(name, sizeof(name), "volt_%d",
|
||||||
if (!name) {
|
volt_data[i].volt_nominal);
|
||||||
dev_err(&pdev->dev, "%s: Unable to allocate memory"
|
|
||||||
" for n-value directory name\n", __func__);
|
|
||||||
return -ENOMEM;
|
|
||||||
}
|
|
||||||
|
|
||||||
strcpy(name, "volt_");
|
|
||||||
sprintf(volt_name, "%d", volt_data[i].volt_nominal);
|
|
||||||
strcat(name, volt_name);
|
|
||||||
(void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
|
(void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
|
||||||
&(sr_info->nvalue_table[i].nvalue));
|
&(sr_info->nvalue_table[i].nvalue));
|
||||||
}
|
}
|
||||||
|
|
|
@ -347,6 +347,7 @@ static struct platform_device *pxa25x_devices[] __initdata = {
|
||||||
&pxa25x_device_assp,
|
&pxa25x_device_assp,
|
||||||
&pxa25x_device_pwm0,
|
&pxa25x_device_pwm0,
|
||||||
&pxa25x_device_pwm1,
|
&pxa25x_device_pwm1,
|
||||||
|
&pxa_device_asoc_platform,
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct sys_device pxa25x_sysdev[] = {
|
static struct sys_device pxa25x_sysdev[] = {
|
||||||
|
|
|
@ -81,8 +81,6 @@ static int tosa_bt_probe(struct platform_device *dev)
|
||||||
goto err_rfk_alloc;
|
goto err_rfk_alloc;
|
||||||
}
|
}
|
||||||
|
|
||||||
rfkill_set_led_trigger_name(rfk, "tosa-bt");
|
|
||||||
|
|
||||||
rc = rfkill_register(rfk);
|
rc = rfkill_register(rfk);
|
||||||
if (rc)
|
if (rc)
|
||||||
goto err_rfkill;
|
goto err_rfkill;
|
||||||
|
|
|
@ -875,6 +875,11 @@ static struct platform_device sharpsl_rom_device = {
|
||||||
.dev.platform_data = &sharpsl_rom_data,
|
.dev.platform_data = &sharpsl_rom_data,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static struct platform_device wm9712_device = {
|
||||||
|
.name = "wm9712-codec",
|
||||||
|
.id = -1,
|
||||||
|
};
|
||||||
|
|
||||||
static struct platform_device *devices[] __initdata = {
|
static struct platform_device *devices[] __initdata = {
|
||||||
&tosascoop_device,
|
&tosascoop_device,
|
||||||
&tosascoop_jc_device,
|
&tosascoop_jc_device,
|
||||||
|
@ -885,6 +890,7 @@ static struct platform_device *devices[] __initdata = {
|
||||||
&tosaled_device,
|
&tosaled_device,
|
||||||
&tosa_bt_device,
|
&tosa_bt_device,
|
||||||
&sharpsl_rom_device,
|
&sharpsl_rom_device,
|
||||||
|
&wm9712_device,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void tosa_poweroff(void)
|
static void tosa_poweroff(void)
|
||||||
|
|
|
@ -99,6 +99,7 @@ config MACH_NEO1973_GTA02
|
||||||
select POWER_SUPPLY
|
select POWER_SUPPLY
|
||||||
select MACH_NEO1973
|
select MACH_NEO1973
|
||||||
select S3C2410_PWM
|
select S3C2410_PWM
|
||||||
|
select S3C_DEV_USB_HOST
|
||||||
help
|
help
|
||||||
Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
|
Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
|
||||||
|
|
||||||
|
|
|
@ -44,19 +44,19 @@
|
||||||
#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */
|
#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG(10) /* v3 + v4 only */
|
||||||
#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */
|
#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG(11) /* v3 + v4 only */
|
||||||
|
|
||||||
#define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */
|
#define GTA02_GPIO_AMP_SHUT S3C2410_GPJ(1) /* v2 + v3 + v4 only */
|
||||||
#define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2
|
#define GTA02v1_GPIO_WLAN_GPIO10 S3C2410_GPJ(2)
|
||||||
#define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */
|
#define GTA02_GPIO_HP_IN S3C2410_GPJ(2) /* v2 + v3 + v4 only */
|
||||||
#define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */
|
#define GTA02_GPIO_INT0 S3C2410_GPJ(3) /* v2 + v3 + v4 only */
|
||||||
#define GTA02_GPIO_nGSM_EN S3C2440_GPJ4
|
#define GTA02_GPIO_nGSM_EN S3C2410_GPJ(4)
|
||||||
#define GTA02_GPIO_3D_RESET S3C2440_GPJ5
|
#define GTA02_GPIO_3D_RESET S3C2410_GPJ(5)
|
||||||
#define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */
|
#define GTA02_GPIO_nDL_GSM S3C2410_GPJ(6) /* v4 + v5 only */
|
||||||
#define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7
|
#define GTA02_GPIO_WLAN_GPIO0 S3C2410_GPJ(7)
|
||||||
#define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8
|
#define GTA02v1_GPIO_BAT_ID S3C2410_GPJ(8)
|
||||||
#define GTA02_GPIO_KEEPACT S3C2440_GPJ8
|
#define GTA02_GPIO_KEEPACT S3C2410_GPJ(8)
|
||||||
#define GTA02v1_GPIO_HP_IN S3C2440_GPJ10
|
#define GTA02v1_GPIO_HP_IN S3C2410_GPJ(10)
|
||||||
#define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */
|
#define GTA02_CHIP_PWD S3C2410_GPJ(11) /* v2 + v3 + v4 only */
|
||||||
#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */
|
#define GTA02_GPIO_nWLAN_RESET S3C2410_GPJ(12) /* v2 + v3 + v4 only */
|
||||||
|
|
||||||
#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
|
#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0
|
||||||
#define GTA02_IRQ_MODEM IRQ_EINT1
|
#define GTA02_IRQ_MODEM IRQ_EINT1
|
||||||
|
|
|
@ -150,6 +150,12 @@ static struct clk init_clocks_off[] = {
|
||||||
.parent = &clk_p,
|
.parent = &clk_p,
|
||||||
.enable = s3c64xx_pclk_ctrl,
|
.enable = s3c64xx_pclk_ctrl,
|
||||||
.ctrlbit = S3C_CLKCON_PCLK_IIC,
|
.ctrlbit = S3C_CLKCON_PCLK_IIC,
|
||||||
|
}, {
|
||||||
|
.name = "i2c",
|
||||||
|
.id = 1,
|
||||||
|
.parent = &clk_p,
|
||||||
|
.enable = s3c64xx_pclk_ctrl,
|
||||||
|
.ctrlbit = S3C6410_CLKCON_PCLK_I2C1,
|
||||||
}, {
|
}, {
|
||||||
.name = "iis",
|
.name = "iis",
|
||||||
.id = 0,
|
.id = 0,
|
||||||
|
|
|
@ -690,12 +690,12 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
|
||||||
|
|
||||||
regptr = regs + PL080_Cx_BASE(0);
|
regptr = regs + PL080_Cx_BASE(0);
|
||||||
|
|
||||||
for (ch = 0; ch < 8; ch++, chno++, chptr++) {
|
for (ch = 0; ch < 8; ch++, chptr++) {
|
||||||
printk(KERN_INFO "%s: registering DMA %d (%p)\n",
|
pr_debug("%s: registering DMA %d (%p)\n",
|
||||||
__func__, chno, regptr);
|
__func__, chno + ch, regptr);
|
||||||
|
|
||||||
chptr->bit = 1 << ch;
|
chptr->bit = 1 << ch;
|
||||||
chptr->number = chno;
|
chptr->number = chno + ch;
|
||||||
chptr->dmac = dmac;
|
chptr->dmac = dmac;
|
||||||
chptr->regs = regptr;
|
chptr->regs = regptr;
|
||||||
regptr += PL080_Cx_STRIDE;
|
regptr += PL080_Cx_STRIDE;
|
||||||
|
@ -704,7 +704,8 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
|
||||||
/* for the moment, permanently enable the controller */
|
/* for the moment, permanently enable the controller */
|
||||||
writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG);
|
writel(PL080_CONFIG_ENABLE, regs + PL080_CONFIG);
|
||||||
|
|
||||||
printk(KERN_INFO "PL080: IRQ %d, at %p\n", irq, regs);
|
printk(KERN_INFO "PL080: IRQ %d, at %p, channels %d..%d\n",
|
||||||
|
irq, regs, chno, chno+8);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
|
|
@ -72,7 +72,7 @@ static struct s3c_gpio_cfg gpio_4bit_cfg_eint0011 = {
|
||||||
.get_pull = s3c_gpio_getpull_updown,
|
.get_pull = s3c_gpio_getpull_updown,
|
||||||
};
|
};
|
||||||
|
|
||||||
int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
|
static int s3c64xx_gpio2int_gpm(struct gpio_chip *chip, unsigned pin)
|
||||||
{
|
{
|
||||||
return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;
|
return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO;
|
||||||
}
|
}
|
||||||
|
@ -138,7 +138,7 @@ static struct s3c_gpio_chip gpio_4bit[] = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
|
static int s3c64xx_gpio2int_gpl(struct gpio_chip *chip, unsigned pin)
|
||||||
{
|
{
|
||||||
return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;
|
return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO;
|
||||||
}
|
}
|
||||||
|
|
|
@ -28,6 +28,7 @@
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
#include <linux/smsc911x.h>
|
#include <linux/smsc911x.h>
|
||||||
#include <linux/regulator/fixed.h>
|
#include <linux/regulator/fixed.h>
|
||||||
|
#include <linux/regulator/machine.h>
|
||||||
|
|
||||||
#ifdef CONFIG_SMDK6410_WM1190_EV1
|
#ifdef CONFIG_SMDK6410_WM1190_EV1
|
||||||
#include <linux/mfd/wm8350/core.h>
|
#include <linux/mfd/wm8350/core.h>
|
||||||
|
@ -351,7 +352,7 @@ static struct regulator_init_data smdk6410_vddpll = {
|
||||||
/* VDD_UH_MMC, LDO5 on J5 */
|
/* VDD_UH_MMC, LDO5 on J5 */
|
||||||
static struct regulator_init_data smdk6410_vdduh_mmc = {
|
static struct regulator_init_data smdk6410_vdduh_mmc = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.name = "PVDD_UH/PVDD_MMC",
|
.name = "PVDD_UH+PVDD_MMC",
|
||||||
.always_on = 1,
|
.always_on = 1,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
@ -417,7 +418,7 @@ static struct regulator_init_data smdk6410_vddaudio = {
|
||||||
/* S3C64xx internal logic & PLL */
|
/* S3C64xx internal logic & PLL */
|
||||||
static struct regulator_init_data wm8350_dcdc1_data = {
|
static struct regulator_init_data wm8350_dcdc1_data = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.name = "PVDD_INT/PVDD_PLL",
|
.name = "PVDD_INT+PVDD_PLL",
|
||||||
.min_uV = 1200000,
|
.min_uV = 1200000,
|
||||||
.max_uV = 1200000,
|
.max_uV = 1200000,
|
||||||
.always_on = 1,
|
.always_on = 1,
|
||||||
|
@ -452,7 +453,7 @@ static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
|
||||||
|
|
||||||
static struct regulator_init_data wm8350_dcdc4_data = {
|
static struct regulator_init_data wm8350_dcdc4_data = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
|
.name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
|
||||||
.min_uV = 3000000,
|
.min_uV = 3000000,
|
||||||
.max_uV = 3000000,
|
.max_uV = 3000000,
|
||||||
.always_on = 1,
|
.always_on = 1,
|
||||||
|
@ -464,7 +465,7 @@ static struct regulator_init_data wm8350_dcdc4_data = {
|
||||||
/* OTGi/1190-EV1 HPVDD & AVDD */
|
/* OTGi/1190-EV1 HPVDD & AVDD */
|
||||||
static struct regulator_init_data wm8350_ldo4_data = {
|
static struct regulator_init_data wm8350_ldo4_data = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.name = "PVDD_OTGI/HPVDD/AVDD",
|
.name = "PVDD_OTGI+HPVDD+AVDD",
|
||||||
.min_uV = 1200000,
|
.min_uV = 1200000,
|
||||||
.max_uV = 1200000,
|
.max_uV = 1200000,
|
||||||
.apply_uV = 1,
|
.apply_uV = 1,
|
||||||
|
@ -552,7 +553,7 @@ static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
|
||||||
|
|
||||||
static struct regulator_init_data wm1192_dcdc3 = {
|
static struct regulator_init_data wm1192_dcdc3 = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.name = "PVDD_MEM/PVDD_GPS",
|
.name = "PVDD_MEM+PVDD_GPS",
|
||||||
.always_on = 1,
|
.always_on = 1,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
@ -563,7 +564,7 @@ static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
|
||||||
|
|
||||||
static struct regulator_init_data wm1192_ldo1 = {
|
static struct regulator_init_data wm1192_ldo1 = {
|
||||||
.constraints = {
|
.constraints = {
|
||||||
.name = "PVDD_LCD/PVDD_EXT",
|
.name = "PVDD_LCD+PVDD_EXT",
|
||||||
.always_on = 1,
|
.always_on = 1,
|
||||||
},
|
},
|
||||||
.consumer_supplies = wm1192_ldo1_consumers,
|
.consumer_supplies = wm1192_ldo1_consumers,
|
||||||
|
|
|
@ -17,7 +17,7 @@
|
||||||
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
|
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
|
||||||
{
|
{
|
||||||
/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
|
/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
|
||||||
s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
|
s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3));
|
||||||
|
|
||||||
/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
|
/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
|
||||||
s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
|
s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
|
||||||
|
|
|
@ -56,7 +56,7 @@ void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
|
||||||
else
|
else
|
||||||
ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
|
ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
|
||||||
|
|
||||||
printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
|
pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
|
||||||
writel(ctrl2, r + S3C_SDHCI_CONTROL2);
|
writel(ctrl2, r + S3C_SDHCI_CONTROL2);
|
||||||
writel(ctrl3, r + S3C_SDHCI_CONTROL3);
|
writel(ctrl3, r + S3C_SDHCI_CONTROL3);
|
||||||
}
|
}
|
||||||
|
|
|
@ -23,7 +23,7 @@
|
||||||
#define S5P6440_GPIO_A_NR (6)
|
#define S5P6440_GPIO_A_NR (6)
|
||||||
#define S5P6440_GPIO_B_NR (7)
|
#define S5P6440_GPIO_B_NR (7)
|
||||||
#define S5P6440_GPIO_C_NR (8)
|
#define S5P6440_GPIO_C_NR (8)
|
||||||
#define S5P6440_GPIO_F_NR (2)
|
#define S5P6440_GPIO_F_NR (16)
|
||||||
#define S5P6440_GPIO_G_NR (7)
|
#define S5P6440_GPIO_G_NR (7)
|
||||||
#define S5P6440_GPIO_H_NR (10)
|
#define S5P6440_GPIO_H_NR (10)
|
||||||
#define S5P6440_GPIO_I_NR (16)
|
#define S5P6440_GPIO_I_NR (16)
|
||||||
|
@ -36,7 +36,7 @@
|
||||||
#define S5P6450_GPIO_B_NR (7)
|
#define S5P6450_GPIO_B_NR (7)
|
||||||
#define S5P6450_GPIO_C_NR (8)
|
#define S5P6450_GPIO_C_NR (8)
|
||||||
#define S5P6450_GPIO_D_NR (8)
|
#define S5P6450_GPIO_D_NR (8)
|
||||||
#define S5P6450_GPIO_F_NR (2)
|
#define S5P6450_GPIO_F_NR (16)
|
||||||
#define S5P6450_GPIO_G_NR (14)
|
#define S5P6450_GPIO_G_NR (14)
|
||||||
#define S5P6450_GPIO_H_NR (10)
|
#define S5P6450_GPIO_H_NR (10)
|
||||||
#define S5P6450_GPIO_I_NR (16)
|
#define S5P6450_GPIO_I_NR (16)
|
||||||
|
|
|
@ -454,6 +454,7 @@ static void __init ag5evm_init(void)
|
||||||
gpio_direction_output(GPIO_PORT217, 0);
|
gpio_direction_output(GPIO_PORT217, 0);
|
||||||
mdelay(1);
|
mdelay(1);
|
||||||
gpio_set_value(GPIO_PORT217, 1);
|
gpio_set_value(GPIO_PORT217, 1);
|
||||||
|
mdelay(100);
|
||||||
|
|
||||||
/* LCD backlight controller */
|
/* LCD backlight controller */
|
||||||
gpio_request(GPIO_PORT235, NULL); /* RESET */
|
gpio_request(GPIO_PORT235, NULL); /* RESET */
|
||||||
|
|
|
@ -1303,7 +1303,7 @@ static void __init ap4evb_init(void)
|
||||||
|
|
||||||
lcdc_info.clock_source = LCDC_CLK_BUS;
|
lcdc_info.clock_source = LCDC_CLK_BUS;
|
||||||
lcdc_info.ch[0].interface_type = RGB18;
|
lcdc_info.ch[0].interface_type = RGB18;
|
||||||
lcdc_info.ch[0].clock_divider = 2;
|
lcdc_info.ch[0].clock_divider = 3;
|
||||||
lcdc_info.ch[0].flags = 0;
|
lcdc_info.ch[0].flags = 0;
|
||||||
lcdc_info.ch[0].lcd_size_cfg.width = 152;
|
lcdc_info.ch[0].lcd_size_cfg.width = 152;
|
||||||
lcdc_info.ch[0].lcd_size_cfg.height = 91;
|
lcdc_info.ch[0].lcd_size_cfg.height = 91;
|
||||||
|
|
|
@ -303,7 +303,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
|
||||||
.lcd_cfg = mackerel_lcdc_modes,
|
.lcd_cfg = mackerel_lcdc_modes,
|
||||||
.num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
|
.num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
|
||||||
.interface_type = RGB24,
|
.interface_type = RGB24,
|
||||||
.clock_divider = 2,
|
.clock_divider = 3,
|
||||||
.flags = 0,
|
.flags = 0,
|
||||||
.lcd_size_cfg.width = 152,
|
.lcd_size_cfg.width = 152,
|
||||||
.lcd_size_cfg.height = 91,
|
.lcd_size_cfg.height = 91,
|
||||||
|
|
|
@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
enum { MSTP001,
|
enum { MSTP001,
|
||||||
MSTP125, MSTP118, MSTP116, MSTP100,
|
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
|
||||||
MSTP219,
|
MSTP219,
|
||||||
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
||||||
MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
|
MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
|
||||||
|
@ -275,6 +275,10 @@ enum { MSTP001,
|
||||||
|
|
||||||
static struct clk mstp_clks[MSTP_NR] = {
|
static struct clk mstp_clks[MSTP_NR] = {
|
||||||
[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
|
[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
|
||||||
|
[MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* CEU1 */
|
||||||
|
[MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* CSI2-RX1 */
|
||||||
|
[MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU0 */
|
||||||
|
[MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2-RX0 */
|
||||||
[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
|
[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
|
||||||
[MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
|
[MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
|
||||||
[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
|
[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
|
||||||
|
@ -306,6 +310,9 @@ static struct clk_lookup lookups[] = {
|
||||||
CLKDEV_CON_ID("r_clk", &r_clk),
|
CLKDEV_CON_ID("r_clk", &r_clk),
|
||||||
|
|
||||||
/* DIV6 clocks */
|
/* DIV6 clocks */
|
||||||
|
CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
|
||||||
|
CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
|
||||||
|
CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
|
||||||
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
|
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
|
||||||
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
|
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
|
||||||
CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
|
CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
|
||||||
|
@ -313,11 +320,15 @@ static struct clk_lookup lookups[] = {
|
||||||
|
|
||||||
/* MSTP32 clocks */
|
/* MSTP32 clocks */
|
||||||
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
|
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
|
||||||
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
|
CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */
|
||||||
|
CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
|
||||||
|
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
|
||||||
|
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
|
||||||
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
|
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
|
||||||
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
|
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
|
||||||
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
|
|
||||||
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
|
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
|
||||||
|
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
|
||||||
|
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
|
||||||
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
|
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
|
||||||
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
|
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
|
||||||
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
|
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
|
||||||
|
|
|
@ -6,13 +6,10 @@ LIST "RWT Setting"
|
||||||
EW 0xE6020004, 0xA500
|
EW 0xE6020004, 0xA500
|
||||||
EW 0xE6030004, 0xA500
|
EW 0xE6030004, 0xA500
|
||||||
|
|
||||||
DD 0x01001000, 0x01001000
|
|
||||||
|
|
||||||
LIST "GPIO Setting"
|
LIST "GPIO Setting"
|
||||||
EB 0xE6051013, 0xA2
|
EB 0xE6051013, 0xA2
|
||||||
|
|
||||||
LIST "CPG"
|
LIST "CPG"
|
||||||
ED 0xE6150080, 0x00000180
|
|
||||||
ED 0xE61500C0, 0x00000002
|
ED 0xE61500C0, 0x00000002
|
||||||
|
|
||||||
WAIT 1, 0xFE40009C
|
WAIT 1, 0xFE40009C
|
||||||
|
@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040
|
||||||
|
|
||||||
WAIT 1, 0xFE40009C
|
WAIT 1, 0xFE40009C
|
||||||
|
|
||||||
|
LIST "SUB/USBClk"
|
||||||
|
ED 0xE6150080, 0x00000180
|
||||||
|
|
||||||
LIST "BSC"
|
LIST "BSC"
|
||||||
ED 0xFEC10000, 0x00E0001B
|
ED 0xFEC10000, 0x00E0001B
|
||||||
|
|
||||||
|
@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505
|
||||||
ED 0xFE40004C, 0x00110209
|
ED 0xFE40004C, 0x00110209
|
||||||
ED 0xFE400010, 0x00000087
|
ED 0xFE400010, 0x00000087
|
||||||
|
|
||||||
WAIT 10, 0xFE40009C
|
WAIT 30, 0xFE40009C
|
||||||
|
|
||||||
ED 0xFE400084, 0x0000003F
|
ED 0xFE400084, 0x0000003F
|
||||||
EB 0xFE500000, 0x00
|
EB 0xFE500000, 0x00
|
||||||
|
@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050
|
||||||
|
|
||||||
WAIT 1, 0xFE40009C
|
WAIT 1, 0xFE40009C
|
||||||
|
|
||||||
ED 0xE6150354, 0x00000002
|
ED 0xFE400354, 0x01AD8002
|
||||||
|
|
||||||
LIST "SCIF0 - Serial port for earlyprintk"
|
LIST "SCIF0 - Serial port for earlyprintk"
|
||||||
EB 0xE6053098, 0x11
|
EB 0xE6053098, 0x11
|
||||||
|
|
|
@ -6,13 +6,10 @@ LIST "RWT Setting"
|
||||||
EW 0xE6020004, 0xA500
|
EW 0xE6020004, 0xA500
|
||||||
EW 0xE6030004, 0xA500
|
EW 0xE6030004, 0xA500
|
||||||
|
|
||||||
DD 0x01001000, 0x01001000
|
|
||||||
|
|
||||||
LIST "GPIO Setting"
|
LIST "GPIO Setting"
|
||||||
EB 0xE6051013, 0xA2
|
EB 0xE6051013, 0xA2
|
||||||
|
|
||||||
LIST "CPG"
|
LIST "CPG"
|
||||||
ED 0xE6150080, 0x00000180
|
|
||||||
ED 0xE61500C0, 0x00000002
|
ED 0xE61500C0, 0x00000002
|
||||||
|
|
||||||
WAIT 1, 0xFE40009C
|
WAIT 1, 0xFE40009C
|
||||||
|
@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040
|
||||||
|
|
||||||
WAIT 1, 0xFE40009C
|
WAIT 1, 0xFE40009C
|
||||||
|
|
||||||
|
LIST "SUB/USBClk"
|
||||||
|
ED 0xE6150080, 0x00000180
|
||||||
|
|
||||||
LIST "BSC"
|
LIST "BSC"
|
||||||
ED 0xFEC10000, 0x00E0001B
|
ED 0xFEC10000, 0x00E0001B
|
||||||
|
|
||||||
|
@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505
|
||||||
ED 0xFE40004C, 0x00110209
|
ED 0xFE40004C, 0x00110209
|
||||||
ED 0xFE400010, 0x00000087
|
ED 0xFE400010, 0x00000087
|
||||||
|
|
||||||
WAIT 10, 0xFE40009C
|
WAIT 30, 0xFE40009C
|
||||||
|
|
||||||
ED 0xFE400084, 0x0000003F
|
ED 0xFE400084, 0x0000003F
|
||||||
EB 0xFE500000, 0x00
|
EB 0xFE500000, 0x00
|
||||||
|
@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050
|
||||||
|
|
||||||
WAIT 1, 0xFE40009C
|
WAIT 1, 0xFE40009C
|
||||||
|
|
||||||
ED 0xE6150354, 0x00000002
|
ED 0xFE400354, 0x01AD8002
|
||||||
|
|
||||||
LIST "SCIF0 - Serial port for earlyprintk"
|
LIST "SCIF0 - Serial port for earlyprintk"
|
||||||
EB 0xE6053098, 0x11
|
EB 0xE6053098, 0x11
|
||||||
|
|
|
@ -15,6 +15,8 @@
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
|
|
||||||
|
#include <plat/devs.h>
|
||||||
|
|
||||||
/* uart devices */
|
/* uart devices */
|
||||||
|
|
||||||
static struct platform_device s3c24xx_uart_device0 = {
|
static struct platform_device s3c24xx_uart_device0 = {
|
||||||
|
|
|
@ -13,6 +13,8 @@
|
||||||
.align 2
|
.align 2
|
||||||
|
|
||||||
ENTRY(_outsl)
|
ENTRY(_outsl)
|
||||||
|
CC = R2 == 0;
|
||||||
|
IF CC JUMP 1f;
|
||||||
P0 = R0; /* P0 = port */
|
P0 = R0; /* P0 = port */
|
||||||
P1 = R1; /* P1 = address */
|
P1 = R1; /* P1 = address */
|
||||||
P2 = R2; /* P2 = count */
|
P2 = R2; /* P2 = count */
|
||||||
|
@ -20,10 +22,12 @@ ENTRY(_outsl)
|
||||||
LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
|
LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
|
||||||
.Llong_loop_s: R0 = [P1++];
|
.Llong_loop_s: R0 = [P1++];
|
||||||
.Llong_loop_e: [P0] = R0;
|
.Llong_loop_e: [P0] = R0;
|
||||||
RTS;
|
1: RTS;
|
||||||
ENDPROC(_outsl)
|
ENDPROC(_outsl)
|
||||||
|
|
||||||
ENTRY(_outsw)
|
ENTRY(_outsw)
|
||||||
|
CC = R2 == 0;
|
||||||
|
IF CC JUMP 1f;
|
||||||
P0 = R0; /* P0 = port */
|
P0 = R0; /* P0 = port */
|
||||||
P1 = R1; /* P1 = address */
|
P1 = R1; /* P1 = address */
|
||||||
P2 = R2; /* P2 = count */
|
P2 = R2; /* P2 = count */
|
||||||
|
@ -31,10 +35,12 @@ ENTRY(_outsw)
|
||||||
LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
|
LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
|
||||||
.Lword_loop_s: R0 = W[P1++];
|
.Lword_loop_s: R0 = W[P1++];
|
||||||
.Lword_loop_e: W[P0] = R0;
|
.Lword_loop_e: W[P0] = R0;
|
||||||
RTS;
|
1: RTS;
|
||||||
ENDPROC(_outsw)
|
ENDPROC(_outsw)
|
||||||
|
|
||||||
ENTRY(_outsb)
|
ENTRY(_outsb)
|
||||||
|
CC = R2 == 0;
|
||||||
|
IF CC JUMP 1f;
|
||||||
P0 = R0; /* P0 = port */
|
P0 = R0; /* P0 = port */
|
||||||
P1 = R1; /* P1 = address */
|
P1 = R1; /* P1 = address */
|
||||||
P2 = R2; /* P2 = count */
|
P2 = R2; /* P2 = count */
|
||||||
|
@ -42,10 +48,12 @@ ENTRY(_outsb)
|
||||||
LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
|
LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
|
||||||
.Lbyte_loop_s: R0 = B[P1++];
|
.Lbyte_loop_s: R0 = B[P1++];
|
||||||
.Lbyte_loop_e: B[P0] = R0;
|
.Lbyte_loop_e: B[P0] = R0;
|
||||||
RTS;
|
1: RTS;
|
||||||
ENDPROC(_outsb)
|
ENDPROC(_outsb)
|
||||||
|
|
||||||
ENTRY(_outsw_8)
|
ENTRY(_outsw_8)
|
||||||
|
CC = R2 == 0;
|
||||||
|
IF CC JUMP 1f;
|
||||||
P0 = R0; /* P0 = port */
|
P0 = R0; /* P0 = port */
|
||||||
P1 = R1; /* P1 = address */
|
P1 = R1; /* P1 = address */
|
||||||
P2 = R2; /* P2 = count */
|
P2 = R2; /* P2 = count */
|
||||||
|
@ -56,5 +64,5 @@ ENTRY(_outsw_8)
|
||||||
R0 = R0 << 8;
|
R0 = R0 << 8;
|
||||||
R0 = R0 + R1;
|
R0 = R0 + R1;
|
||||||
.Lword8_loop_e: W[P0] = R0;
|
.Lword8_loop_e: W[P0] = R0;
|
||||||
RTS;
|
1: RTS;
|
||||||
ENDPROC(_outsw_8)
|
ENDPROC(_outsw_8)
|
||||||
|
|
|
@ -58,6 +58,8 @@
|
||||||
1:
|
1:
|
||||||
.ifeqs "\flushins", BROK_FLUSH_INST
|
.ifeqs "\flushins", BROK_FLUSH_INST
|
||||||
\flushins [P0++];
|
\flushins [P0++];
|
||||||
|
nop;
|
||||||
|
nop;
|
||||||
2: nop;
|
2: nop;
|
||||||
.else
|
.else
|
||||||
2: \flushins [P0++];
|
2: \flushins [P0++];
|
||||||
|
|
|
@ -33,9 +33,25 @@
|
||||||
//
|
//
|
||||||
//----------------------------------------------------------------------------
|
//----------------------------------------------------------------------------
|
||||||
#include <linux/cache.h>
|
#include <linux/cache.h>
|
||||||
|
#include <linux/threads.h>
|
||||||
#include <asm/types.h>
|
#include <asm/types.h>
|
||||||
#include <asm/mmu.h>
|
#include <asm/mmu.h>
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We only have to have statically allocated lppaca structs on
|
||||||
|
* legacy iSeries, which supports at most 64 cpus.
|
||||||
|
*/
|
||||||
|
#ifdef CONFIG_PPC_ISERIES
|
||||||
|
#if NR_CPUS < 64
|
||||||
|
#define NR_LPPACAS NR_CPUS
|
||||||
|
#else
|
||||||
|
#define NR_LPPACAS 64
|
||||||
|
#endif
|
||||||
|
#else /* not iSeries */
|
||||||
|
#define NR_LPPACAS 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
|
/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
|
||||||
* alignment is sufficient to prevent this */
|
* alignment is sufficient to prevent this */
|
||||||
struct lppaca {
|
struct lppaca {
|
||||||
|
|
|
@ -26,20 +26,6 @@ extern unsigned long __toc_start;
|
||||||
|
|
||||||
#ifdef CONFIG_PPC_BOOK3S
|
#ifdef CONFIG_PPC_BOOK3S
|
||||||
|
|
||||||
/*
|
|
||||||
* We only have to have statically allocated lppaca structs on
|
|
||||||
* legacy iSeries, which supports at most 64 cpus.
|
|
||||||
*/
|
|
||||||
#ifdef CONFIG_PPC_ISERIES
|
|
||||||
#if NR_CPUS < 64
|
|
||||||
#define NR_LPPACAS NR_CPUS
|
|
||||||
#else
|
|
||||||
#define NR_LPPACAS 64
|
|
||||||
#endif
|
|
||||||
#else /* not iSeries */
|
|
||||||
#define NR_LPPACAS 1
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* The structure which the hypervisor knows about - this structure
|
* The structure which the hypervisor knows about - this structure
|
||||||
* should not cross a page boundary. The vpa_init/register_vpa call
|
* should not cross a page boundary. The vpa_init/register_vpa call
|
||||||
|
|
|
@ -1516,7 +1516,8 @@ int start_topology_update(void)
|
||||||
{
|
{
|
||||||
int rc = 0;
|
int rc = 0;
|
||||||
|
|
||||||
if (firmware_has_feature(FW_FEATURE_VPHN) &&
|
/* Disabled until races with load balancing are fixed */
|
||||||
|
if (0 && firmware_has_feature(FW_FEATURE_VPHN) &&
|
||||||
get_lppaca()->shared_proc) {
|
get_lppaca()->shared_proc) {
|
||||||
vphn_enabled = 1;
|
vphn_enabled = 1;
|
||||||
setup_cpu_associativity_change_counters();
|
setup_cpu_associativity_change_counters();
|
||||||
|
|
|
@ -242,8 +242,8 @@ static void __init dt_cpus(struct iseries_flat_dt *dt)
|
||||||
pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */
|
pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */
|
||||||
pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
|
pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
|
||||||
|
|
||||||
for (i = 0; i < NR_CPUS; i++) {
|
for (i = 0; i < NR_LPPACAS; i++) {
|
||||||
if (lppaca_of(i).dyn_proc_status >= 2)
|
if (lppaca[i].dyn_proc_status >= 2)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
snprintf(p, 32 - (p - buf), "@%d", i);
|
snprintf(p, 32 - (p - buf), "@%d", i);
|
||||||
|
@ -251,7 +251,7 @@ static void __init dt_cpus(struct iseries_flat_dt *dt)
|
||||||
|
|
||||||
dt_prop_str(dt, "device_type", device_type_cpu);
|
dt_prop_str(dt, "device_type", device_type_cpu);
|
||||||
|
|
||||||
index = lppaca_of(i).dyn_hv_phys_proc_index;
|
index = lppaca[i].dyn_hv_phys_proc_index;
|
||||||
d = &xIoHriProcessorVpd[index];
|
d = &xIoHriProcessorVpd[index];
|
||||||
|
|
||||||
dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
|
dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
|
||||||
|
|
|
@ -680,6 +680,7 @@ void * __init iSeries_early_setup(void)
|
||||||
* on but calling this function multiple times is fine.
|
* on but calling this function multiple times is fine.
|
||||||
*/
|
*/
|
||||||
identify_cpu(0, mfspr(SPRN_PVR));
|
identify_cpu(0, mfspr(SPRN_PVR));
|
||||||
|
initialise_paca(&boot_paca, 0);
|
||||||
|
|
||||||
powerpc_firmware_features |= FW_FEATURE_ISERIES;
|
powerpc_firmware_features |= FW_FEATURE_ISERIES;
|
||||||
powerpc_firmware_features |= FW_FEATURE_LPAR;
|
powerpc_firmware_features |= FW_FEATURE_LPAR;
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
|
|
||||||
#include <asm-generic/sections.h>
|
#include <asm-generic/sections.h>
|
||||||
|
|
||||||
extern void __nosave_begin, __nosave_end;
|
extern long __nosave_begin, __nosave_end;
|
||||||
extern long __machvec_start, __machvec_end;
|
extern long __machvec_start, __machvec_end;
|
||||||
extern char __uncached_start, __uncached_end;
|
extern char __uncached_start, __uncached_end;
|
||||||
extern char _ebss[];
|
extern char _ebss[];
|
||||||
|
|
|
@ -14,7 +14,7 @@
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/sh_timer.h>
|
#include <linux/sh_timer.h>
|
||||||
#include <linux/serial_sci.h>
|
#include <linux/serial_sci.h>
|
||||||
#include <asm/machtypes.h>
|
#include <generated/machtypes.h>
|
||||||
|
|
||||||
static struct resource rtc_resources[] = {
|
static struct resource rtc_resources[] = {
|
||||||
[0] = {
|
[0] = {
|
||||||
|
@ -255,12 +255,17 @@ static struct platform_device *sh7750_early_devices[] __initdata = {
|
||||||
|
|
||||||
void __init plat_early_device_setup(void)
|
void __init plat_early_device_setup(void)
|
||||||
{
|
{
|
||||||
|
struct platform_device *dev[1];
|
||||||
|
|
||||||
if (mach_is_rts7751r2d()) {
|
if (mach_is_rts7751r2d()) {
|
||||||
scif_platform_data.scscr |= SCSCR_CKE1;
|
scif_platform_data.scscr |= SCSCR_CKE1;
|
||||||
early_platform_add_devices(&scif_device, 1);
|
dev[0] = &scif_device;
|
||||||
|
early_platform_add_devices(dev, 1);
|
||||||
} else {
|
} else {
|
||||||
early_platform_add_devices(&sci_device, 1);
|
dev[0] = &sci_device;
|
||||||
early_platform_add_devices(&scif_device, 1);
|
early_platform_add_devices(dev, 1);
|
||||||
|
dev[0] = &scif_device;
|
||||||
|
early_platform_add_devices(dev, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
early_platform_add_devices(sh7750_early_devices,
|
early_platform_add_devices(sh7750_early_devices,
|
||||||
|
|
|
@ -10,6 +10,16 @@
|
||||||
void __delay(unsigned long loops)
|
void __delay(unsigned long loops)
|
||||||
{
|
{
|
||||||
__asm__ __volatile__(
|
__asm__ __volatile__(
|
||||||
|
/*
|
||||||
|
* ST40-300 appears to have an issue with this code,
|
||||||
|
* normally taking two cycles each loop, as with all
|
||||||
|
* other SH variants. If however the branch and the
|
||||||
|
* delay slot straddle an 8 byte boundary, this increases
|
||||||
|
* to 3 cycles.
|
||||||
|
* This align directive ensures this doesn't occur.
|
||||||
|
*/
|
||||||
|
".balign 8\n\t"
|
||||||
|
|
||||||
"tst %0, %0\n\t"
|
"tst %0, %0\n\t"
|
||||||
"1:\t"
|
"1:\t"
|
||||||
"bf/s 1b\n\t"
|
"bf/s 1b\n\t"
|
||||||
|
|
|
@ -108,7 +108,8 @@ void copy_user_highpage(struct page *to, struct page *from,
|
||||||
kunmap_atomic(vfrom, KM_USER0);
|
kunmap_atomic(vfrom, KM_USER0);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
|
if (pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK) ||
|
||||||
|
(vma->vm_flags & VM_EXEC))
|
||||||
__flush_purge_region(vto, PAGE_SIZE);
|
__flush_purge_region(vto, PAGE_SIZE);
|
||||||
|
|
||||||
kunmap_atomic(vto, KM_USER1);
|
kunmap_atomic(vto, KM_USER1);
|
||||||
|
|
|
@ -62,7 +62,12 @@ int main(int argc, char *argv[])
|
||||||
if (fseek(f, -4L, SEEK_END)) {
|
if (fseek(f, -4L, SEEK_END)) {
|
||||||
perror(argv[1]);
|
perror(argv[1]);
|
||||||
}
|
}
|
||||||
fread(&olen, sizeof olen, 1, f);
|
|
||||||
|
if (fread(&olen, sizeof(olen), 1, f) != 1) {
|
||||||
|
perror(argv[1]);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
ilen = ftell(f);
|
ilen = ftell(f);
|
||||||
olen = getle32(&olen);
|
olen = getle32(&olen);
|
||||||
fclose(f);
|
fclose(f);
|
||||||
|
|
|
@ -176,7 +176,7 @@ struct bau_msg_payload {
|
||||||
struct bau_msg_header {
|
struct bau_msg_header {
|
||||||
unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
|
unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
|
||||||
/* bits 5:0 */
|
/* bits 5:0 */
|
||||||
unsigned int base_dest_nodeid:15; /* nasid (pnode<<1) of */
|
unsigned int base_dest_nodeid:15; /* nasid of the */
|
||||||
/* bits 20:6 */ /* first bit in uvhub map */
|
/* bits 20:6 */ /* first bit in uvhub map */
|
||||||
unsigned int command:8; /* message type */
|
unsigned int command:8; /* message type */
|
||||||
/* bits 28:21 */
|
/* bits 28:21 */
|
||||||
|
|
|
@ -195,7 +195,7 @@ static unsigned int pcc_get_freq(unsigned int cpu)
|
||||||
cmd_incomplete:
|
cmd_incomplete:
|
||||||
iowrite16(0, &pcch_hdr->status);
|
iowrite16(0, &pcch_hdr->status);
|
||||||
spin_unlock(&pcc_lock);
|
spin_unlock(&pcc_lock);
|
||||||
return -EINVAL;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int pcc_cpufreq_target(struct cpufreq_policy *policy,
|
static int pcc_cpufreq_target(struct cpufreq_policy *policy,
|
||||||
|
|
|
@ -780,11 +780,7 @@ void __cpuinit numa_add_cpu(int cpu)
|
||||||
int physnid;
|
int physnid;
|
||||||
int nid = NUMA_NO_NODE;
|
int nid = NUMA_NO_NODE;
|
||||||
|
|
||||||
apicid = early_per_cpu(x86_cpu_to_apicid, cpu);
|
nid = early_cpu_to_node(cpu);
|
||||||
if (apicid != BAD_APICID)
|
|
||||||
nid = apicid_to_node[apicid];
|
|
||||||
if (nid == NUMA_NO_NODE)
|
|
||||||
nid = early_cpu_to_node(cpu);
|
|
||||||
BUG_ON(nid == NUMA_NO_NODE || !node_online(nid));
|
BUG_ON(nid == NUMA_NO_NODE || !node_online(nid));
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -1364,11 +1364,11 @@ uv_activation_descriptor_init(int node, int pnode)
|
||||||
memset(bd2, 0, sizeof(struct bau_desc));
|
memset(bd2, 0, sizeof(struct bau_desc));
|
||||||
bd2->header.sw_ack_flag = 1;
|
bd2->header.sw_ack_flag = 1;
|
||||||
/*
|
/*
|
||||||
* base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
|
* base_dest_nodeid is the nasid of the first uvhub
|
||||||
* in the partition. The bit map will indicate uvhub numbers,
|
* in the partition. The bit map will indicate uvhub numbers,
|
||||||
* which are 0-N in a partition. Pnodes are unique system-wide.
|
* which are 0-N in a partition. Pnodes are unique system-wide.
|
||||||
*/
|
*/
|
||||||
bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
|
bd2->header.base_dest_nodeid = UV_PNODE_TO_NASID(uv_partition_base_pnode);
|
||||||
bd2->header.dest_subnodeid = 0x10; /* the LB */
|
bd2->header.dest_subnodeid = 0x10; /* the LB */
|
||||||
bd2->header.command = UV_NET_ENDPOINT_INTD;
|
bd2->header.command = UV_NET_ENDPOINT_INTD;
|
||||||
bd2->header.int_both = 1;
|
bd2->header.int_both = 1;
|
||||||
|
|
|
@ -900,6 +900,14 @@ static void sender(void *send_info,
|
||||||
printk("**Enqueue: %d.%9.9d\n", t.tv_sec, t.tv_usec);
|
printk("**Enqueue: %d.%9.9d\n", t.tv_sec, t.tv_usec);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* last_timeout_jiffies is updated here to avoid
|
||||||
|
* smi_timeout() handler passing very large time_diff
|
||||||
|
* value to smi_event_handler() that causes
|
||||||
|
* the send command to abort.
|
||||||
|
*/
|
||||||
|
smi_info->last_timeout_jiffies = jiffies;
|
||||||
|
|
||||||
mod_timer(&smi_info->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
|
mod_timer(&smi_info->si_timer, jiffies + SI_TIMEOUT_JIFFIES);
|
||||||
|
|
||||||
if (smi_info->thread)
|
if (smi_info->thread)
|
||||||
|
|
|
@ -388,6 +388,10 @@ static void discard_port_data(struct port *port)
|
||||||
unsigned int len;
|
unsigned int len;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
if (!port->portdev) {
|
||||||
|
/* Device has been unplugged. vqs are already gone. */
|
||||||
|
return;
|
||||||
|
}
|
||||||
vq = port->in_vq;
|
vq = port->in_vq;
|
||||||
if (port->inbuf)
|
if (port->inbuf)
|
||||||
buf = port->inbuf;
|
buf = port->inbuf;
|
||||||
|
@ -470,6 +474,10 @@ static void reclaim_consumed_buffers(struct port *port)
|
||||||
void *buf;
|
void *buf;
|
||||||
unsigned int len;
|
unsigned int len;
|
||||||
|
|
||||||
|
if (!port->portdev) {
|
||||||
|
/* Device has been unplugged. vqs are already gone. */
|
||||||
|
return;
|
||||||
|
}
|
||||||
while ((buf = virtqueue_get_buf(port->out_vq, &len))) {
|
while ((buf = virtqueue_get_buf(port->out_vq, &len))) {
|
||||||
kfree(buf);
|
kfree(buf);
|
||||||
port->outvq_full = false;
|
port->outvq_full = false;
|
||||||
|
|
|
@ -672,7 +672,7 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)
|
||||||
struct drm_crtc_helper_funcs *crtc_funcs;
|
struct drm_crtc_helper_funcs *crtc_funcs;
|
||||||
u16 *red, *green, *blue, *transp;
|
u16 *red, *green, *blue, *transp;
|
||||||
struct drm_crtc *crtc;
|
struct drm_crtc *crtc;
|
||||||
int i, rc = 0;
|
int i, j, rc = 0;
|
||||||
int start;
|
int start;
|
||||||
|
|
||||||
for (i = 0; i < fb_helper->crtc_count; i++) {
|
for (i = 0; i < fb_helper->crtc_count; i++) {
|
||||||
|
@ -685,7 +685,7 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)
|
||||||
transp = cmap->transp;
|
transp = cmap->transp;
|
||||||
start = cmap->start;
|
start = cmap->start;
|
||||||
|
|
||||||
for (i = 0; i < cmap->len; i++) {
|
for (j = 0; j < cmap->len; j++) {
|
||||||
u16 hred, hgreen, hblue, htransp = 0xffff;
|
u16 hred, hgreen, hblue, htransp = 0xffff;
|
||||||
|
|
||||||
hred = *red++;
|
hred = *red++;
|
||||||
|
|
|
@ -865,7 +865,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
|
||||||
int max_freq;
|
int max_freq;
|
||||||
|
|
||||||
/* RPSTAT1 is in the GT power well */
|
/* RPSTAT1 is in the GT power well */
|
||||||
__gen6_force_wake_get(dev_priv);
|
__gen6_gt_force_wake_get(dev_priv);
|
||||||
|
|
||||||
seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
|
seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
|
||||||
seq_printf(m, "RPSTAT1: 0x%08x\n", I915_READ(GEN6_RPSTAT1));
|
seq_printf(m, "RPSTAT1: 0x%08x\n", I915_READ(GEN6_RPSTAT1));
|
||||||
|
@ -888,7 +888,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
|
||||||
seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
|
seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
|
||||||
max_freq * 100);
|
max_freq * 100);
|
||||||
|
|
||||||
__gen6_force_wake_put(dev_priv);
|
__gen6_gt_force_wake_put(dev_priv);
|
||||||
} else {
|
} else {
|
||||||
seq_printf(m, "no P-state info available\n");
|
seq_printf(m, "no P-state info available\n");
|
||||||
}
|
}
|
||||||
|
|
|
@ -46,6 +46,9 @@ module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
|
||||||
unsigned int i915_powersave = 1;
|
unsigned int i915_powersave = 1;
|
||||||
module_param_named(powersave, i915_powersave, int, 0600);
|
module_param_named(powersave, i915_powersave, int, 0600);
|
||||||
|
|
||||||
|
unsigned int i915_semaphores = 0;
|
||||||
|
module_param_named(semaphores, i915_semaphores, int, 0600);
|
||||||
|
|
||||||
unsigned int i915_enable_rc6 = 0;
|
unsigned int i915_enable_rc6 = 0;
|
||||||
module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
|
module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
|
||||||
|
|
||||||
|
@ -254,7 +257,7 @@ void intel_detect_pch (struct drm_device *dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void __gen6_force_wake_get(struct drm_i915_private *dev_priv)
|
void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
|
||||||
{
|
{
|
||||||
int count;
|
int count;
|
||||||
|
|
||||||
|
@ -270,12 +273,22 @@ void __gen6_force_wake_get(struct drm_i915_private *dev_priv)
|
||||||
udelay(10);
|
udelay(10);
|
||||||
}
|
}
|
||||||
|
|
||||||
void __gen6_force_wake_put(struct drm_i915_private *dev_priv)
|
void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
|
||||||
{
|
{
|
||||||
I915_WRITE_NOTRACE(FORCEWAKE, 0);
|
I915_WRITE_NOTRACE(FORCEWAKE, 0);
|
||||||
POSTING_READ(FORCEWAKE);
|
POSTING_READ(FORCEWAKE);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
|
||||||
|
{
|
||||||
|
int loop = 500;
|
||||||
|
u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
|
||||||
|
while (fifo < 20 && loop--) {
|
||||||
|
udelay(10);
|
||||||
|
fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static int i915_drm_freeze(struct drm_device *dev)
|
static int i915_drm_freeze(struct drm_device *dev)
|
||||||
{
|
{
|
||||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||||
|
|
|
@ -956,6 +956,7 @@ extern struct drm_ioctl_desc i915_ioctls[];
|
||||||
extern int i915_max_ioctl;
|
extern int i915_max_ioctl;
|
||||||
extern unsigned int i915_fbpercrtc;
|
extern unsigned int i915_fbpercrtc;
|
||||||
extern unsigned int i915_powersave;
|
extern unsigned int i915_powersave;
|
||||||
|
extern unsigned int i915_semaphores;
|
||||||
extern unsigned int i915_lvds_downclock;
|
extern unsigned int i915_lvds_downclock;
|
||||||
extern unsigned int i915_panel_use_ssc;
|
extern unsigned int i915_panel_use_ssc;
|
||||||
extern unsigned int i915_enable_rc6;
|
extern unsigned int i915_enable_rc6;
|
||||||
|
@ -1177,6 +1178,9 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
|
||||||
void i915_gem_free_all_phys_object(struct drm_device *dev);
|
void i915_gem_free_all_phys_object(struct drm_device *dev);
|
||||||
void i915_gem_release(struct drm_device *dev, struct drm_file *file);
|
void i915_gem_release(struct drm_device *dev, struct drm_file *file);
|
||||||
|
|
||||||
|
uint32_t
|
||||||
|
i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj);
|
||||||
|
|
||||||
/* i915_gem_gtt.c */
|
/* i915_gem_gtt.c */
|
||||||
void i915_gem_restore_gtt_mappings(struct drm_device *dev);
|
void i915_gem_restore_gtt_mappings(struct drm_device *dev);
|
||||||
int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj);
|
int __must_check i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj);
|
||||||
|
@ -1353,22 +1357,32 @@ __i915_write(64, q)
|
||||||
* must be set to prevent GT core from power down and stale values being
|
* must be set to prevent GT core from power down and stale values being
|
||||||
* returned.
|
* returned.
|
||||||
*/
|
*/
|
||||||
void __gen6_force_wake_get(struct drm_i915_private *dev_priv);
|
void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
|
||||||
void __gen6_force_wake_put (struct drm_i915_private *dev_priv);
|
void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
|
||||||
static inline u32 i915_safe_read(struct drm_i915_private *dev_priv, u32 reg)
|
void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv);
|
||||||
|
|
||||||
|
static inline u32 i915_gt_read(struct drm_i915_private *dev_priv, u32 reg)
|
||||||
{
|
{
|
||||||
u32 val;
|
u32 val;
|
||||||
|
|
||||||
if (dev_priv->info->gen >= 6) {
|
if (dev_priv->info->gen >= 6) {
|
||||||
__gen6_force_wake_get(dev_priv);
|
__gen6_gt_force_wake_get(dev_priv);
|
||||||
val = I915_READ(reg);
|
val = I915_READ(reg);
|
||||||
__gen6_force_wake_put(dev_priv);
|
__gen6_gt_force_wake_put(dev_priv);
|
||||||
} else
|
} else
|
||||||
val = I915_READ(reg);
|
val = I915_READ(reg);
|
||||||
|
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline void i915_gt_write(struct drm_i915_private *dev_priv,
|
||||||
|
u32 reg, u32 val)
|
||||||
|
{
|
||||||
|
if (dev_priv->info->gen >= 6)
|
||||||
|
__gen6_gt_wait_for_fifo(dev_priv);
|
||||||
|
I915_WRITE(reg, val);
|
||||||
|
}
|
||||||
|
|
||||||
static inline void
|
static inline void
|
||||||
i915_write(struct drm_i915_private *dev_priv, u32 reg, u64 val, int len)
|
i915_write(struct drm_i915_private *dev_priv, u32 reg, u64 val, int len)
|
||||||
{
|
{
|
||||||
|
|
|
@ -1398,7 +1398,7 @@ i915_gem_get_gtt_alignment(struct drm_i915_gem_object *obj)
|
||||||
* Return the required GTT alignment for an object, only taking into account
|
* Return the required GTT alignment for an object, only taking into account
|
||||||
* unfenced tiled surface requirements.
|
* unfenced tiled surface requirements.
|
||||||
*/
|
*/
|
||||||
static uint32_t
|
uint32_t
|
||||||
i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj)
|
i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj)
|
||||||
{
|
{
|
||||||
struct drm_device *dev = obj->base.dev;
|
struct drm_device *dev = obj->base.dev;
|
||||||
|
|
|
@ -772,8 +772,8 @@ i915_gem_execbuffer_sync_rings(struct drm_i915_gem_object *obj,
|
||||||
if (from == NULL || to == from)
|
if (from == NULL || to == from)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
/* XXX gpu semaphores are currently causing hard hangs on SNB mobile */
|
/* XXX gpu semaphores are implicated in various hard hangs on SNB */
|
||||||
if (INTEL_INFO(obj->base.dev)->gen < 6 || IS_MOBILE(obj->base.dev))
|
if (INTEL_INFO(obj->base.dev)->gen < 6 || !i915_semaphores)
|
||||||
return i915_gem_object_wait_rendering(obj, true);
|
return i915_gem_object_wait_rendering(obj, true);
|
||||||
|
|
||||||
idx = intel_ring_sync_index(from, to);
|
idx = intel_ring_sync_index(from, to);
|
||||||
|
|
|
@ -184,7 +184,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
|
||||||
static bool
|
static bool
|
||||||
i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
|
i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
|
||||||
{
|
{
|
||||||
int tile_width, tile_height;
|
int tile_width;
|
||||||
|
|
||||||
/* Linear is always fine */
|
/* Linear is always fine */
|
||||||
if (tiling_mode == I915_TILING_NONE)
|
if (tiling_mode == I915_TILING_NONE)
|
||||||
|
@ -215,20 +215,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (IS_GEN2(dev) ||
|
|
||||||
(tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
|
|
||||||
tile_height = 32;
|
|
||||||
else
|
|
||||||
tile_height = 8;
|
|
||||||
/* i8xx is strange: It has 2 interleaved rows of tiles, so needs an even
|
|
||||||
* number of tile rows. */
|
|
||||||
if (IS_GEN2(dev))
|
|
||||||
tile_height *= 2;
|
|
||||||
|
|
||||||
/* Size needs to be aligned to a full tile row */
|
|
||||||
if (size & (tile_height * stride - 1))
|
|
||||||
return false;
|
|
||||||
|
|
||||||
/* 965+ just needs multiples of tile width */
|
/* 965+ just needs multiples of tile width */
|
||||||
if (INTEL_INFO(dev)->gen >= 4) {
|
if (INTEL_INFO(dev)->gen >= 4) {
|
||||||
if (stride & (tile_width - 1))
|
if (stride & (tile_width - 1))
|
||||||
|
@ -363,14 +349,27 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
|
||||||
(obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end &&
|
(obj->gtt_offset + obj->base.size <= dev_priv->mm.gtt_mappable_end &&
|
||||||
i915_gem_object_fence_ok(obj, args->tiling_mode));
|
i915_gem_object_fence_ok(obj, args->tiling_mode));
|
||||||
|
|
||||||
obj->tiling_changed = true;
|
/* Rebind if we need a change of alignment */
|
||||||
obj->tiling_mode = args->tiling_mode;
|
if (!obj->map_and_fenceable) {
|
||||||
obj->stride = args->stride;
|
u32 unfenced_alignment =
|
||||||
|
i915_gem_get_unfenced_gtt_alignment(obj);
|
||||||
|
if (obj->gtt_offset & (unfenced_alignment - 1))
|
||||||
|
ret = i915_gem_object_unbind(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ret == 0) {
|
||||||
|
obj->tiling_changed = true;
|
||||||
|
obj->tiling_mode = args->tiling_mode;
|
||||||
|
obj->stride = args->stride;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
/* we have to maintain this existing ABI... */
|
||||||
|
args->stride = obj->stride;
|
||||||
|
args->tiling_mode = obj->tiling_mode;
|
||||||
drm_gem_object_unreference(&obj->base);
|
drm_gem_object_unreference(&obj->base);
|
||||||
mutex_unlock(&dev->struct_mutex);
|
mutex_unlock(&dev->struct_mutex);
|
||||||
|
|
||||||
return 0;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -1553,7 +1553,17 @@
|
||||||
|
|
||||||
/* Backlight control */
|
/* Backlight control */
|
||||||
#define BLC_PWM_CTL 0x61254
|
#define BLC_PWM_CTL 0x61254
|
||||||
|
#define BACKLIGHT_MODULATION_FREQ_SHIFT (17)
|
||||||
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
|
#define BLC_PWM_CTL2 0x61250 /* 965+ only */
|
||||||
|
#define BLM_COMBINATION_MODE (1 << 30)
|
||||||
|
/*
|
||||||
|
* This is the most significant 15 bits of the number of backlight cycles in a
|
||||||
|
* complete cycle of the modulated backlight control.
|
||||||
|
*
|
||||||
|
* The actual value is this field multiplied by two.
|
||||||
|
*/
|
||||||
|
#define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17)
|
||||||
|
#define BLM_LEGACY_MODE (1 << 16)
|
||||||
/*
|
/*
|
||||||
* This is the number of cycles out of the backlight modulation cycle for which
|
* This is the number of cycles out of the backlight modulation cycle for which
|
||||||
* the backlight is on.
|
* the backlight is on.
|
||||||
|
@ -3261,6 +3271,8 @@
|
||||||
#define FORCEWAKE 0xA18C
|
#define FORCEWAKE 0xA18C
|
||||||
#define FORCEWAKE_ACK 0x130090
|
#define FORCEWAKE_ACK 0x130090
|
||||||
|
|
||||||
|
#define GT_FIFO_FREE_ENTRIES 0x120008
|
||||||
|
|
||||||
#define GEN6_RPNSWREQ 0xA008
|
#define GEN6_RPNSWREQ 0xA008
|
||||||
#define GEN6_TURBO_DISABLE (1<<31)
|
#define GEN6_TURBO_DISABLE (1<<31)
|
||||||
#define GEN6_FREQUENCY(x) ((x)<<25)
|
#define GEN6_FREQUENCY(x) ((x)<<25)
|
||||||
|
|
|
@ -1219,7 +1219,7 @@ static void sandybridge_blit_fbc_update(struct drm_device *dev)
|
||||||
u32 blt_ecoskpd;
|
u32 blt_ecoskpd;
|
||||||
|
|
||||||
/* Make sure blitter notifies FBC of writes */
|
/* Make sure blitter notifies FBC of writes */
|
||||||
__gen6_force_wake_get(dev_priv);
|
__gen6_gt_force_wake_get(dev_priv);
|
||||||
blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);
|
blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD);
|
||||||
blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY <<
|
blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY <<
|
||||||
GEN6_BLITTER_LOCK_SHIFT;
|
GEN6_BLITTER_LOCK_SHIFT;
|
||||||
|
@ -1230,7 +1230,7 @@ static void sandybridge_blit_fbc_update(struct drm_device *dev)
|
||||||
GEN6_BLITTER_LOCK_SHIFT);
|
GEN6_BLITTER_LOCK_SHIFT);
|
||||||
I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);
|
I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd);
|
||||||
POSTING_READ(GEN6_BLITTER_ECOSKPD);
|
POSTING_READ(GEN6_BLITTER_ECOSKPD);
|
||||||
__gen6_force_wake_put(dev_priv);
|
__gen6_gt_force_wake_put(dev_priv);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
|
static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
|
||||||
|
@ -6282,7 +6282,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
|
||||||
* userspace...
|
* userspace...
|
||||||
*/
|
*/
|
||||||
I915_WRITE(GEN6_RC_STATE, 0);
|
I915_WRITE(GEN6_RC_STATE, 0);
|
||||||
__gen6_force_wake_get(dev_priv);
|
__gen6_gt_force_wake_get(dev_priv);
|
||||||
|
|
||||||
/* disable the counters and set deterministic thresholds */
|
/* disable the counters and set deterministic thresholds */
|
||||||
I915_WRITE(GEN6_RC_CONTROL, 0);
|
I915_WRITE(GEN6_RC_CONTROL, 0);
|
||||||
|
@ -6380,7 +6380,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
|
||||||
/* enable all PM interrupts */
|
/* enable all PM interrupts */
|
||||||
I915_WRITE(GEN6_PMINTRMSK, 0);
|
I915_WRITE(GEN6_PMINTRMSK, 0);
|
||||||
|
|
||||||
__gen6_force_wake_put(dev_priv);
|
__gen6_gt_force_wake_put(dev_priv);
|
||||||
}
|
}
|
||||||
|
|
||||||
void intel_enable_clock_gating(struct drm_device *dev)
|
void intel_enable_clock_gating(struct drm_device *dev)
|
||||||
|
|
|
@ -30,6 +30,8 @@
|
||||||
|
|
||||||
#include "intel_drv.h"
|
#include "intel_drv.h"
|
||||||
|
|
||||||
|
#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
|
||||||
|
|
||||||
void
|
void
|
||||||
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
|
intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
|
||||||
struct drm_display_mode *adjusted_mode)
|
struct drm_display_mode *adjusted_mode)
|
||||||
|
@ -110,6 +112,19 @@ done:
|
||||||
dev_priv->pch_pf_size = (width << 16) | height;
|
dev_priv->pch_pf_size = (width << 16) | height;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int is_backlight_combination_mode(struct drm_device *dev)
|
||||||
|
{
|
||||||
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||||
|
|
||||||
|
if (INTEL_INFO(dev)->gen >= 4)
|
||||||
|
return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
|
||||||
|
|
||||||
|
if (IS_GEN2(dev))
|
||||||
|
return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
|
static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
|
||||||
{
|
{
|
||||||
u32 val;
|
u32 val;
|
||||||
|
@ -166,6 +181,9 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev)
|
||||||
if (INTEL_INFO(dev)->gen < 4)
|
if (INTEL_INFO(dev)->gen < 4)
|
||||||
max &= ~1;
|
max &= ~1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (is_backlight_combination_mode(dev))
|
||||||
|
max *= 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
|
DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
|
||||||
|
@ -183,6 +201,14 @@ u32 intel_panel_get_backlight(struct drm_device *dev)
|
||||||
val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
|
val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
|
||||||
if (IS_PINEVIEW(dev))
|
if (IS_PINEVIEW(dev))
|
||||||
val >>= 1;
|
val >>= 1;
|
||||||
|
|
||||||
|
if (is_backlight_combination_mode(dev)){
|
||||||
|
u8 lbpc;
|
||||||
|
|
||||||
|
val &= ~1;
|
||||||
|
pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
|
||||||
|
val *= lbpc;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
|
DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
|
||||||
|
@ -205,6 +231,16 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level)
|
||||||
|
|
||||||
if (HAS_PCH_SPLIT(dev))
|
if (HAS_PCH_SPLIT(dev))
|
||||||
return intel_pch_panel_set_backlight(dev, level);
|
return intel_pch_panel_set_backlight(dev, level);
|
||||||
|
|
||||||
|
if (is_backlight_combination_mode(dev)){
|
||||||
|
u32 max = intel_panel_get_max_backlight(dev);
|
||||||
|
u8 lbpc;
|
||||||
|
|
||||||
|
lbpc = level * 0xfe / max + 1;
|
||||||
|
level /= lbpc;
|
||||||
|
pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
|
||||||
|
}
|
||||||
|
|
||||||
tmp = I915_READ(BLC_PWM_CTL);
|
tmp = I915_READ(BLC_PWM_CTL);
|
||||||
if (IS_PINEVIEW(dev)) {
|
if (IS_PINEVIEW(dev)) {
|
||||||
tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
|
tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
|
||||||
|
|
|
@ -14,22 +14,23 @@ struct intel_hw_status_page {
|
||||||
struct drm_i915_gem_object *obj;
|
struct drm_i915_gem_object *obj;
|
||||||
};
|
};
|
||||||
|
|
||||||
#define I915_RING_READ(reg) i915_safe_read(dev_priv, reg)
|
#define I915_RING_READ(reg) i915_gt_read(dev_priv, reg)
|
||||||
|
#define I915_RING_WRITE(reg, val) i915_gt_write(dev_priv, reg, val)
|
||||||
|
|
||||||
#define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base))
|
#define I915_READ_TAIL(ring) I915_RING_READ(RING_TAIL((ring)->mmio_base))
|
||||||
#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL((ring)->mmio_base), val)
|
#define I915_WRITE_TAIL(ring, val) I915_RING_WRITE(RING_TAIL((ring)->mmio_base), val)
|
||||||
|
|
||||||
#define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base))
|
#define I915_READ_START(ring) I915_RING_READ(RING_START((ring)->mmio_base))
|
||||||
#define I915_WRITE_START(ring, val) I915_WRITE(RING_START((ring)->mmio_base), val)
|
#define I915_WRITE_START(ring, val) I915_RING_WRITE(RING_START((ring)->mmio_base), val)
|
||||||
|
|
||||||
#define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base))
|
#define I915_READ_HEAD(ring) I915_RING_READ(RING_HEAD((ring)->mmio_base))
|
||||||
#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD((ring)->mmio_base), val)
|
#define I915_WRITE_HEAD(ring, val) I915_RING_WRITE(RING_HEAD((ring)->mmio_base), val)
|
||||||
|
|
||||||
#define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base))
|
#define I915_READ_CTL(ring) I915_RING_READ(RING_CTL((ring)->mmio_base))
|
||||||
#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL((ring)->mmio_base), val)
|
#define I915_WRITE_CTL(ring, val) I915_RING_WRITE(RING_CTL((ring)->mmio_base), val)
|
||||||
|
|
||||||
#define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
|
|
||||||
#define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base))
|
#define I915_READ_IMR(ring) I915_RING_READ(RING_IMR((ring)->mmio_base))
|
||||||
|
#define I915_WRITE_IMR(ring, val) I915_RING_WRITE(RING_IMR((ring)->mmio_base), val)
|
||||||
|
|
||||||
#define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base))
|
#define I915_READ_NOPID(ring) I915_RING_READ(RING_NOPID((ring)->mmio_base))
|
||||||
#define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base))
|
#define I915_READ_SYNC_0(ring) I915_RING_READ(RING_SYNC_0((ring)->mmio_base))
|
||||||
|
|
|
@ -83,7 +83,8 @@ nouveau_dma_init(struct nouveau_channel *chan)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
/* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
|
/* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
|
||||||
ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy);
|
ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfd0, 0x1000,
|
||||||
|
&chan->m2mf_ntfy);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
|
|
@ -852,7 +852,8 @@ extern const struct ttm_mem_type_manager_func nouveau_vram_manager;
|
||||||
extern int nouveau_notifier_init_channel(struct nouveau_channel *);
|
extern int nouveau_notifier_init_channel(struct nouveau_channel *);
|
||||||
extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
|
extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
|
||||||
extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
|
extern int nouveau_notifier_alloc(struct nouveau_channel *, uint32_t handle,
|
||||||
int cout, uint32_t *offset);
|
int cout, uint32_t start, uint32_t end,
|
||||||
|
uint32_t *offset);
|
||||||
extern int nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *);
|
extern int nouveau_notifier_offset(struct nouveau_gpuobj *, uint32_t *);
|
||||||
extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
|
extern int nouveau_ioctl_notifier_alloc(struct drm_device *, void *data,
|
||||||
struct drm_file *);
|
struct drm_file *);
|
||||||
|
|
|
@ -725,8 +725,10 @@ nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
|
||||||
ret = vram->get(dev, mem->num_pages << PAGE_SHIFT,
|
ret = vram->get(dev, mem->num_pages << PAGE_SHIFT,
|
||||||
mem->page_alignment << PAGE_SHIFT, size_nc,
|
mem->page_alignment << PAGE_SHIFT, size_nc,
|
||||||
(nvbo->tile_flags >> 8) & 0xff, &node);
|
(nvbo->tile_flags >> 8) & 0xff, &node);
|
||||||
if (ret)
|
if (ret) {
|
||||||
return ret;
|
mem->mm_node = NULL;
|
||||||
|
return (ret == -ENOSPC) ? 0 : ret;
|
||||||
|
}
|
||||||
|
|
||||||
node->page_shift = 12;
|
node->page_shift = 12;
|
||||||
if (nvbo->vma.node)
|
if (nvbo->vma.node)
|
||||||
|
|
|
@ -123,7 +123,7 @@ nouveau_mm_get(struct nouveau_mm *rmm, int type, u32 size, u32 size_nc,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return -ENOMEM;
|
return -ENOSPC;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
|
|
|
@ -96,7 +96,8 @@ nouveau_notifier_gpuobj_dtor(struct drm_device *dev,
|
||||||
|
|
||||||
int
|
int
|
||||||
nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
|
nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
|
||||||
int size, uint32_t *b_offset)
|
int size, uint32_t start, uint32_t end,
|
||||||
|
uint32_t *b_offset)
|
||||||
{
|
{
|
||||||
struct drm_device *dev = chan->dev;
|
struct drm_device *dev = chan->dev;
|
||||||
struct nouveau_gpuobj *nobj = NULL;
|
struct nouveau_gpuobj *nobj = NULL;
|
||||||
|
@ -104,9 +105,10 @@ nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
|
||||||
uint32_t offset;
|
uint32_t offset;
|
||||||
int target, ret;
|
int target, ret;
|
||||||
|
|
||||||
mem = drm_mm_search_free(&chan->notifier_heap, size, 0, 0);
|
mem = drm_mm_search_free_in_range(&chan->notifier_heap, size, 0,
|
||||||
|
start, end, 0);
|
||||||
if (mem)
|
if (mem)
|
||||||
mem = drm_mm_get_block(mem, size, 0);
|
mem = drm_mm_get_block_range(mem, size, 0, start, end);
|
||||||
if (!mem) {
|
if (!mem) {
|
||||||
NV_ERROR(dev, "Channel %d notifier block full\n", chan->id);
|
NV_ERROR(dev, "Channel %d notifier block full\n", chan->id);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
@ -177,7 +179,8 @@ nouveau_ioctl_notifier_alloc(struct drm_device *dev, void *data,
|
||||||
if (IS_ERR(chan))
|
if (IS_ERR(chan))
|
||||||
return PTR_ERR(chan);
|
return PTR_ERR(chan);
|
||||||
|
|
||||||
ret = nouveau_notifier_alloc(chan, na->handle, na->size, &na->offset);
|
ret = nouveau_notifier_alloc(chan, na->handle, na->size, 0, 0x1000,
|
||||||
|
&na->offset);
|
||||||
nouveau_channel_put(&chan);
|
nouveau_channel_put(&chan);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -403,16 +403,24 @@ nv50_instmem_unmap(struct nouveau_gpuobj *gpuobj)
|
||||||
void
|
void
|
||||||
nv50_instmem_flush(struct drm_device *dev)
|
nv50_instmem_flush(struct drm_device *dev)
|
||||||
{
|
{
|
||||||
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
||||||
|
|
||||||
|
spin_lock(&dev_priv->ramin_lock);
|
||||||
nv_wr32(dev, 0x00330c, 0x00000001);
|
nv_wr32(dev, 0x00330c, 0x00000001);
|
||||||
if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000))
|
if (!nv_wait(dev, 0x00330c, 0x00000002, 0x00000000))
|
||||||
NV_ERROR(dev, "PRAMIN flush timeout\n");
|
NV_ERROR(dev, "PRAMIN flush timeout\n");
|
||||||
|
spin_unlock(&dev_priv->ramin_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
nv84_instmem_flush(struct drm_device *dev)
|
nv84_instmem_flush(struct drm_device *dev)
|
||||||
{
|
{
|
||||||
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
||||||
|
|
||||||
|
spin_lock(&dev_priv->ramin_lock);
|
||||||
nv_wr32(dev, 0x070000, 0x00000001);
|
nv_wr32(dev, 0x070000, 0x00000001);
|
||||||
if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000))
|
if (!nv_wait(dev, 0x070000, 0x00000002, 0x00000000))
|
||||||
NV_ERROR(dev, "PRAMIN flush timeout\n");
|
NV_ERROR(dev, "PRAMIN flush timeout\n");
|
||||||
|
spin_unlock(&dev_priv->ramin_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -169,7 +169,11 @@ nv50_vm_flush(struct nouveau_vm *vm)
|
||||||
void
|
void
|
||||||
nv50_vm_flush_engine(struct drm_device *dev, int engine)
|
nv50_vm_flush_engine(struct drm_device *dev, int engine)
|
||||||
{
|
{
|
||||||
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
||||||
|
|
||||||
|
spin_lock(&dev_priv->ramin_lock);
|
||||||
nv_wr32(dev, 0x100c80, (engine << 16) | 1);
|
nv_wr32(dev, 0x100c80, (engine << 16) | 1);
|
||||||
if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000))
|
if (!nv_wait(dev, 0x100c80, 0x00000001, 0x00000000))
|
||||||
NV_ERROR(dev, "vm flush timeout: engine %d\n", engine);
|
NV_ERROR(dev, "vm flush timeout: engine %d\n", engine);
|
||||||
|
spin_unlock(&dev_priv->ramin_lock);
|
||||||
}
|
}
|
||||||
|
|
|
@ -29,6 +29,7 @@
|
||||||
#include <linux/pci.h>
|
#include <linux/pci.h>
|
||||||
#include <linux/mutex.h>
|
#include <linux/mutex.h>
|
||||||
#include <linux/ktime.h>
|
#include <linux/ktime.h>
|
||||||
|
#include <linux/slab.h>
|
||||||
|
|
||||||
#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */
|
#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */
|
||||||
#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */
|
#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */
|
||||||
|
|
|
@ -249,7 +249,7 @@ static struct i2c_adapter ocores_adapter = {
|
||||||
static int ocores_i2c_of_probe(struct platform_device* pdev,
|
static int ocores_i2c_of_probe(struct platform_device* pdev,
|
||||||
struct ocores_i2c* i2c)
|
struct ocores_i2c* i2c)
|
||||||
{
|
{
|
||||||
__be32* val;
|
const __be32* val;
|
||||||
|
|
||||||
val = of_get_property(pdev->dev.of_node, "regstep", NULL);
|
val = of_get_property(pdev->dev.of_node, "regstep", NULL);
|
||||||
if (!val) {
|
if (!val) {
|
||||||
|
|
|
@ -378,9 +378,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
|
||||||
* REVISIT: Some wkup sources might not be needed.
|
* REVISIT: Some wkup sources might not be needed.
|
||||||
*/
|
*/
|
||||||
dev->westate = OMAP_I2C_WE_ALL;
|
dev->westate = OMAP_I2C_WE_ALL;
|
||||||
if (dev->rev < OMAP_I2C_REV_ON_4430)
|
omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
|
||||||
omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
|
|
||||||
dev->westate);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
|
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
|
||||||
|
|
|
@ -658,13 +658,13 @@ static int tda8290_probe(struct tuner_i2c_props *i2c_props)
|
||||||
#define TDA8290_ID 0x89
|
#define TDA8290_ID 0x89
|
||||||
u8 reg = 0x1f, id;
|
u8 reg = 0x1f, id;
|
||||||
struct i2c_msg msg_read[] = {
|
struct i2c_msg msg_read[] = {
|
||||||
{ .addr = 0x4b, .flags = 0, .len = 1, .buf = ® },
|
{ .addr = i2c_props->addr, .flags = 0, .len = 1, .buf = ® },
|
||||||
{ .addr = 0x4b, .flags = I2C_M_RD, .len = 1, .buf = &id },
|
{ .addr = i2c_props->addr, .flags = I2C_M_RD, .len = 1, .buf = &id },
|
||||||
};
|
};
|
||||||
|
|
||||||
/* detect tda8290 */
|
/* detect tda8290 */
|
||||||
if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
|
if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
|
||||||
printk(KERN_WARNING "%s: tda8290 couldn't read register 0x%02x\n",
|
printk(KERN_WARNING "%s: couldn't read register 0x%02x\n",
|
||||||
__func__, reg);
|
__func__, reg);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
@ -685,13 +685,13 @@ static int tda8295_probe(struct tuner_i2c_props *i2c_props)
|
||||||
#define TDA8295C2_ID 0x8b
|
#define TDA8295C2_ID 0x8b
|
||||||
u8 reg = 0x2f, id;
|
u8 reg = 0x2f, id;
|
||||||
struct i2c_msg msg_read[] = {
|
struct i2c_msg msg_read[] = {
|
||||||
{ .addr = 0x4b, .flags = 0, .len = 1, .buf = ® },
|
{ .addr = i2c_props->addr, .flags = 0, .len = 1, .buf = ® },
|
||||||
{ .addr = 0x4b, .flags = I2C_M_RD, .len = 1, .buf = &id },
|
{ .addr = i2c_props->addr, .flags = I2C_M_RD, .len = 1, .buf = &id },
|
||||||
};
|
};
|
||||||
|
|
||||||
/* detect tda8290 */
|
/* detect tda8295 */
|
||||||
if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
|
if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
|
||||||
printk(KERN_WARNING "%s: tda8290 couldn't read register 0x%02x\n",
|
printk(KERN_WARNING "%s: couldn't read register 0x%02x\n",
|
||||||
__func__, reg);
|
__func__, reg);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
|
@ -870,6 +870,23 @@ static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
|
||||||
|
u16 pid, int onoff)
|
||||||
|
{
|
||||||
|
struct dib0700_state *st = adapter->dev->priv;
|
||||||
|
if (st->is_dib7000pc)
|
||||||
|
return dib7000p_pid_filter(adapter->fe, index, pid, onoff);
|
||||||
|
return dib7000m_pid_filter(adapter->fe, index, pid, onoff);
|
||||||
|
}
|
||||||
|
|
||||||
|
static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
|
||||||
|
{
|
||||||
|
struct dib0700_state *st = adapter->dev->priv;
|
||||||
|
if (st->is_dib7000pc)
|
||||||
|
return dib7000p_pid_filter_ctrl(adapter->fe, onoff);
|
||||||
|
return dib7000m_pid_filter_ctrl(adapter->fe, onoff);
|
||||||
|
}
|
||||||
|
|
||||||
static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
|
static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
|
||||||
{
|
{
|
||||||
return dib7000p_pid_filter(adapter->fe, index, pid, onoff);
|
return dib7000p_pid_filter(adapter->fe, index, pid, onoff);
|
||||||
|
@ -1875,8 +1892,8 @@ struct dvb_usb_device_properties dib0700_devices[] = {
|
||||||
{
|
{
|
||||||
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
|
.caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
|
||||||
.pid_filter_count = 32,
|
.pid_filter_count = 32,
|
||||||
.pid_filter = stk70x0p_pid_filter,
|
.pid_filter = stk7700p_pid_filter,
|
||||||
.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
|
.pid_filter_ctrl = stk7700p_pid_filter_ctrl,
|
||||||
.frontend_attach = stk7700p_frontend_attach,
|
.frontend_attach = stk7700p_frontend_attach,
|
||||||
.tuner_attach = stk7700p_tuner_attach,
|
.tuner_attach = stk7700p_tuner_attach,
|
||||||
|
|
||||||
|
|
|
@ -659,7 +659,7 @@ static int lme2510_download_firmware(struct usb_device *dev,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Default firmware for LME2510C */
|
/* Default firmware for LME2510C */
|
||||||
const char lme_firmware[50] = "dvb-usb-lme2510c-s7395.fw";
|
char lme_firmware[50] = "dvb-usb-lme2510c-s7395.fw";
|
||||||
|
|
||||||
static void lme_coldreset(struct usb_device *dev)
|
static void lme_coldreset(struct usb_device *dev)
|
||||||
{
|
{
|
||||||
|
@ -1006,7 +1006,7 @@ static struct dvb_usb_device_properties lme2510c_properties = {
|
||||||
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
|
.caps = DVB_USB_IS_AN_I2C_ADAPTER,
|
||||||
.usb_ctrl = DEVICE_SPECIFIC,
|
.usb_ctrl = DEVICE_SPECIFIC,
|
||||||
.download_firmware = lme2510_download_firmware,
|
.download_firmware = lme2510_download_firmware,
|
||||||
.firmware = lme_firmware,
|
.firmware = (const char *)&lme_firmware,
|
||||||
.size_of_priv = sizeof(struct lme2510_state),
|
.size_of_priv = sizeof(struct lme2510_state),
|
||||||
.num_adapters = 1,
|
.num_adapters = 1,
|
||||||
.adapter = {
|
.adapter = {
|
||||||
|
@ -1109,5 +1109,5 @@ module_exit(lme2510_module_exit);
|
||||||
|
|
||||||
MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>");
|
MODULE_AUTHOR("Malcolm Priestley <tvboxspy@gmail.com>");
|
||||||
MODULE_DESCRIPTION("LME2510(C) DVB-S USB2.0");
|
MODULE_DESCRIPTION("LME2510(C) DVB-S USB2.0");
|
||||||
MODULE_VERSION("1.74");
|
MODULE_VERSION("1.75");
|
||||||
MODULE_LICENSE("GPL");
|
MODULE_LICENSE("GPL");
|
||||||
|
|
|
@ -1285,6 +1285,25 @@ struct i2c_adapter * dib7000m_get_i2c_master(struct dvb_frontend *demod, enum di
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(dib7000m_get_i2c_master);
|
EXPORT_SYMBOL(dib7000m_get_i2c_master);
|
||||||
|
|
||||||
|
int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff)
|
||||||
|
{
|
||||||
|
struct dib7000m_state *state = fe->demodulator_priv;
|
||||||
|
u16 val = dib7000m_read_word(state, 294 + state->reg_offs) & 0xffef;
|
||||||
|
val |= (onoff & 0x1) << 4;
|
||||||
|
dprintk("PID filter enabled %d", onoff);
|
||||||
|
return dib7000m_write_word(state, 294 + state->reg_offs, val);
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL(dib7000m_pid_filter_ctrl);
|
||||||
|
|
||||||
|
int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff)
|
||||||
|
{
|
||||||
|
struct dib7000m_state *state = fe->demodulator_priv;
|
||||||
|
dprintk("PID filter: index %x, PID %d, OnOff %d", id, pid, onoff);
|
||||||
|
return dib7000m_write_word(state, 300 + state->reg_offs + id,
|
||||||
|
onoff ? (1 << 13) | pid : 0);
|
||||||
|
}
|
||||||
|
EXPORT_SYMBOL(dib7000m_pid_filter);
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
/* used with some prototype boards */
|
/* used with some prototype boards */
|
||||||
int dib7000m_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods,
|
int dib7000m_i2c_enumeration(struct i2c_adapter *i2c, int no_of_demods,
|
||||||
|
|
|
@ -46,6 +46,8 @@ extern struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
|
||||||
extern struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *,
|
extern struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *,
|
||||||
enum dibx000_i2c_interface,
|
enum dibx000_i2c_interface,
|
||||||
int);
|
int);
|
||||||
|
extern int dib7000m_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
|
||||||
|
extern int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
|
||||||
#else
|
#else
|
||||||
static inline
|
static inline
|
||||||
struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
|
struct dvb_frontend *dib7000m_attach(struct i2c_adapter *i2c_adap,
|
||||||
|
@ -63,6 +65,19 @@ struct i2c_adapter *dib7000m_get_i2c_master(struct dvb_frontend *demod,
|
||||||
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
static inline int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id,
|
||||||
|
u16 pid, u8 onoff)
|
||||||
|
{
|
||||||
|
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe,
|
||||||
|
uint8_t onoff)
|
||||||
|
{
|
||||||
|
printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* TODO
|
/* TODO
|
||||||
|
|
|
@ -22,7 +22,6 @@
|
||||||
#include <linux/moduleparam.h>
|
#include <linux/moduleparam.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
#include <asm/pgtable.h>
|
|
||||||
#include <asm/page.h>
|
#include <asm/page.h>
|
||||||
#include <linux/kmod.h>
|
#include <linux/kmod.h>
|
||||||
#include <linux/vmalloc.h>
|
#include <linux/vmalloc.h>
|
||||||
|
|
|
@ -112,7 +112,7 @@ int ir_raw_event_store_edge(struct rc_dev *dev, enum raw_event_type type)
|
||||||
{
|
{
|
||||||
ktime_t now;
|
ktime_t now;
|
||||||
s64 delta; /* ns */
|
s64 delta; /* ns */
|
||||||
struct ir_raw_event ev;
|
DEFINE_IR_RAW_EVENT(ev);
|
||||||
int rc = 0;
|
int rc = 0;
|
||||||
|
|
||||||
if (!dev->raw)
|
if (!dev->raw)
|
||||||
|
@ -125,7 +125,6 @@ int ir_raw_event_store_edge(struct rc_dev *dev, enum raw_event_type type)
|
||||||
* being called for the first time, note that delta can't
|
* being called for the first time, note that delta can't
|
||||||
* possibly be negative.
|
* possibly be negative.
|
||||||
*/
|
*/
|
||||||
ev.duration = 0;
|
|
||||||
if (delta > IR_MAX_DURATION || !dev->raw->last_type)
|
if (delta > IR_MAX_DURATION || !dev->raw->last_type)
|
||||||
type |= IR_START_EVENT;
|
type |= IR_START_EVENT;
|
||||||
else
|
else
|
||||||
|
|
|
@ -148,6 +148,7 @@ enum mceusb_model_type {
|
||||||
MCE_GEN2_TX_INV,
|
MCE_GEN2_TX_INV,
|
||||||
POLARIS_EVK,
|
POLARIS_EVK,
|
||||||
CX_HYBRID_TV,
|
CX_HYBRID_TV,
|
||||||
|
MULTIFUNCTION,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct mceusb_model {
|
struct mceusb_model {
|
||||||
|
@ -155,9 +156,10 @@ struct mceusb_model {
|
||||||
u32 mce_gen2:1;
|
u32 mce_gen2:1;
|
||||||
u32 mce_gen3:1;
|
u32 mce_gen3:1;
|
||||||
u32 tx_mask_normal:1;
|
u32 tx_mask_normal:1;
|
||||||
u32 is_polaris:1;
|
|
||||||
u32 no_tx:1;
|
u32 no_tx:1;
|
||||||
|
|
||||||
|
int ir_intfnum;
|
||||||
|
|
||||||
const char *rc_map; /* Allow specify a per-board map */
|
const char *rc_map; /* Allow specify a per-board map */
|
||||||
const char *name; /* per-board name */
|
const char *name; /* per-board name */
|
||||||
};
|
};
|
||||||
|
@ -179,7 +181,6 @@ static const struct mceusb_model mceusb_model[] = {
|
||||||
.tx_mask_normal = 1,
|
.tx_mask_normal = 1,
|
||||||
},
|
},
|
||||||
[POLARIS_EVK] = {
|
[POLARIS_EVK] = {
|
||||||
.is_polaris = 1,
|
|
||||||
/*
|
/*
|
||||||
* In fact, the EVK is shipped without
|
* In fact, the EVK is shipped without
|
||||||
* remotes, but we should have something handy,
|
* remotes, but we should have something handy,
|
||||||
|
@ -189,10 +190,13 @@ static const struct mceusb_model mceusb_model[] = {
|
||||||
.name = "Conexant Hybrid TV (cx231xx) MCE IR",
|
.name = "Conexant Hybrid TV (cx231xx) MCE IR",
|
||||||
},
|
},
|
||||||
[CX_HYBRID_TV] = {
|
[CX_HYBRID_TV] = {
|
||||||
.is_polaris = 1,
|
|
||||||
.no_tx = 1, /* tx isn't wired up at all */
|
.no_tx = 1, /* tx isn't wired up at all */
|
||||||
.name = "Conexant Hybrid TV (cx231xx) MCE IR",
|
.name = "Conexant Hybrid TV (cx231xx) MCE IR",
|
||||||
},
|
},
|
||||||
|
[MULTIFUNCTION] = {
|
||||||
|
.mce_gen2 = 1,
|
||||||
|
.ir_intfnum = 2,
|
||||||
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static struct usb_device_id mceusb_dev_table[] = {
|
static struct usb_device_id mceusb_dev_table[] = {
|
||||||
|
@ -216,8 +220,9 @@ static struct usb_device_id mceusb_dev_table[] = {
|
||||||
{ USB_DEVICE(VENDOR_PHILIPS, 0x206c) },
|
{ USB_DEVICE(VENDOR_PHILIPS, 0x206c) },
|
||||||
/* Philips/Spinel plus IR transceiver for ASUS */
|
/* Philips/Spinel plus IR transceiver for ASUS */
|
||||||
{ USB_DEVICE(VENDOR_PHILIPS, 0x2088) },
|
{ USB_DEVICE(VENDOR_PHILIPS, 0x2088) },
|
||||||
/* Realtek MCE IR Receiver */
|
/* Realtek MCE IR Receiver and card reader */
|
||||||
{ USB_DEVICE(VENDOR_REALTEK, 0x0161) },
|
{ USB_DEVICE(VENDOR_REALTEK, 0x0161),
|
||||||
|
.driver_info = MULTIFUNCTION },
|
||||||
/* SMK/Toshiba G83C0004D410 */
|
/* SMK/Toshiba G83C0004D410 */
|
||||||
{ USB_DEVICE(VENDOR_SMK, 0x031d),
|
{ USB_DEVICE(VENDOR_SMK, 0x031d),
|
||||||
.driver_info = MCE_GEN2_TX_INV },
|
.driver_info = MCE_GEN2_TX_INV },
|
||||||
|
@ -1101,7 +1106,7 @@ static int __devinit mceusb_dev_probe(struct usb_interface *intf,
|
||||||
bool is_gen3;
|
bool is_gen3;
|
||||||
bool is_microsoft_gen1;
|
bool is_microsoft_gen1;
|
||||||
bool tx_mask_normal;
|
bool tx_mask_normal;
|
||||||
bool is_polaris;
|
int ir_intfnum;
|
||||||
|
|
||||||
dev_dbg(&intf->dev, "%s called\n", __func__);
|
dev_dbg(&intf->dev, "%s called\n", __func__);
|
||||||
|
|
||||||
|
@ -1110,13 +1115,11 @@ static int __devinit mceusb_dev_probe(struct usb_interface *intf,
|
||||||
is_gen3 = mceusb_model[model].mce_gen3;
|
is_gen3 = mceusb_model[model].mce_gen3;
|
||||||
is_microsoft_gen1 = mceusb_model[model].mce_gen1;
|
is_microsoft_gen1 = mceusb_model[model].mce_gen1;
|
||||||
tx_mask_normal = mceusb_model[model].tx_mask_normal;
|
tx_mask_normal = mceusb_model[model].tx_mask_normal;
|
||||||
is_polaris = mceusb_model[model].is_polaris;
|
ir_intfnum = mceusb_model[model].ir_intfnum;
|
||||||
|
|
||||||
if (is_polaris) {
|
/* There are multi-function devices with non-IR interfaces */
|
||||||
/* Interface 0 is IR */
|
if (idesc->desc.bInterfaceNumber != ir_intfnum)
|
||||||
if (idesc->desc.bInterfaceNumber)
|
return -ENODEV;
|
||||||
return -ENODEV;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* step through the endpoints to find first bulk in and out endpoint */
|
/* step through the endpoints to find first bulk in and out endpoint */
|
||||||
for (i = 0; i < idesc->desc.bNumEndpoints; ++i) {
|
for (i = 0; i < idesc->desc.bNumEndpoints; ++i) {
|
||||||
|
|
|
@ -385,8 +385,9 @@ static void nvt_cir_regs_init(struct nvt_dev *nvt)
|
||||||
|
|
||||||
static void nvt_cir_wake_regs_init(struct nvt_dev *nvt)
|
static void nvt_cir_wake_regs_init(struct nvt_dev *nvt)
|
||||||
{
|
{
|
||||||
/* set number of bytes needed for wake key comparison (default 67) */
|
/* set number of bytes needed for wake from s3 (default 65) */
|
||||||
nvt_cir_wake_reg_write(nvt, CIR_WAKE_FIFO_LEN, CIR_WAKE_FIFO_CMP_DEEP);
|
nvt_cir_wake_reg_write(nvt, CIR_WAKE_FIFO_CMP_BYTES,
|
||||||
|
CIR_WAKE_FIFO_CMP_DEEP);
|
||||||
|
|
||||||
/* set tolerance/variance allowed per byte during wake compare */
|
/* set tolerance/variance allowed per byte during wake compare */
|
||||||
nvt_cir_wake_reg_write(nvt, CIR_WAKE_CMP_TOLERANCE,
|
nvt_cir_wake_reg_write(nvt, CIR_WAKE_CMP_TOLERANCE,
|
||||||
|
|
|
@ -305,8 +305,11 @@ struct nvt_dev {
|
||||||
#define CIR_WAKE_IRFIFOSTS_RX_EMPTY 0x20
|
#define CIR_WAKE_IRFIFOSTS_RX_EMPTY 0x20
|
||||||
#define CIR_WAKE_IRFIFOSTS_RX_FULL 0x10
|
#define CIR_WAKE_IRFIFOSTS_RX_FULL 0x10
|
||||||
|
|
||||||
/* CIR Wake FIFO buffer is 67 bytes long */
|
/*
|
||||||
#define CIR_WAKE_FIFO_LEN 67
|
* The CIR Wake FIFO buffer is 67 bytes long, but the stock remote wakes
|
||||||
|
* the system comparing only 65 bytes (fails with this set to 67)
|
||||||
|
*/
|
||||||
|
#define CIR_WAKE_FIFO_CMP_BYTES 65
|
||||||
/* CIR Wake byte comparison tolerance */
|
/* CIR Wake byte comparison tolerance */
|
||||||
#define CIR_WAKE_CMP_TOLERANCE 5
|
#define CIR_WAKE_CMP_TOLERANCE 5
|
||||||
|
|
||||||
|
|
|
@ -850,7 +850,7 @@ static ssize_t store_protocols(struct device *device,
|
||||||
count++;
|
count++;
|
||||||
} else {
|
} else {
|
||||||
for (i = 0; i < ARRAY_SIZE(proto_names); i++) {
|
for (i = 0; i < ARRAY_SIZE(proto_names); i++) {
|
||||||
if (!strncasecmp(tmp, proto_names[i].name, strlen(proto_names[i].name))) {
|
if (!strcasecmp(tmp, proto_names[i].name)) {
|
||||||
tmp += strlen(proto_names[i].name);
|
tmp += strlen(proto_names[i].name);
|
||||||
mask = proto_names[i].type;
|
mask = proto_names[i].type;
|
||||||
break;
|
break;
|
||||||
|
|
|
@ -1758,7 +1758,12 @@ static int vidioc_reqbufs(struct file *file, void *priv,
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
return rc;
|
return rc;
|
||||||
|
|
||||||
return videobuf_reqbufs(&fh->vb_vidq, rb);
|
if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
|
||||||
|
rc = videobuf_reqbufs(&fh->vb_vidq, rb);
|
||||||
|
else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
|
||||||
|
rc = videobuf_reqbufs(&fh->vb_vbiq, rb);
|
||||||
|
|
||||||
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int vidioc_querybuf(struct file *file, void *priv,
|
static int vidioc_querybuf(struct file *file, void *priv,
|
||||||
|
@ -1772,7 +1777,12 @@ static int vidioc_querybuf(struct file *file, void *priv,
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
return rc;
|
return rc;
|
||||||
|
|
||||||
return videobuf_querybuf(&fh->vb_vidq, b);
|
if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
|
||||||
|
rc = videobuf_querybuf(&fh->vb_vidq, b);
|
||||||
|
else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
|
||||||
|
rc = videobuf_querybuf(&fh->vb_vbiq, b);
|
||||||
|
|
||||||
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b)
|
static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b)
|
||||||
|
@ -1785,7 +1795,12 @@ static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *b)
|
||||||
if (rc < 0)
|
if (rc < 0)
|
||||||
return rc;
|
return rc;
|
||||||
|
|
||||||
return videobuf_qbuf(&fh->vb_vidq, b);
|
if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
|
||||||
|
rc = videobuf_qbuf(&fh->vb_vidq, b);
|
||||||
|
else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
|
||||||
|
rc = videobuf_qbuf(&fh->vb_vbiq, b);
|
||||||
|
|
||||||
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b)
|
static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b)
|
||||||
|
@ -1806,7 +1821,12 @@ static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b)
|
||||||
dev->greenscreen_detected = 0;
|
dev->greenscreen_detected = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return videobuf_dqbuf(&fh->vb_vidq, b, file->f_flags & O_NONBLOCK);
|
if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
|
||||||
|
rc = videobuf_dqbuf(&fh->vb_vidq, b, file->f_flags & O_NONBLOCK);
|
||||||
|
else if (fh->type == V4L2_BUF_TYPE_VBI_CAPTURE)
|
||||||
|
rc = videobuf_dqbuf(&fh->vb_vbiq, b, file->f_flags & O_NONBLOCK);
|
||||||
|
|
||||||
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct v4l2_file_operations au0828_v4l_fops = {
|
static struct v4l2_file_operations au0828_v4l_fops = {
|
||||||
|
|
|
@ -95,6 +95,53 @@ static const struct cx18_card cx18_card_hvr1600_esmt = {
|
||||||
.i2c = &cx18_i2c_std,
|
.i2c = &cx18_i2c_std,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const struct cx18_card cx18_card_hvr1600_s5h1411 = {
|
||||||
|
.type = CX18_CARD_HVR_1600_S5H1411,
|
||||||
|
.name = "Hauppauge HVR-1600",
|
||||||
|
.comment = "Simultaneous Digital and Analog TV capture supported\n",
|
||||||
|
.v4l2_capabilities = CX18_CAP_ENCODER,
|
||||||
|
.hw_audio_ctrl = CX18_HW_418_AV,
|
||||||
|
.hw_muxer = CX18_HW_CS5345,
|
||||||
|
.hw_all = CX18_HW_TVEEPROM | CX18_HW_418_AV | CX18_HW_TUNER |
|
||||||
|
CX18_HW_CS5345 | CX18_HW_DVB | CX18_HW_GPIO_RESET_CTRL |
|
||||||
|
CX18_HW_Z8F0811_IR_HAUP,
|
||||||
|
.video_inputs = {
|
||||||
|
{ CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE7 },
|
||||||
|
{ CX18_CARD_INPUT_SVIDEO1, 1, CX18_AV_SVIDEO1 },
|
||||||
|
{ CX18_CARD_INPUT_COMPOSITE1, 1, CX18_AV_COMPOSITE3 },
|
||||||
|
{ CX18_CARD_INPUT_SVIDEO2, 2, CX18_AV_SVIDEO2 },
|
||||||
|
{ CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE4 },
|
||||||
|
},
|
||||||
|
.audio_inputs = {
|
||||||
|
{ CX18_CARD_INPUT_AUD_TUNER,
|
||||||
|
CX18_AV_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 },
|
||||||
|
{ CX18_CARD_INPUT_LINE_IN1,
|
||||||
|
CX18_AV_AUDIO_SERIAL1, CS5345_IN_2 },
|
||||||
|
{ CX18_CARD_INPUT_LINE_IN2,
|
||||||
|
CX18_AV_AUDIO_SERIAL1, CS5345_IN_3 },
|
||||||
|
},
|
||||||
|
.radio_input = { CX18_CARD_INPUT_AUD_TUNER,
|
||||||
|
CX18_AV_AUDIO_SERIAL1, CS5345_IN_4 },
|
||||||
|
.ddr = {
|
||||||
|
/* ESMT M13S128324A-5B memory */
|
||||||
|
.chip_config = 0x003,
|
||||||
|
.refresh = 0x30c,
|
||||||
|
.timing1 = 0x44220e82,
|
||||||
|
.timing2 = 0x08,
|
||||||
|
.tune_lane = 0,
|
||||||
|
.initial_emrs = 0,
|
||||||
|
},
|
||||||
|
.gpio_init.initial_value = 0x3001,
|
||||||
|
.gpio_init.direction = 0x3001,
|
||||||
|
.gpio_i2c_slave_reset = {
|
||||||
|
.active_lo_mask = 0x3001,
|
||||||
|
.msecs_asserted = 10,
|
||||||
|
.msecs_recovery = 40,
|
||||||
|
.ir_reset_mask = 0x0001,
|
||||||
|
},
|
||||||
|
.i2c = &cx18_i2c_std,
|
||||||
|
};
|
||||||
|
|
||||||
static const struct cx18_card cx18_card_hvr1600_samsung = {
|
static const struct cx18_card cx18_card_hvr1600_samsung = {
|
||||||
.type = CX18_CARD_HVR_1600_SAMSUNG,
|
.type = CX18_CARD_HVR_1600_SAMSUNG,
|
||||||
.name = "Hauppauge HVR-1600 (Preproduction)",
|
.name = "Hauppauge HVR-1600 (Preproduction)",
|
||||||
|
@ -523,7 +570,8 @@ static const struct cx18_card *cx18_card_list[] = {
|
||||||
&cx18_card_toshiba_qosmio_dvbt,
|
&cx18_card_toshiba_qosmio_dvbt,
|
||||||
&cx18_card_leadtek_pvr2100,
|
&cx18_card_leadtek_pvr2100,
|
||||||
&cx18_card_leadtek_dvr3100h,
|
&cx18_card_leadtek_dvr3100h,
|
||||||
&cx18_card_gotview_dvd3
|
&cx18_card_gotview_dvd3,
|
||||||
|
&cx18_card_hvr1600_s5h1411
|
||||||
};
|
};
|
||||||
|
|
||||||
const struct cx18_card *cx18_get_card(u16 index)
|
const struct cx18_card *cx18_get_card(u16 index)
|
||||||
|
|
|
@ -157,6 +157,7 @@ MODULE_PARM_DESC(cardtype,
|
||||||
"\t\t\t 7 = Leadtek WinFast PVR2100\n"
|
"\t\t\t 7 = Leadtek WinFast PVR2100\n"
|
||||||
"\t\t\t 8 = Leadtek WinFast DVR3100 H\n"
|
"\t\t\t 8 = Leadtek WinFast DVR3100 H\n"
|
||||||
"\t\t\t 9 = GoTView PCI DVD3 Hybrid\n"
|
"\t\t\t 9 = GoTView PCI DVD3 Hybrid\n"
|
||||||
|
"\t\t\t 10 = Hauppauge HVR 1600 (S5H1411)\n"
|
||||||
"\t\t\t 0 = Autodetect (default)\n"
|
"\t\t\t 0 = Autodetect (default)\n"
|
||||||
"\t\t\t-1 = Ignore this card\n\t\t");
|
"\t\t\t-1 = Ignore this card\n\t\t");
|
||||||
MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60");
|
MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60");
|
||||||
|
@ -337,6 +338,7 @@ void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv)
|
||||||
switch (cx->card->type) {
|
switch (cx->card->type) {
|
||||||
case CX18_CARD_HVR_1600_ESMT:
|
case CX18_CARD_HVR_1600_ESMT:
|
||||||
case CX18_CARD_HVR_1600_SAMSUNG:
|
case CX18_CARD_HVR_1600_SAMSUNG:
|
||||||
|
case CX18_CARD_HVR_1600_S5H1411:
|
||||||
tveeprom_hauppauge_analog(&c, tv, eedata);
|
tveeprom_hauppauge_analog(&c, tv, eedata);
|
||||||
break;
|
break;
|
||||||
case CX18_CARD_YUAN_MPC718:
|
case CX18_CARD_YUAN_MPC718:
|
||||||
|
@ -365,7 +367,25 @@ static void cx18_process_eeprom(struct cx18 *cx)
|
||||||
from the model number. Use the cardtype module option if you
|
from the model number. Use the cardtype module option if you
|
||||||
have one of these preproduction models. */
|
have one of these preproduction models. */
|
||||||
switch (tv.model) {
|
switch (tv.model) {
|
||||||
case 74000 ... 74999:
|
case 74301: /* Retail models */
|
||||||
|
case 74321:
|
||||||
|
case 74351: /* OEM models */
|
||||||
|
case 74361:
|
||||||
|
/* Digital side is s5h1411/tda18271 */
|
||||||
|
cx->card = cx18_get_card(CX18_CARD_HVR_1600_S5H1411);
|
||||||
|
break;
|
||||||
|
case 74021: /* Retail models */
|
||||||
|
case 74031:
|
||||||
|
case 74041:
|
||||||
|
case 74141:
|
||||||
|
case 74541: /* OEM models */
|
||||||
|
case 74551:
|
||||||
|
case 74591:
|
||||||
|
case 74651:
|
||||||
|
case 74691:
|
||||||
|
case 74751:
|
||||||
|
case 74891:
|
||||||
|
/* Digital side is s5h1409/mxl5005s */
|
||||||
cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT);
|
cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT);
|
||||||
break;
|
break;
|
||||||
case 0x718:
|
case 0x718:
|
||||||
|
@ -377,7 +397,8 @@ static void cx18_process_eeprom(struct cx18 *cx)
|
||||||
CX18_ERR("Invalid EEPROM\n");
|
CX18_ERR("Invalid EEPROM\n");
|
||||||
return;
|
return;
|
||||||
default:
|
default:
|
||||||
CX18_ERR("Unknown model %d, defaulting to HVR-1600\n", tv.model);
|
CX18_ERR("Unknown model %d, defaulting to original HVR-1600 "
|
||||||
|
"(cardtype=1)\n", tv.model);
|
||||||
cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT);
|
cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
@ -85,7 +85,8 @@
|
||||||
#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
|
#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
|
||||||
#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
|
#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
|
||||||
#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */
|
#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */
|
||||||
#define CX18_CARD_LAST 8
|
#define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/
|
||||||
|
#define CX18_CARD_LAST 9
|
||||||
|
|
||||||
#define CX18_ENC_STREAM_TYPE_MPG 0
|
#define CX18_ENC_STREAM_TYPE_MPG 0
|
||||||
#define CX18_ENC_STREAM_TYPE_TS 1
|
#define CX18_ENC_STREAM_TYPE_TS 1
|
||||||
|
|
|
@ -29,6 +29,8 @@
|
||||||
#include "cx18-gpio.h"
|
#include "cx18-gpio.h"
|
||||||
#include "s5h1409.h"
|
#include "s5h1409.h"
|
||||||
#include "mxl5005s.h"
|
#include "mxl5005s.h"
|
||||||
|
#include "s5h1411.h"
|
||||||
|
#include "tda18271.h"
|
||||||
#include "zl10353.h"
|
#include "zl10353.h"
|
||||||
|
|
||||||
#include <linux/firmware.h>
|
#include <linux/firmware.h>
|
||||||
|
@ -76,6 +78,32 @@ static struct s5h1409_config hauppauge_hvr1600_config = {
|
||||||
.hvr1600_opt = S5H1409_HVR1600_OPTIMIZE
|
.hvr1600_opt = S5H1409_HVR1600_OPTIMIZE
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* CX18_CARD_HVR_1600_S5H1411
|
||||||
|
*/
|
||||||
|
static struct s5h1411_config hcw_s5h1411_config = {
|
||||||
|
.output_mode = S5H1411_SERIAL_OUTPUT,
|
||||||
|
.gpio = S5H1411_GPIO_OFF,
|
||||||
|
.vsb_if = S5H1411_IF_44000,
|
||||||
|
.qam_if = S5H1411_IF_4000,
|
||||||
|
.inversion = S5H1411_INVERSION_ON,
|
||||||
|
.status_mode = S5H1411_DEMODLOCKING,
|
||||||
|
.mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct tda18271_std_map hauppauge_tda18271_std_map = {
|
||||||
|
.atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
|
||||||
|
.if_lvl = 6, .rfagc_top = 0x37 },
|
||||||
|
.qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
|
||||||
|
.if_lvl = 6, .rfagc_top = 0x37 },
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct tda18271_config hauppauge_tda18271_config = {
|
||||||
|
.std_map = &hauppauge_tda18271_std_map,
|
||||||
|
.gate = TDA18271_GATE_DIGITAL,
|
||||||
|
.output_opt = TDA18271_OUTPUT_LT_OFF,
|
||||||
|
};
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CX18_CARD_LEADTEK_DVR3100H
|
* CX18_CARD_LEADTEK_DVR3100H
|
||||||
*/
|
*/
|
||||||
|
@ -244,6 +272,7 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed)
|
||||||
switch (cx->card->type) {
|
switch (cx->card->type) {
|
||||||
case CX18_CARD_HVR_1600_ESMT:
|
case CX18_CARD_HVR_1600_ESMT:
|
||||||
case CX18_CARD_HVR_1600_SAMSUNG:
|
case CX18_CARD_HVR_1600_SAMSUNG:
|
||||||
|
case CX18_CARD_HVR_1600_S5H1411:
|
||||||
v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
|
v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL);
|
||||||
v |= 0x00400000; /* Serial Mode */
|
v |= 0x00400000; /* Serial Mode */
|
||||||
v |= 0x00002000; /* Data Length - Byte */
|
v |= 0x00002000; /* Data Length - Byte */
|
||||||
|
@ -455,6 +484,15 @@ static int dvb_register(struct cx18_stream *stream)
|
||||||
ret = 0;
|
ret = 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
case CX18_CARD_HVR_1600_S5H1411:
|
||||||
|
dvb->fe = dvb_attach(s5h1411_attach,
|
||||||
|
&hcw_s5h1411_config,
|
||||||
|
&cx->i2c_adap[0]);
|
||||||
|
if (dvb->fe != NULL)
|
||||||
|
dvb_attach(tda18271_attach, dvb->fe,
|
||||||
|
0x60, &cx->i2c_adap[0],
|
||||||
|
&hauppauge_tda18271_config);
|
||||||
|
break;
|
||||||
case CX18_CARD_LEADTEK_DVR3100H:
|
case CX18_CARD_LEADTEK_DVR3100H:
|
||||||
dvb->fe = dvb_attach(zl10353_attach,
|
dvb->fe = dvb_attach(zl10353_attach,
|
||||||
&leadtek_dvr3100h_demod,
|
&leadtek_dvr3100h_demod,
|
||||||
|
|
|
@ -122,10 +122,6 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap,
|
||||||
|
|
||||||
if (!i2c_wait_done(i2c_adap))
|
if (!i2c_wait_done(i2c_adap))
|
||||||
goto eio;
|
goto eio;
|
||||||
if (!i2c_slave_did_ack(i2c_adap)) {
|
|
||||||
retval = -ENXIO;
|
|
||||||
goto err;
|
|
||||||
}
|
|
||||||
if (i2c_debug) {
|
if (i2c_debug) {
|
||||||
printk(" <W %02x %02x", msg->addr << 1, msg->buf[0]);
|
printk(" <W %02x %02x", msg->addr << 1, msg->buf[0]);
|
||||||
if (!(ctrl & I2C_NOSTOP))
|
if (!(ctrl & I2C_NOSTOP))
|
||||||
|
@ -158,7 +154,6 @@ static int i2c_sendbytes(struct i2c_adapter *i2c_adap,
|
||||||
|
|
||||||
eio:
|
eio:
|
||||||
retval = -EIO;
|
retval = -EIO;
|
||||||
err:
|
|
||||||
if (i2c_debug)
|
if (i2c_debug)
|
||||||
printk(KERN_ERR " ERR: %d\n", retval);
|
printk(KERN_ERR " ERR: %d\n", retval);
|
||||||
return retval;
|
return retval;
|
||||||
|
@ -209,10 +204,6 @@ static int i2c_readbytes(struct i2c_adapter *i2c_adap,
|
||||||
|
|
||||||
if (!i2c_wait_done(i2c_adap))
|
if (!i2c_wait_done(i2c_adap))
|
||||||
goto eio;
|
goto eio;
|
||||||
if (cnt == 0 && !i2c_slave_did_ack(i2c_adap)) {
|
|
||||||
retval = -ENXIO;
|
|
||||||
goto err;
|
|
||||||
}
|
|
||||||
msg->buf[cnt] = cx_read(bus->reg_rdata) & 0xff;
|
msg->buf[cnt] = cx_read(bus->reg_rdata) & 0xff;
|
||||||
if (i2c_debug) {
|
if (i2c_debug) {
|
||||||
dprintk(1, " %02x", msg->buf[cnt]);
|
dprintk(1, " %02x", msg->buf[cnt]);
|
||||||
|
@ -224,7 +215,6 @@ static int i2c_readbytes(struct i2c_adapter *i2c_adap,
|
||||||
|
|
||||||
eio:
|
eio:
|
||||||
retval = -EIO;
|
retval = -EIO;
|
||||||
err:
|
|
||||||
if (i2c_debug)
|
if (i2c_debug)
|
||||||
printk(KERN_ERR " ERR: %d\n", retval);
|
printk(KERN_ERR " ERR: %d\n", retval);
|
||||||
return retval;
|
return retval;
|
||||||
|
|
|
@ -2015,7 +2015,8 @@ static int cx25840_probe(struct i2c_client *client,
|
||||||
kfree(state);
|
kfree(state);
|
||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
v4l2_ctrl_cluster(2, &state->volume);
|
if (!is_cx2583x(state))
|
||||||
|
v4l2_ctrl_cluster(2, &state->volume);
|
||||||
v4l2_ctrl_handler_setup(&state->hdl);
|
v4l2_ctrl_handler_setup(&state->hdl);
|
||||||
|
|
||||||
if (client->dev.platform_data) {
|
if (client->dev.platform_data) {
|
||||||
|
|
|
@ -628,22 +628,66 @@ static void ivtv_irq_enc_pio_complete(struct ivtv *itv)
|
||||||
static void ivtv_irq_dma_err(struct ivtv *itv)
|
static void ivtv_irq_dma_err(struct ivtv *itv)
|
||||||
{
|
{
|
||||||
u32 data[CX2341X_MBOX_MAX_DATA];
|
u32 data[CX2341X_MBOX_MAX_DATA];
|
||||||
|
u32 status;
|
||||||
|
|
||||||
del_timer(&itv->dma_timer);
|
del_timer(&itv->dma_timer);
|
||||||
|
|
||||||
ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data);
|
ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, 2, data);
|
||||||
|
status = read_reg(IVTV_REG_DMASTATUS);
|
||||||
IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1],
|
IVTV_DEBUG_WARN("DMA ERROR %08x %08x %08x %d\n", data[0], data[1],
|
||||||
read_reg(IVTV_REG_DMASTATUS), itv->cur_dma_stream);
|
status, itv->cur_dma_stream);
|
||||||
write_reg(read_reg(IVTV_REG_DMASTATUS) & 3, IVTV_REG_DMASTATUS);
|
/*
|
||||||
|
* We do *not* write back to the IVTV_REG_DMASTATUS register to
|
||||||
|
* clear the error status, if either the encoder write (0x02) or
|
||||||
|
* decoder read (0x01) bus master DMA operation do not indicate
|
||||||
|
* completed. We can race with the DMA engine, which may have
|
||||||
|
* transitioned to completed status *after* we read the register.
|
||||||
|
* Setting a IVTV_REG_DMASTATUS flag back to "busy" status, after the
|
||||||
|
* DMA engine has completed, will cause the DMA engine to stop working.
|
||||||
|
*/
|
||||||
|
status &= 0x3;
|
||||||
|
if (status == 0x3)
|
||||||
|
write_reg(status, IVTV_REG_DMASTATUS);
|
||||||
|
|
||||||
if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) &&
|
if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) &&
|
||||||
itv->cur_dma_stream >= 0 && itv->cur_dma_stream < IVTV_MAX_STREAMS) {
|
itv->cur_dma_stream >= 0 && itv->cur_dma_stream < IVTV_MAX_STREAMS) {
|
||||||
struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream];
|
struct ivtv_stream *s = &itv->streams[itv->cur_dma_stream];
|
||||||
|
|
||||||
/* retry */
|
if (s->type >= IVTV_DEC_STREAM_TYPE_MPG) {
|
||||||
if (s->type >= IVTV_DEC_STREAM_TYPE_MPG)
|
/* retry */
|
||||||
|
/*
|
||||||
|
* FIXME - handle cases of DMA error similar to
|
||||||
|
* encoder below, except conditioned on status & 0x1
|
||||||
|
*/
|
||||||
ivtv_dma_dec_start(s);
|
ivtv_dma_dec_start(s);
|
||||||
else
|
return;
|
||||||
ivtv_dma_enc_start(s);
|
} else {
|
||||||
return;
|
if ((status & 0x2) == 0) {
|
||||||
|
/*
|
||||||
|
* CX2341x Bus Master DMA write is ongoing.
|
||||||
|
* Reset the timer and let it complete.
|
||||||
|
*/
|
||||||
|
itv->dma_timer.expires =
|
||||||
|
jiffies + msecs_to_jiffies(600);
|
||||||
|
add_timer(&itv->dma_timer);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (itv->dma_retries < 3) {
|
||||||
|
/*
|
||||||
|
* CX2341x Bus Master DMA write has ended.
|
||||||
|
* Retry the write, starting with the first
|
||||||
|
* xfer segment. Just retrying the current
|
||||||
|
* segment is not sufficient.
|
||||||
|
*/
|
||||||
|
s->sg_processed = 0;
|
||||||
|
itv->dma_retries++;
|
||||||
|
ivtv_dma_enc_start_xfer(s);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
/* Too many retries, give up on this one */
|
||||||
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
if (test_bit(IVTV_F_I_UDMA, &itv->i_flags)) {
|
if (test_bit(IVTV_F_I_UDMA, &itv->i_flags)) {
|
||||||
ivtv_udma_start(itv);
|
ivtv_udma_start(itv);
|
||||||
|
|
|
@ -1011,7 +1011,6 @@ static int m2mtest_remove(struct platform_device *pdev)
|
||||||
v4l2_m2m_release(dev->m2m_dev);
|
v4l2_m2m_release(dev->m2m_dev);
|
||||||
del_timer_sync(&dev->timer);
|
del_timer_sync(&dev->timer);
|
||||||
video_unregister_device(dev->vfd);
|
video_unregister_device(dev->vfd);
|
||||||
video_device_release(dev->vfd);
|
|
||||||
v4l2_device_unregister(&dev->v4l2_dev);
|
v4l2_device_unregister(&dev->v4l2_dev);
|
||||||
kfree(dev);
|
kfree(dev);
|
||||||
|
|
||||||
|
|
|
@ -57,7 +57,7 @@
|
||||||
#include <linux/usb.h>
|
#include <linux/usb.h>
|
||||||
|
|
||||||
#define S2255_MAJOR_VERSION 1
|
#define S2255_MAJOR_VERSION 1
|
||||||
#define S2255_MINOR_VERSION 20
|
#define S2255_MINOR_VERSION 21
|
||||||
#define S2255_RELEASE 0
|
#define S2255_RELEASE 0
|
||||||
#define S2255_VERSION KERNEL_VERSION(S2255_MAJOR_VERSION, \
|
#define S2255_VERSION KERNEL_VERSION(S2255_MAJOR_VERSION, \
|
||||||
S2255_MINOR_VERSION, \
|
S2255_MINOR_VERSION, \
|
||||||
|
@ -312,9 +312,9 @@ struct s2255_fh {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* current cypress EEPROM firmware version */
|
/* current cypress EEPROM firmware version */
|
||||||
#define S2255_CUR_USB_FWVER ((3 << 8) | 6)
|
#define S2255_CUR_USB_FWVER ((3 << 8) | 11)
|
||||||
/* current DSP FW version */
|
/* current DSP FW version */
|
||||||
#define S2255_CUR_DSP_FWVER 8
|
#define S2255_CUR_DSP_FWVER 10102
|
||||||
/* Need DSP version 5+ for video status feature */
|
/* Need DSP version 5+ for video status feature */
|
||||||
#define S2255_MIN_DSP_STATUS 5
|
#define S2255_MIN_DSP_STATUS 5
|
||||||
#define S2255_MIN_DSP_COLORFILTER 8
|
#define S2255_MIN_DSP_COLORFILTER 8
|
||||||
|
@ -492,9 +492,11 @@ static void planar422p_to_yuv_packed(const unsigned char *in,
|
||||||
|
|
||||||
static void s2255_reset_dsppower(struct s2255_dev *dev)
|
static void s2255_reset_dsppower(struct s2255_dev *dev)
|
||||||
{
|
{
|
||||||
s2255_vendor_req(dev, 0x40, 0x0b0b, 0x0b0b, NULL, 0, 1);
|
s2255_vendor_req(dev, 0x40, 0x0b0b, 0x0b01, NULL, 0, 1);
|
||||||
msleep(10);
|
msleep(10);
|
||||||
s2255_vendor_req(dev, 0x50, 0x0000, 0x0000, NULL, 0, 1);
|
s2255_vendor_req(dev, 0x50, 0x0000, 0x0000, NULL, 0, 1);
|
||||||
|
msleep(600);
|
||||||
|
s2255_vendor_req(dev, 0x10, 0x0000, 0x0000, NULL, 0, 1);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -449,6 +449,7 @@ static const struct i2c_device_id bmp085_id[] = {
|
||||||
{ "bmp085", 0 },
|
{ "bmp085", 0 },
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
|
MODULE_DEVICE_TABLE(i2c, bmp085_id);
|
||||||
|
|
||||||
static struct i2c_driver bmp085_driver = {
|
static struct i2c_driver bmp085_driver = {
|
||||||
.driver = {
|
.driver = {
|
||||||
|
|
|
@ -1529,7 +1529,7 @@ void mmc_rescan(struct work_struct *work)
|
||||||
* still present
|
* still present
|
||||||
*/
|
*/
|
||||||
if (host->bus_ops && host->bus_ops->detect && !host->bus_dead
|
if (host->bus_ops && host->bus_ops->detect && !host->bus_dead
|
||||||
&& mmc_card_is_removable(host))
|
&& !(host->caps & MMC_CAP_NONREMOVABLE))
|
||||||
host->bus_ops->detect(host);
|
host->bus_ops->detect(host);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -792,7 +792,6 @@ int mmc_attach_sdio(struct mmc_host *host)
|
||||||
*/
|
*/
|
||||||
mmc_release_host(host);
|
mmc_release_host(host);
|
||||||
err = mmc_add_card(host->card);
|
err = mmc_add_card(host->card);
|
||||||
mmc_claim_host(host);
|
|
||||||
if (err)
|
if (err)
|
||||||
goto remove_added;
|
goto remove_added;
|
||||||
|
|
||||||
|
@ -805,12 +804,12 @@ int mmc_attach_sdio(struct mmc_host *host)
|
||||||
goto remove_added;
|
goto remove_added;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
mmc_claim_host(host);
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
|
||||||
remove_added:
|
remove_added:
|
||||||
/* Remove without lock if the device has been added. */
|
/* Remove without lock if the device has been added. */
|
||||||
mmc_release_host(host);
|
|
||||||
mmc_sdio_remove(host);
|
mmc_sdio_remove(host);
|
||||||
mmc_claim_host(host);
|
mmc_claim_host(host);
|
||||||
remove:
|
remove:
|
||||||
|
|
|
@ -181,6 +181,9 @@ static int __init colibri_pcmcia_init(void)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
if (!machine_is_colibri() && !machine_is_colibri320())
|
||||||
|
return -ENODEV;
|
||||||
|
|
||||||
colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
|
colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
|
||||||
if (!colibri_pcmcia_device)
|
if (!colibri_pcmcia_device)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
@ -6,7 +6,7 @@ comment "PPS generators support"
|
||||||
|
|
||||||
config PPS_GENERATOR_PARPORT
|
config PPS_GENERATOR_PARPORT
|
||||||
tristate "Parallel port PPS signal generator"
|
tristate "Parallel port PPS signal generator"
|
||||||
depends on PARPORT
|
depends on PARPORT && BROKEN
|
||||||
help
|
help
|
||||||
If you say yes here you get support for a PPS signal generator which
|
If you say yes here you get support for a PPS signal generator which
|
||||||
utilizes STROBE pin of a parallel port to send PPS signals. It uses
|
utilizes STROBE pin of a parallel port to send PPS signals. It uses
|
||||||
|
|
|
@ -77,18 +77,20 @@ static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Update control registers */
|
/* Update control registers */
|
||||||
static void s3c_rtc_setaie(int to)
|
static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
|
||||||
{
|
{
|
||||||
unsigned int tmp;
|
unsigned int tmp;
|
||||||
|
|
||||||
pr_debug("%s: aie=%d\n", __func__, to);
|
pr_debug("%s: aie=%d\n", __func__, enabled);
|
||||||
|
|
||||||
tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
|
tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
|
||||||
|
|
||||||
if (to)
|
if (enabled)
|
||||||
tmp |= S3C2410_RTCALM_ALMEN;
|
tmp |= S3C2410_RTCALM_ALMEN;
|
||||||
|
|
||||||
writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
|
writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int s3c_rtc_setpie(struct device *dev, int enabled)
|
static int s3c_rtc_setpie(struct device *dev, int enabled)
|
||||||
|
@ -308,7 +310,7 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
|
||||||
|
|
||||||
writeb(alrm_en, base + S3C2410_RTCALM);
|
writeb(alrm_en, base + S3C2410_RTCALM);
|
||||||
|
|
||||||
s3c_rtc_setaie(alrm->enabled);
|
s3c_rtc_setaie(dev, alrm->enabled);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -440,7 +442,7 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
|
||||||
rtc_device_unregister(rtc);
|
rtc_device_unregister(rtc);
|
||||||
|
|
||||||
s3c_rtc_setpie(&dev->dev, 0);
|
s3c_rtc_setpie(&dev->dev, 0);
|
||||||
s3c_rtc_setaie(0);
|
s3c_rtc_setaie(&dev->dev, 0);
|
||||||
|
|
||||||
clk_disable(rtc_clk);
|
clk_disable(rtc_clk);
|
||||||
clk_put(rtc_clk);
|
clk_put(rtc_clk);
|
||||||
|
|
|
@ -62,8 +62,8 @@ static int xpram_devs;
|
||||||
/*
|
/*
|
||||||
* Parameter parsing functions.
|
* Parameter parsing functions.
|
||||||
*/
|
*/
|
||||||
static int __initdata devs = XPRAM_DEVS;
|
static int devs = XPRAM_DEVS;
|
||||||
static char __initdata *sizes[XPRAM_MAX_DEVS];
|
static char *sizes[XPRAM_MAX_DEVS];
|
||||||
|
|
||||||
module_param(devs, int, 0);
|
module_param(devs, int, 0);
|
||||||
module_param_array(sizes, charp, NULL, 0);
|
module_param_array(sizes, charp, NULL, 0);
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue