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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next 

Freescale updates from Scott:

"Highlights include moving QE code out of arch/powerpc (to be shared with
arm), device tree updates, and minor fixes."
This commit is contained in:
Michael Ellerman 2016-01-14 09:55:01 +11:00
parent a61674bdfc 44451d4d8f
commit be6bfc29bc
78 changed files with 907 additions and 338 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

63
Documentation/devicetree/bindings/thermal/qoriq-thermal.txt Normal file
View File

@ -0,0 +1,63 @@
* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
Required properties:
- compatible : Must include "fsl,qoriq-tmu". The version of the device is
determined by the TMU IP Block Revision Register (IPBRR0) at
offset 0x0BF8.
Table of correspondences between IPBRR0 values and example chips:
Value Device
---------- -----
0x01900102 T1040
- reg : Address range of TMU registers.
- interrupts : Contains the interrupt for TMU.
- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
the SoC reference manual. The first cell is TTR0CR, the second is
TTR1CR, etc.
- fsl,tmu-calibration : A list of cell pairs containing temperature
calibration data, as specified by the SoC reference manual.
The first cell of each pair is the value to be written to TTCFGR,
and the second is the value to be written to TSCFGR.
Example:
tmu@f0000 {
compatible = "fsl,qoriq-tmu";
reg = <0xf0000 0x1000>;
interrupts = <18 2 0 0>;
fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
fsl,tmu-calibration = <0x00000000 0x00000025
0x00000001 0x00000028
0x00000002 0x0000002d
0x00000003 0x00000031
0x00000004 0x00000036
0x00000005 0x0000003a
0x00000006 0x00000040
0x00000007 0x00000044
0x00000008 0x0000004a
0x00000009 0x0000004f
0x0000000a 0x00000054
0x00010000 0x0000000d
0x00010001 0x00000013
0x00010002 0x00000019
0x00010003 0x0000001f
0x00010004 0x00000025
0x00010005 0x0000002d
0x00010006 0x00000033
0x00010007 0x00000043
0x00010008 0x0000004b
0x00010009 0x00000053
0x00020000 0x00000010
0x00020001 0x00000017
0x00020002 0x0000001f
0x00020003 0x00000029
0x00020004 0x00000031
0x00020005 0x0000003c
0x00020006 0x00000042
0x00020007 0x0000004d
0x00020008 0x00000056
0x00030000 0x00000012
0x00030001 0x0000001d>;
};

7
MAINTAINERS
View File

@ -4489,8 +4489,9 @@ F: include/linux/fs_enet_pd.h
FREESCALE QUICC ENGINE LIBRARY
L: linuxppc-dev@lists.ozlabs.org
S: Orphan
F: arch/powerpc/sysdev/qe_lib/
F: arch/powerpc/include/asm/*qe.h
F: drivers/soc/fsl/qe/
F: include/soc/fsl/*qe*.h
F: include/soc/fsl/*ucc*.h
FREESCALE USB PERIPHERAL DRIVERS
M: Li Yang <leoli@freescale.com>
@ -6428,7 +6429,7 @@ S: Maintained
F: arch/powerpc/platforms/8xx/
LINUX FOR POWERPC EMBEDDED PPC83XX AND PPC85XX
M: Scott Wood <scottwood@freescale.com>
M: Scott Wood <oss@buserror.net>
M: Kumar Gala <galak@kernel.crashing.org>
W: http://www.penguinppc.org/
L: linuxppc-dev@lists.ozlabs.org

2
arch/powerpc/Kconfig
View File

@ -1076,8 +1076,6 @@ source "drivers/Kconfig"
source "fs/Kconfig"
source "arch/powerpc/sysdev/qe_lib/Kconfig"
source "lib/Kconfig"
source "arch/powerpc/Kconfig.debug"

5
arch/powerpc/boot/dts/fsl/b4si-post.dtsi
View File

@ -474,6 +474,11 @@
fman@400000 {
interrupts = <96 2 0 0>, <16 2 1 30>;
muram@0 {
compatible = "fsl,fman-muram";
reg = <0x0 0x80000>;
};
enet0: ethernet@e0000 {
};

15
arch/powerpc/boot/dts/fsl/bsc9132qds.dts
View File

@ -29,6 +29,21 @@
soc: soc@ff700000 {
ranges = <0x0 0x0 0xff700000 0x100000>;
};
pci0: pcie@ff70a000 {
reg = <0 0xff70a000 0 0x1000>;
ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0x90000000
0x2000000 0x0 0x90000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
/include/ "bsc9132qds.dtsi"

28
arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
View File

@ -40,6 +40,34 @@
interrupts = <16 2 0 0 20 2 0 0>;
};
/* controller at 0xa000 */
&pci0 {
compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
bus-range = <0 255>;
interrupts = <16 2 0 0>;
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0x0 0x0 0x1 &mpic 0x0 0x2 0x0 0x0
0000 0x0 0x0 0x2 &mpic 0x1 0x2 0x0 0x0
0000 0x0 0x0 0x3 &mpic 0x2 0x2 0x0 0x0
0000 0x0 0x0 0x4 &mpic 0x3 0x2 0x0 0x0
>;
};
};
&soc {
#address-cells = <1>;
#size-cells = <1>;

1
arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
View File

@ -45,6 +45,7 @@
serial0 = &serial0;
ethernet0 = &enet0;
ethernet1 = &enet1;
pci0 = &pci0;
};
cpus {

16
arch/powerpc/boot/dts/fsl/p1010rdb.dtsi
View File

@ -215,3 +215,19 @@
phy-connection-type = "sgmii";
};
};
&pci0 {
pcie@0 {
interrupt-map = <
/* IDSEL 0x0 */
/*
*irq[4:5] are active-high
*irq[6:7] are active-low
*/
0000 0x0 0x0 0x1 &mpic 0x4 0x2 0x0 0x0
0000 0x0 0x0 0x2 &mpic 0x5 0x2 0x0 0x0
0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
>;
};
};

2
arch/powerpc/boot/dts/fsl/t1023rdb.dts
View File

@ -159,4 +159,4 @@
};
};
/include/ "t1023si-post.dtsi"
#include "t1023si-post.dtsi"

86
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
View File

@ -32,6 +32,8 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/thermal/thermal.h>
&ifc {
#address-cells = <2>;
#size-cells = <1>;
@ -275,6 +277,90 @@
reg = <0xea000 0x4000>;
};
tmu: tmu@f0000 {
compatible = "fsl,qoriq-tmu";
reg = <0xf0000 0x1000>;
interrupts = <18 2 0 0>;
fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
fsl,tmu-calibration = <0x00000000 0x0000000f
0x00000001 0x00000017
0x00000002 0x0000001e
0x00000003 0x00000026
0x00000004 0x0000002e
0x00000005 0x00000035
0x00000006 0x0000003d
0x00000007 0x00000044
0x00000008 0x0000004c
0x00000009 0x00000053
0x0000000a 0x0000005b
0x0000000b 0x00000064
0x00010000 0x00000011
0x00010001 0x0000001c
0x00010002 0x00000024
0x00010003 0x0000002b
0x00010004 0x00000034
0x00010005 0x00000039
0x00010006 0x00000042
0x00010007 0x0000004c
0x00010008 0x00000051
0x00010009 0x0000005a
0x0001000a 0x00000063
0x00020000 0x00000013
0x00020001 0x00000019
0x00020002 0x00000024
0x00020003 0x0000002c
0x00020004 0x00000035
0x00020005 0x0000003d
0x00020006 0x00000046
0x00020007 0x00000050
0x00020008 0x00000059
0x00030000 0x00000002
0x00030001 0x0000000d
0x00030002 0x00000019
0x00030003 0x00000024>;
#thermal-sensor-cells = <0>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
scfg: global-utilities@fc000 {
compatible = "fsl,t1023-scfg";
reg = <0xfc000 0x1000>;

2
arch/powerpc/boot/dts/fsl/t1024qds.dts
View File

@ -248,4 +248,4 @@
};
};
/include/ "t1024si-post.dtsi"
#include "t1024si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1024rdb.dts
View File

@ -188,4 +188,4 @@
};
};
/include/ "t1024si-post.dtsi"
#include "t1024si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
View File

@ -32,7 +32,7 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/include/ "t1023si-post.dtsi"
#include "t1023si-post.dtsi"
/ {
aliases {

2
arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
View File

@ -76,6 +76,7 @@
reg = <0>;
clocks = <&mux0>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
};
@ -85,6 +86,7 @@
reg = <1>;
clocks = <&mux1>;
next-level-cache = <&L2_2>;
#cooling-cells = <2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
};

2
arch/powerpc/boot/dts/fsl/t1040d4rdb.dts
View File

@ -43,4 +43,4 @@
interrupt-parent = <&mpic>;
};
/include/ "t1040si-post.dtsi"
#include "t1040si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1040qds.dts
View File

@ -43,4 +43,4 @@
interrupt-parent = <&mpic>;
};
/include/ "t1040si-post.dtsi"
#include "t1040si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1040rdb.dts
View File

@ -45,4 +45,4 @@
};
};
/include/ "t1040si-post.dtsi"
#include "t1040si-post.dtsi"

94
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
View File

@ -32,6 +32,8 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/thermal/thermal.h>
&bman_fbpr {
compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>;
@ -484,6 +486,98 @@
reg = <0xea000 0x4000>;
};
tmu: tmu@f0000 {
compatible = "fsl,qoriq-tmu";
reg = <0xf0000 0x1000>;
interrupts = <18 2 0 0>;
fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
fsl,tmu-calibration = <0x00000000 0x00000025
0x00000001 0x00000028
0x00000002 0x0000002d
0x00000003 0x00000031
0x00000004 0x00000036
0x00000005 0x0000003a
0x00000006 0x00000040
0x00000007 0x00000044
0x00000008 0x0000004a
0x00000009 0x0000004f
0x0000000a 0x00000054
0x00010000 0x0000000d
0x00010001 0x00000013
0x00010002 0x00000019
0x00010003 0x0000001f
0x00010004 0x00000025
0x00010005 0x0000002d
0x00010006 0x00000033
0x00010007 0x00000043
0x00010008 0x0000004b
0x00010009 0x00000053
0x00020000 0x00000010
0x00020001 0x00000017
0x00020002 0x0000001f
0x00020003 0x00000029
0x00020004 0x00000031
0x00020005 0x0000003c
0x00020006 0x00000042
0x00020007 0x0000004d
0x00020008 0x00000056
0x00030000 0x00000012
0x00030001 0x0000001d>;
#thermal-sensor-cells = <0>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map2 {
trip = <&cpu_alert>;
cooling-device =
<&cpu2 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu_alert>;
cooling-device =
<&cpu3 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
scfg: global-utilities@fc000 {
compatible = "fsl,t1040-scfg";
reg = <0xfc000 0x1000>;

2
arch/powerpc/boot/dts/fsl/t1042d4rdb.dts
View File

@ -50,4 +50,4 @@
};
};
/include/ "t1040si-post.dtsi"
#include "t1042si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1042qds.dts
View File

@ -43,4 +43,4 @@
interrupt-parent = <&mpic>;
};
/include/ "t1042si-post.dtsi"
#include "t1042si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1042rdb.dts
View File

@ -45,4 +45,4 @@
};
};
/include/ "t1042si-post.dtsi"
#include "t1042si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts
View File

@ -54,4 +54,4 @@
};
};
/include/ "t1042si-post.dtsi"
#include "t1042si-post.dtsi"

2
arch/powerpc/boot/dts/fsl/t1042si-post.dtsi
View File

@ -32,6 +32,6 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/include/ "t1040si-post.dtsi"
#include "t1040si-post.dtsi"
/* Place holder for ethernet related device tree nodes */

4
arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi
View File

@ -76,6 +76,7 @@
reg = <0>;
clocks = <&mux0>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
L2_1: l2-cache {
next-level-cache = <&cpc>;
};
@ -85,6 +86,7 @@
reg = <1>;
clocks = <&mux1>;
next-level-cache = <&L2_2>;
#cooling-cells = <2>;
L2_2: l2-cache {
next-level-cache = <&cpc>;
};
@ -94,6 +96,7 @@
reg = <2>;
clocks = <&mux2>;
next-level-cache = <&L2_3>;
#cooling-cells = <2>;
L2_3: l2-cache {
next-level-cache = <&cpc>;
};
@ -103,6 +106,7 @@
reg = <3>;
clocks = <&mux3>;
next-level-cache = <&L2_4>;
#cooling-cells = <2>;
L2_4: l2-cache {
next-level-cache = <&cpc>;
};

1
arch/powerpc/configs/mpc85xx_basic_defconfig
View File

@ -12,6 +12,7 @@ CONFIG_P1010_RDB=y
CONFIG_P1022_DS=y
CONFIG_P1022_RDK=y
CONFIG_P1023_RDB=y
CONFIG_TWR_P102x=y
CONFIG_SBC8548=y
CONFIG_SOCRATES=y
CONFIG_STX_GP3=y

44
arch/powerpc/include/asm/cpm.h
View File

@ -5,6 +5,7 @@
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/of.h>
#include <soc/fsl/qe/qe.h>
/*
* SPI Parameter RAM common to QE and CPM.
@ -155,49 +156,6 @@ typedef struct cpm_buf_desc {
*/
#define BD_I2C_START (0x0400)
int cpm_muram_init(void);
#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
#else
static inline unsigned long cpm_muram_alloc(unsigned long size,
unsigned long align)
{
return -ENOSYS;
}
static inline int cpm_muram_free(unsigned long offset)
{
return -ENOSYS;
}
static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
unsigned long size)
{
return -ENOSYS;
}
static inline void __iomem *cpm_muram_addr(unsigned long offset)
{
return NULL;
}
static inline unsigned long cpm_muram_offset(void __iomem *addr)
{
return -ENOSYS;
}
static inline dma_addr_t cpm_muram_dma(void __iomem *addr)
{
return 0;
}
#endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */
#ifdef CONFIG_CPM
int cpm_command(u32 command, u8 opcode);
#else

46
arch/powerpc/mm/hugetlbpage-book3e.c
View File

@ -51,6 +51,48 @@ static inline int mmu_get_tsize(int psize)
return mmu_psize_defs[psize].enc;
}
#if defined(CONFIG_PPC_FSL_BOOK3E) && defined(CONFIG_PPC64)
#include <asm/paca.h>
static inline void book3e_tlb_lock(void)
{
struct paca_struct *paca = get_paca();
unsigned long tmp;
int token = smp_processor_id() + 1;
asm volatile("1: lbarx %0, 0, %1;"
"cmpwi %0, 0;"
"bne 2f;"
"stbcx. %2, 0, %1;"
"bne 1b;"
"b 3f;"
"2: lbzx %0, 0, %1;"
"cmpwi %0, 0;"
"bne 2b;"
"b 1b;"
"3:"
: "=&r" (tmp)
: "r" (&paca->tcd_ptr->lock), "r" (token)
: "memory");
}
static inline void book3e_tlb_unlock(void)
{
struct paca_struct *paca = get_paca();
isync();
paca->tcd_ptr->lock = 0;
}
#else
static inline void book3e_tlb_lock(void)
{
}
static inline void book3e_tlb_unlock(void)
{
}
#endif
static inline int book3e_tlb_exists(unsigned long ea, unsigned long pid)
{
int found = 0;
@ -109,7 +151,10 @@ void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
*/
local_irq_save(flags);
book3e_tlb_lock();
if (unlikely(book3e_tlb_exists(ea, mm->context.id))) {
book3e_tlb_unlock();
local_irq_restore(flags);
return;
}
@ -141,6 +186,7 @@ void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
asm volatile ("tlbwe");
book3e_tlb_unlock();
local_irq_restore(flags);
}

6
arch/powerpc/platforms/83xx/km83xx.c
View File

@ -37,8 +37,8 @@
#include <asm/udbg.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include "mpc83xx.h"
@ -136,8 +136,6 @@ static void __init mpc83xx_km_setup_arch(void)
mpc83xx_setup_pci();
#ifdef CONFIG_QUICC_ENGINE
qe_reset();
np = of_find_node_by_name(NULL, "par_io");
if (np != NULL) {
par_io_init(np);

2
arch/powerpc/platforms/83xx/misc.c
View File

@ -17,7 +17,7 @@
#include <asm/io.h>
#include <asm/hw_irq.h>
#include <asm/ipic.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>

6
arch/powerpc/platforms/83xx/mpc832x_mds.c
View File

@ -36,8 +36,8 @@
#include <asm/udbg.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include "mpc83xx.h"
@ -74,8 +74,6 @@ static void __init mpc832x_sys_setup_arch(void)
mpc83xx_setup_pci();
#ifdef CONFIG_QUICC_ENGINE
qe_reset();
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
par_io_init(np);
of_node_put(np);

6
arch/powerpc/platforms/83xx/mpc832x_rdb.c
View File

@ -25,8 +25,8 @@
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
@ -203,8 +203,6 @@ static void __init mpc832x_rdb_setup_arch(void)
mpc83xx_setup_pci();
#ifdef CONFIG_QUICC_ENGINE
qe_reset();
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
par_io_init(np);
of_node_put(np);

6
arch/powerpc/platforms/83xx/mpc836x_mds.c
View File

@ -44,8 +44,8 @@
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <sysdev/simple_gpio.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include "mpc83xx.h"
@ -82,8 +82,6 @@ static void __init mpc836x_mds_setup_arch(void)
mpc83xx_setup_pci();
#ifdef CONFIG_QUICC_ENGINE
qe_reset();
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
par_io_init(np);
of_node_put(np);

7
arch/powerpc/platforms/83xx/mpc836x_rdk.c
View File

@ -20,8 +20,8 @@
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
@ -35,9 +35,6 @@ static void __init mpc836x_rdk_setup_arch(void)
ppc_md.progress("mpc836x_rdk_setup_arch()", 0);
mpc83xx_setup_pci();
#ifdef CONFIG_QUICC_ENGINE
qe_reset();
#endif
}
/*

8
arch/powerpc/platforms/85xx/bsc913x_qds.c
View File

@ -17,6 +17,7 @@
#include <linux/pci.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <asm/udbg.h>
#include "mpc85xx.h"
@ -46,10 +47,12 @@ static void __init bsc913x_qds_setup_arch(void)
mpc85xx_smp_init();
#endif
fsl_pci_assign_primary();
pr_info("bsc913x board from Freescale Semiconductor\n");
}
machine_device_initcall(bsc9132_qds, mpc85xx_common_publish_devices);
machine_arch_initcall(bsc9132_qds, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@ -67,6 +70,9 @@ define_machine(bsc9132_qds) {
.probe = bsc9132_qds_probe,
.setup_arch = bsc913x_qds_setup_arch,
.init_IRQ = bsc913x_qds_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
#endif
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
.calibrate_decr = generic_calibrate_decr,

3
arch/powerpc/platforms/85xx/common.c
View File

@ -9,7 +9,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include <sysdev/cpm2_pic.h>
#include "mpc85xx.h"
@ -105,7 +105,6 @@ void __init mpc85xx_qe_init(void)
return;
}
qe_reset();
of_node_put(np);
}

2
arch/powerpc/platforms/85xx/corenet_generic.c
View File

@ -27,7 +27,7 @@
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <asm/ehv_pic.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe_ic.h>
#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>

15
arch/powerpc/platforms/85xx/mpc85xx_ads.c
View File

@ -36,17 +36,6 @@
#include "mpc85xx.h"
#ifdef CONFIG_PCI
static int mpc85xx_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn)
{
if (bus == 0 && PCI_SLOT(devfn) == 0)
return PCIBIOS_DEVICE_NOT_FOUND;
else
return PCIBIOS_SUCCESSFUL;
}
#endif /* CONFIG_PCI */
static void __init mpc85xx_ads_pic_init(void)
{
struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
@ -145,10 +134,6 @@ static void __init mpc85xx_ads_setup_arch(void)
init_ioports();
#endif
#ifdef CONFIG_PCI
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
fsl_pci_assign_primary();
}

4
arch/powerpc/platforms/85xx/mpc85xx_mds.c
View File

@ -48,8 +48,8 @@
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include <sysdev/simple_gpio.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <asm/mpic.h>
#include <asm/swiotlb.h>
#include "smp.h"

4
arch/powerpc/platforms/85xx/mpc85xx_rdb.c
View File

@ -26,8 +26,8 @@
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>

4
arch/powerpc/platforms/85xx/twr_p102x.c
View File

@ -22,8 +22,8 @@
#include <asm/pci-bridge.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <asm/qe.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/qe_ic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>

13
arch/powerpc/platforms/Kconfig
View File

@ -272,17 +272,6 @@ config TAU_AVERAGE
If in doubt, say N here.
config QUICC_ENGINE
bool "Freescale QUICC Engine (QE) Support"
depends on FSL_SOC && PPC32
select PPC_LIB_RHEAP
select CRC32
help
The QUICC Engine (QE) is a new generation of communications
coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
Selecting this option means that you wish to build a kernel
for a machine with a QE coprocessor.
config QE_GPIO
bool "QE GPIO support"
depends on QUICC_ENGINE
@ -295,7 +284,6 @@ config CPM2
bool "Enable support for the CPM2 (Communications Processor Module)"
depends on (FSL_SOC_BOOKE && PPC32) || 8260
select CPM
select PPC_LIB_RHEAP
select PPC_PCI_CHOICE
select ARCH_REQUIRE_GPIOLIB
help
@ -325,6 +313,7 @@ config FSL_ULI1575
config CPM
bool
select GENERIC_ALLOCATOR
config OF_RTC
bool

1
arch/powerpc/sysdev/Makefile
View File

@ -26,7 +26,6 @@ obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o
obj-$(CONFIG_FSL_RIO) += fsl_rio.o fsl_rmu.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
mv64x60_udbg.o

158
arch/powerpc/sysdev/cpm_common.c
View File

@ -27,8 +27,8 @@
#include <asm/udbg.h>
#include <asm/io.h>
#include <asm/rheap.h>
#include <asm/cpm.h>
#include <soc/fsl/qe/qe.h>
#include <mm/mmu_decl.h>
@ -65,162 +65,6 @@ void __init udbg_init_cpm(void)
}
#endif
static spinlock_t cpm_muram_lock;
static rh_block_t cpm_boot_muram_rh_block[16];
static rh_info_t cpm_muram_info;
static u8 __iomem *muram_vbase;
static phys_addr_t muram_pbase;
/* Max address size we deal with */
#define OF_MAX_ADDR_CELLS 4
int cpm_muram_init(void)
{
struct device_node *np;
struct resource r;
u32 zero[OF_MAX_ADDR_CELLS] = {};
resource_size_t max = 0;
int i = 0;
int ret = 0;
if (muram_pbase)
return 0;
spin_lock_init(&cpm_muram_lock);
/* initialize the info header */
rh_init(&cpm_muram_info, 1,
sizeof(cpm_boot_muram_rh_block) /
sizeof(cpm_boot_muram_rh_block[0]),
cpm_boot_muram_rh_block);
np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
if (!np) {
/* try legacy bindings */
np = of_find_node_by_name(NULL, "data-only");
if (!np) {
printk(KERN_ERR "Cannot find CPM muram data node");
ret = -ENODEV;
goto out;
}
}
muram_pbase = of_translate_address(np, zero);
if (muram_pbase == (phys_addr_t)OF_BAD_ADDR) {
printk(KERN_ERR "Cannot translate zero through CPM muram node");
ret = -ENODEV;
goto out;
}
while (of_address_to_resource(np, i++, &r) == 0) {
if (r.end > max)
max = r.end;
rh_attach_region(&cpm_muram_info, r.start - muram_pbase,
resource_size(&r));
}
muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
if (!muram_vbase) {
printk(KERN_ERR "Cannot map CPM muram");
ret = -ENOMEM;
}
out:
of_node_put(np);
return ret;
}
/**
* cpm_muram_alloc - allocate the requested size worth of multi-user ram
* @size: number of bytes to allocate
* @align: requested alignment, in bytes
*
* This function returns an offset into the muram area.
* Use cpm_dpram_addr() to get the virtual address of the area.
* Use cpm_muram_free() to free the allocation.
*/
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align)
{
unsigned long start;
unsigned long flags;
spin_lock_irqsave(&cpm_muram_lock, flags);
cpm_muram_info.alignment = align;
start = rh_alloc(&cpm_muram_info, size, "commproc");
if (!IS_ERR_VALUE(start))
memset_io(cpm_muram_addr(start), 0, size);
spin_unlock_irqrestore(&cpm_muram_lock, flags);
return start;
}
EXPORT_SYMBOL(cpm_muram_alloc);
/**
* cpm_muram_free - free a chunk of multi-user ram
* @offset: The beginning of the chunk as returned by cpm_muram_alloc().
*/
int cpm_muram_free(unsigned long offset)
{
int ret;
unsigned long flags;
spin_lock_irqsave(&cpm_muram_lock, flags);
ret = rh_free(&cpm_muram_info, offset);
spin_unlock_irqrestore(&cpm_muram_lock, flags);
return ret;
}
EXPORT_SYMBOL(cpm_muram_free);
/**
* cpm_muram_alloc_fixed - reserve a specific region of multi-user ram
* @offset: the offset into the muram area to reserve
* @size: the number of bytes to reserve
*
* This function returns "start" on success, -ENOMEM on failure.
* Use cpm_dpram_addr() to get the virtual address of the area.
* Use cpm_muram_free() to free the allocation.
*/
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size)
{
unsigned long start;
unsigned long flags;
spin_lock_irqsave(&cpm_muram_lock, flags);
cpm_muram_info.alignment = 1;
start = rh_alloc_fixed(&cpm_muram_info, offset, size, "commproc");
spin_unlock_irqrestore(&cpm_muram_lock, flags);
return start;
}
EXPORT_SYMBOL(cpm_muram_alloc_fixed);
/**
* cpm_muram_addr - turn a muram offset into a virtual address
* @offset: muram offset to convert
*/
void __iomem *cpm_muram_addr(unsigned long offset)
{
return muram_vbase + offset;
}
EXPORT_SYMBOL(cpm_muram_addr);
unsigned long cpm_muram_offset(void __iomem *addr)
{
return addr - (void __iomem *)muram_vbase;
}
EXPORT_SYMBOL(cpm_muram_offset);
/**
* cpm_muram_dma - turn a muram virtual address into a DMA address
* @offset: virtual address from cpm_muram_addr() to convert
*/
dma_addr_t cpm_muram_dma(void __iomem *addr)
{
return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
}
EXPORT_SYMBOL(cpm_muram_dma);
#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
struct cpm2_ioports {

2
arch/powerpc/sysdev/fsl_lbc.c
View File

@ -243,8 +243,6 @@ static irqreturn_t fsl_lbc_ctrl_irq(int irqno, void *data)
if (status & LTESR_CS)
dev_err(ctrl->dev, "Chip select error: "
"LTESR 0x%08X\n", status);
if (status & LTESR_UPM)
;
if (status & LTESR_FCT) {
dev_err(ctrl->dev, "FCM command time-out: "
"LTESR 0x%08X\n", status);

13
arch/powerpc/sysdev/fsl_pci.c
View File

@ -216,6 +216,19 @@ static void setup_pci_atmu(struct pci_controller *hose)
*/
setup_inbound = !is_kdump();
if (of_device_is_compatible(hose->dn, "fsl,bsc9132-pcie")) {
/*
* BSC9132 Rev1.0 has an issue where all the PEX inbound
* windows have implemented the default target value as 0xf
* for CCSR space.In all Freescale legacy devices the target
* of 0xf is reserved for local memory space. 9132 Rev1.0
* now has local mempry space mapped to target 0x0 instead of
* 0xf. Hence adding a workaround to remove the target 0xf
* defined for memory space from Inbound window attributes.
*/
piwar &= ~PIWAR_TGI_LOCAL;
}
if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) {
win_idx = 2;

2
drivers/net/ethernet/freescale/fsl_pq_mdio.c
View File

@ -29,7 +29,7 @@
#include <asm/io.h>
#if IS_ENABLED(CONFIG_UCC_GETH)
#include <asm/ucc.h> /* for ucc_set_qe_mux_mii_mng() */
#include <soc/fsl/qe/ucc.h>
#endif
#include "gianfar.h"

8
drivers/net/ethernet/freescale/ucc_geth.c
View File

@ -40,10 +40,10 @@
#include <asm/uaccess.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <asm/ucc.h>
#include <asm/ucc_fast.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/ucc.h>
#include <soc/fsl/qe/ucc_fast.h>
#include <asm/machdep.h>
#include "ucc_geth.h"

8
drivers/net/ethernet/freescale/ucc_geth.h
View File

@ -22,11 +22,11 @@
#include <linux/list.h>
#include <linux/if_ether.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/ucc.h>
#include <asm/ucc_fast.h>
#include <soc/fsl/qe/ucc.h>
#include <soc/fsl/qe/ucc_fast.h>
#define DRV_DESC "QE UCC Gigabit Ethernet Controller"
#define DRV_NAME "ucc_geth"

1
drivers/soc/Kconfig
View File

@ -1,6 +1,7 @@
menu "SOC (System On Chip) specific Drivers"
source "drivers/soc/brcmstb/Kconfig"
source "drivers/soc/fsl/qe/Kconfig"
source "drivers/soc/mediatek/Kconfig"
source "drivers/soc/qcom/Kconfig"
source "drivers/soc/rockchip/Kconfig"

1
drivers/soc/Makefile
View File

@ -4,6 +4,7 @@
obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/
obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
obj-$(CONFIG_ARCH_QCOM) += qcom/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/

6
drivers/soc/fsl/Makefile Normal file
View File

@ -0,0 +1,6 @@
#
# Makefile for the Linux Kernel SOC fsl specific device drivers
#
obj-$(CONFIG_QUICC_ENGINE) += qe/
obj-$(CONFIG_CPM) += qe/

11
arch/powerpc/sysdev/qe_lib/Kconfig → drivers/soc/fsl/qe/Kconfig
View File

@ -2,6 +2,17 @@
# QE Communication options
#
config QUICC_ENGINE
bool "Freescale QUICC Engine (QE) Support"
depends on FSL_SOC && PPC32
select GENERIC_ALLOCATOR
select CRC32
help
The QUICC Engine (QE) is a new generation of communications
coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
Selecting this option means that you wish to build a kernel
for a machine with a QE coprocessor.
config UCC_SLOW
bool
default y if SERIAL_QE

4
arch/powerpc/sysdev/qe_lib/Makefile → drivers/soc/fsl/qe/Makefile
View File

@ -1,8 +1,8 @@
#
# Makefile for the linux ppc-specific parts of QE
#
obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_common.o qe_ic.o qe_io.o
obj-$(CONFIG_CPM) += qe_common.o
obj-$(CONFIG_UCC) += ucc.o
obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
obj-$(CONFIG_UCC_FAST) += ucc_fast.o

2
arch/powerpc/sysdev/qe_lib/gpio.c → drivers/soc/fsl/qe/gpio.c
View File

@ -21,7 +21,7 @@
#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/export.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
struct qe_gpio_chip {
struct of_mm_gpio_chip mm_gc;

17
arch/powerpc/sysdev/qe_lib/qe.c → drivers/soc/fsl/qe/qe.c
View File

@ -31,8 +31,8 @@
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/prom.h>
#include <asm/rheap.h>
@ -671,6 +671,19 @@ unsigned int qe_get_num_of_snums(void)
}
EXPORT_SYMBOL(qe_get_num_of_snums);
static int __init qe_init(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
if (!np)
return -ENODEV;
qe_reset();
of_node_put(np);
return 0;
}
subsys_initcall(qe_init);
#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx)
static int qe_resume(struct platform_device *ofdev)
{

235
drivers/soc/fsl/qe/qe_common.c Normal file
View File

@ -0,0 +1,235 @@
/*
* Common CPM code
*
* Author: Scott Wood <scottwood@freescale.com>
*
* Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
*
* Some parts derived from commproc.c/cpm2_common.c, which is:
* Copyright (c) 1997 Dan error_act (dmalek@jlc.net)
* Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
* Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
* 2006 (c) MontaVista Software, Inc.
* Vitaly Bordug <vbordug@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*/
#include <linux/genalloc.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/of_device.h>
#include <linux/spinlock.h>
#include <linux/export.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <soc/fsl/qe/qe.h>
static struct gen_pool *muram_pool;
static spinlock_t cpm_muram_lock;
static u8 __iomem *muram_vbase;
static phys_addr_t muram_pbase;
struct muram_block {
struct list_head head;
unsigned long start;
int size;
};
static LIST_HEAD(muram_block_list);
/* max address size we deal with */
#define OF_MAX_ADDR_CELLS 4
#define GENPOOL_OFFSET (4096 * 8)
int cpm_muram_init(void)
{
struct device_node *np;
struct resource r;
u32 zero[OF_MAX_ADDR_CELLS] = {};
resource_size_t max = 0;
int i = 0;
int ret = 0;
if (muram_pbase)
return 0;
spin_lock_init(&cpm_muram_lock);
np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
if (!np) {
/* try legacy bindings */
np = of_find_node_by_name(NULL, "data-only");
if (!np) {
pr_err("Cannot find CPM muram data node");
ret = -ENODEV;
goto out_muram;
}
}
muram_pool = gen_pool_create(0, -1);
muram_pbase = of_translate_address(np, zero);
if (muram_pbase == (phys_addr_t)OF_BAD_ADDR) {
pr_err("Cannot translate zero through CPM muram node");
ret = -ENODEV;
goto out_pool;
}
while (of_address_to_resource(np, i++, &r) == 0) {
if (r.end > max)
max = r.end;
ret = gen_pool_add(muram_pool, r.start - muram_pbase +
GENPOOL_OFFSET, resource_size(&r), -1);
if (ret) {
pr_err("QE: couldn't add muram to pool!\n");
goto out_pool;
}
}
muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
if (!muram_vbase) {
pr_err("Cannot map QE muram");
ret = -ENOMEM;
goto out_pool;
}
goto out_muram;
out_pool:
gen_pool_destroy(muram_pool);
out_muram:
of_node_put(np);
return ret;
}
/*
* cpm_muram_alloc - allocate the requested size worth of multi-user ram
* @size: number of bytes to allocate
* @align: requested alignment, in bytes
*
* This function returns an offset into the muram area.
* Use cpm_dpram_addr() to get the virtual address of the area.
* Use cpm_muram_free() to free the allocation.
*/
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align)
{
unsigned long start;
unsigned long flags;
struct genpool_data_align muram_pool_data;
spin_lock_irqsave(&cpm_muram_lock, flags);
muram_pool_data.align = align;
start = cpm_muram_alloc_common(size, gen_pool_first_fit_align,
&muram_pool_data);
spin_unlock_irqrestore(&cpm_muram_lock, flags);
return start;
}
EXPORT_SYMBOL(cpm_muram_alloc);
/**
* cpm_muram_free - free a chunk of multi-user ram
* @offset: The beginning of the chunk as returned by cpm_muram_alloc().
*/
int cpm_muram_free(unsigned long offset)
{
unsigned long flags;
int size;
struct muram_block *tmp;
size = 0;
spin_lock_irqsave(&cpm_muram_lock, flags);
list_for_each_entry(tmp, &muram_block_list, head) {
if (tmp->start == offset) {
size = tmp->size;
list_del(&tmp->head);
kfree(tmp);
break;
}
}
gen_pool_free(muram_pool, offset + GENPOOL_OFFSET, size);
spin_unlock_irqrestore(&cpm_muram_lock, flags);
return size;
}
EXPORT_SYMBOL(cpm_muram_free);
/*
* cpm_muram_alloc_fixed - reserve a specific region of multi-user ram
* @offset: offset of allocation start address
* @size: number of bytes to allocate
* This function returns an offset into the muram area
* Use cpm_dpram_addr() to get the virtual address of the area.
* Use cpm_muram_free() to free the allocation.
*/
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size)
{
unsigned long start;
unsigned long flags;
struct genpool_data_fixed muram_pool_data_fixed;
spin_lock_irqsave(&cpm_muram_lock, flags);
muram_pool_data_fixed.offset = offset + GENPOOL_OFFSET;
start = cpm_muram_alloc_common(size, gen_pool_fixed_alloc,
&muram_pool_data_fixed);
spin_unlock_irqrestore(&cpm_muram_lock, flags);
return start;
}
EXPORT_SYMBOL(cpm_muram_alloc_fixed);
/*
* cpm_muram_alloc_common - cpm_muram_alloc common code
* @size: number of bytes to allocate
* @algo: algorithm for alloc.
* @data: data for genalloc's algorithm.
*
* This function returns an offset into the muram area.
*/
unsigned long cpm_muram_alloc_common(unsigned long size, genpool_algo_t algo,
void *data)
{
struct muram_block *entry;
unsigned long start;
start = gen_pool_alloc_algo(muram_pool, size, algo, data);
if (!start)
goto out2;
start = start - GENPOOL_OFFSET;
memset_io(cpm_muram_addr(start), 0, size);
entry = kmalloc(sizeof(*entry), GFP_KERNEL);
if (!entry)
goto out1;
entry->start = start;
entry->size = size;
list_add(&entry->head, &muram_block_list);
return start;
out1:
gen_pool_free(muram_pool, start, size);
out2:
return (unsigned long)-ENOMEM;
}
/**
* cpm_muram_addr - turn a muram offset into a virtual address
* @offset: muram offset to convert
*/
void __iomem *cpm_muram_addr(unsigned long offset)
{
return muram_vbase + offset;
}
EXPORT_SYMBOL(cpm_muram_addr);
unsigned long cpm_muram_offset(void __iomem *addr)
{
return addr - (void __iomem *)muram_vbase;
}
EXPORT_SYMBOL(cpm_muram_offset);
/**
* cpm_muram_dma - turn a muram virtual address into a DMA address
* @offset: virtual address from cpm_muram_addr() to convert
*/
dma_addr_t cpm_muram_dma(void __iomem *addr)
{
return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
}
EXPORT_SYMBOL(cpm_muram_dma);

5
arch/powerpc/sysdev/qe_lib/qe_ic.c → drivers/soc/fsl/qe/qe_ic.c
View File

@ -14,6 +14,8 @@
* option) any later version.
*/
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
@ -26,8 +28,7 @@
#include <linux/spinlock.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe_ic.h>
#include "qe_ic.h"

4
arch/powerpc/sysdev/qe_lib/qe_ic.h → drivers/soc/fsl/qe/qe_ic.h
View File

@ -1,5 +1,5 @@
/*
* arch/powerpc/sysdev/qe_lib/qe_ic.h
* drivers/soc/fsl/qe/qe_ic.h
*
* QUICC ENGINE Interrupt Controller Header
*
@ -16,7 +16,7 @@
#ifndef _POWERPC_SYSDEV_QE_IC_H
#define _POWERPC_SYSDEV_QE_IC_H
#include <asm/qe_ic.h>
#include <soc/fsl/qe/qe_ic.h>
#define NR_QE_IC_INTS 64

2
arch/powerpc/sysdev/qe_lib/qe_io.c → drivers/soc/fsl/qe/qe_io.c
View File

@ -21,7 +21,7 @@
#include <linux/ioport.h>
#include <asm/io.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/prom.h>
#include <sysdev/fsl_soc.h>

6
arch/powerpc/sysdev/qe_lib/ucc.c → drivers/soc/fsl/qe/ucc.c
View File

@ -21,9 +21,9 @@
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <asm/ucc.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/ucc.h>
int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
{

8
arch/powerpc/sysdev/qe_lib/ucc_fast.c → drivers/soc/fsl/qe/ucc_fast.c
View File

@ -21,11 +21,11 @@
#include <linux/export.h>
#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/ucc.h>
#include <asm/ucc_fast.h>
#include <soc/fsl/qe/ucc.h>
#include <soc/fsl/qe/ucc_fast.h>
void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
{

8
arch/powerpc/sysdev/qe_lib/ucc_slow.c → drivers/soc/fsl/qe/ucc_slow.c
View File

@ -21,11 +21,11 @@
#include <linux/export.h>
#include <asm/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/ucc.h>
#include <asm/ucc_slow.h>
#include <soc/fsl/qe/ucc.h>
#include <soc/fsl/qe/ucc_slow.h>
u32 ucc_slow_get_qe_cr_subblock(int uccs_num)
{

4
arch/powerpc/sysdev/qe_lib/usb.c → drivers/soc/fsl/qe/usb.c
View File

@ -17,8 +17,8 @@
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/io.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
int qe_usb_clock_set(enum qe_clock clk, int rate)
{

2
drivers/spi/spi-fsl-cpm.c
View File

@ -16,7 +16,7 @@
* option) any later version.
*/
#include <asm/cpm.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include <linux/dma-mapping.h>
#include <linux/fsl_devices.h>
#include <linux/kernel.h>

2
drivers/tty/serial/ucc_uart.c
View File

@ -31,7 +31,7 @@
#include <linux/dma-mapping.h>
#include <linux/fs_uart_pd.h>
#include <asm/ucc_slow.h>
#include <soc/fsl/qe/ucc_slow.h>
#include <linux/firmware.h>
#include <asm/reg.h>

2
drivers/usb/gadget/udc/fsl_qe_udc.c
View File

@ -38,7 +38,7 @@
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/otg.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/cpm.h>
#include <asm/dma.h>
#include <asm/reg.h>

2
drivers/usb/host/fhci-hcd.c
View File

@ -31,7 +31,7 @@
#include <linux/of_platform.h>
#include <linux/of_gpio.h>
#include <linux/slab.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/fsl_gtm.h>
#include "fhci.h"

2
drivers/usb/host/fhci-hub.c
View File

@ -24,7 +24,7 @@
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <linux/gpio.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include "fhci.h"
/* virtual root hub specific descriptor */

2
drivers/usb/host/fhci-sched.c
View File

@ -25,7 +25,7 @@
#include <linux/io.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <asm/qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/fsl_gtm.h>
#include "fhci.h"

4
drivers/usb/host/fhci.h
View File

@ -27,8 +27,8 @@
#include <linux/io.h>
#include <linux/usb.h>
#include <linux/usb/hcd.h>
#include <asm/qe.h>
#include <asm/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#define USB_CLOCK 48000000

38
include/linux/genalloc.h
View File

@ -30,10 +30,12 @@
#ifndef __GENALLOC_H__
#define __GENALLOC_H__
#include <linux/types.h>
#include <linux/spinlock_types.h>
struct device;
struct device_node;
struct gen_pool;
/**
* Allocation callback function type definition
@ -47,7 +49,7 @@ typedef unsigned long (*genpool_algo_t)(unsigned long *map,
unsigned long size,
unsigned long start,
unsigned int nr,
void *data);
void *data, struct gen_pool *pool);
/*
* General purpose special memory pool descriptor.
@ -75,6 +77,20 @@ struct gen_pool_chunk {
unsigned long bits[0]; /* bitmap for allocating memory chunk */
};
/*
* gen_pool data descriptor for gen_pool_first_fit_align.
*/
struct genpool_data_align {
int align; /* alignment by bytes for starting address */
};
/*
* gen_pool data descriptor for gen_pool_fixed_alloc.
*/
struct genpool_data_fixed {
unsigned long offset; /* The offset of the specific region */
};
extern struct gen_pool *gen_pool_create(int, int);
extern phys_addr_t gen_pool_virt_to_phys(struct gen_pool *pool, unsigned long);
extern int gen_pool_add_virt(struct gen_pool *, unsigned long, phys_addr_t,
@ -98,6 +114,8 @@ static inline int gen_pool_add(struct gen_pool *pool, unsigned long addr,
}
extern void gen_pool_destroy(struct gen_pool *);
extern unsigned long gen_pool_alloc(struct gen_pool *, size_t);
extern unsigned long gen_pool_alloc_algo(struct gen_pool *, size_t,
genpool_algo_t algo, void *data);
extern void *gen_pool_dma_alloc(struct gen_pool *pool, size_t size,
dma_addr_t *dma);
extern void gen_pool_free(struct gen_pool *, unsigned long, size_t);
@ -110,14 +128,26 @@ extern void gen_pool_set_algo(struct gen_pool *pool, genpool_algo_t algo,
void *data);
extern unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data);
unsigned long start, unsigned int nr, void *data,
struct gen_pool *pool);
extern unsigned long gen_pool_fixed_alloc(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
void *data, struct gen_pool *pool);
extern unsigned long gen_pool_first_fit_align(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
void *data, struct gen_pool *pool);
extern unsigned long gen_pool_first_fit_order_align(unsigned long *map,
unsigned long size, unsigned long start, unsigned int nr,
void *data);
void *data, struct gen_pool *pool);
extern unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data);
unsigned long start, unsigned int nr, void *data,
struct gen_pool *pool);
extern struct gen_pool *devm_gen_pool_create(struct device *dev,
int min_alloc_order, int nid, const char *name);

0
arch/powerpc/include/asm/immap_qe.h → include/soc/fsl/qe/immap_qe.h
View File

52
arch/powerpc/include/asm/qe.h → include/soc/fsl/qe/qe.h
View File

@ -16,11 +16,16 @@
#define _ASM_POWERPC_QE_H
#ifdef __KERNEL__
#include <linux/compiler.h>
#include <linux/genalloc.h>
#include <linux/spinlock.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <asm/cpm.h>
#include <asm/immap_qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/types.h>
#define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */
#define QE_NUM_OF_BRGS 16
@ -92,6 +97,51 @@ extern void qe_reset(void);
static inline void qe_reset(void) {}
#endif
int cpm_muram_init(void);
#if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE)
unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
unsigned long cpm_muram_alloc_common(unsigned long size, genpool_algo_t algo,
void *data);
void __iomem *cpm_muram_addr(unsigned long offset);
unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
#else
static inline unsigned long cpm_muram_alloc(unsigned long size,
unsigned long align)
{
return -ENOSYS;
}
static inline int cpm_muram_free(unsigned long offset)
{
return -ENOSYS;
}
static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset,
unsigned long size)
{
return -ENOSYS;
}
static inline void __iomem *cpm_muram_addr(unsigned long offset)
{
return NULL;
}
static inline unsigned long cpm_muram_offset(void __iomem *addr)
{
return -ENOSYS;
}
static inline dma_addr_t cpm_muram_dma(void __iomem *addr)
{
return 0;
}
#endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */
/* QE PIO */
#define QE_PIO_PINS 32

0
arch/powerpc/include/asm/qe_ic.h → include/soc/fsl/qe/qe_ic.h
View File

4
arch/powerpc/include/asm/ucc.h → include/soc/fsl/qe/ucc.h
View File

@ -15,8 +15,8 @@
#ifndef __UCC_H__
#define __UCC_H__
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#define STATISTICS

6
arch/powerpc/include/asm/ucc_fast.h → include/soc/fsl/qe/ucc_fast.h
View File

@ -16,10 +16,10 @@
#include <linux/kernel.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/ucc.h>
#include <soc/fsl/qe/ucc.h>
/* Receive BD's status */
#define R_E 0x80000000 /* buffer empty */

6
arch/powerpc/include/asm/ucc_slow.h → include/soc/fsl/qe/ucc_slow.h
View File

@ -17,10 +17,10 @@
#include <linux/kernel.h>
#include <asm/immap_qe.h>
#include <asm/qe.h>
#include <soc/fsl/qe/immap_qe.h>
#include <soc/fsl/qe/qe.h>
#include <asm/ucc.h>
#include <soc/fsl/qe/ucc.h>
/* transmit BD's status */
#define T_R 0x80000000 /* ready bit */

93
lib/genalloc.c
View File

@ -269,6 +269,25 @@ EXPORT_SYMBOL(gen_pool_destroy);
* NMI-safe cmpxchg implementation.
*/
unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
{
return gen_pool_alloc_algo(pool, size, pool->algo, pool->data);
}
EXPORT_SYMBOL(gen_pool_alloc);
/**
* gen_pool_alloc_algo - allocate special memory from the pool
* @pool: pool to allocate from
* @size: number of bytes to allocate from the pool
* @algo: algorithm passed from caller
* @data: data passed to algorithm
*
* Allocate the requested number of bytes from the specified pool.
* Uses the pool allocation function (with first-fit algorithm by default).
* Can not be used in NMI handler on architectures without
* NMI-safe cmpxchg implementation.
*/
unsigned long gen_pool_alloc_algo(struct gen_pool *pool, size_t size,
genpool_algo_t algo, void *data)
{
struct gen_pool_chunk *chunk;
unsigned long addr = 0;
@ -290,8 +309,8 @@ unsigned long gen_pool_alloc(struct gen_pool *pool, size_t size)
end_bit = chunk_size(chunk) >> order;
retry:
start_bit = pool->algo(chunk->bits, end_bit, start_bit, nbits,
pool->data);
start_bit = algo(chunk->bits, end_bit, start_bit,
nbits, data, pool);
if (start_bit >= end_bit)
continue;
remain = bitmap_set_ll(chunk->bits, start_bit, nbits);
@ -310,7 +329,7 @@ retry:
rcu_read_unlock();
return addr;
}
EXPORT_SYMBOL(gen_pool_alloc);
EXPORT_SYMBOL(gen_pool_alloc_algo);
/**
* gen_pool_dma_alloc - allocate special memory from the pool for DMA usage
@ -501,14 +520,73 @@ EXPORT_SYMBOL(gen_pool_set_algo);
* @start: The bitnumber to start searching at
* @nr: The number of zeroed bits we're looking for
* @data: additional data - unused
* @pool: pool to find the fit region memory from
*/
unsigned long gen_pool_first_fit(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data)
unsigned long start, unsigned int nr, void *data,
struct gen_pool *pool)
{
return bitmap_find_next_zero_area(map, size, start, nr, 0);
}
EXPORT_SYMBOL(gen_pool_first_fit);
/**
* gen_pool_first_fit_align - find the first available region
* of memory matching the size requirement (alignment constraint)
* @map: The address to base the search on
* @size: The bitmap size in bits
* @start: The bitnumber to start searching at
* @nr: The number of zeroed bits we're looking for
* @data: data for alignment
* @pool: pool to get order from
*/
unsigned long gen_pool_first_fit_align(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data,
struct gen_pool *pool)
{
struct genpool_data_align *alignment;
unsigned long align_mask;
int order;
alignment = data;
order = pool->min_alloc_order;
align_mask = ((alignment->align + (1UL << order) - 1) >> order) - 1;
return bitmap_find_next_zero_area(map, size, start, nr, align_mask);
}
EXPORT_SYMBOL(gen_pool_first_fit_align);
/**
* gen_pool_fixed_alloc - reserve a specific region
* @map: The address to base the search on
* @size: The bitmap size in bits
* @start: The bitnumber to start searching at
* @nr: The number of zeroed bits we're looking for
* @data: data for alignment
* @pool: pool to get order from
*/
unsigned long gen_pool_fixed_alloc(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data,
struct gen_pool *pool)
{
struct genpool_data_fixed *fixed_data;
int order;
unsigned long offset_bit;
unsigned long start_bit;
fixed_data = data;
order = pool->min_alloc_order;
offset_bit = fixed_data->offset >> order;
if (WARN_ON(fixed_data->offset & ((1UL << order) - 1)))
return size;
start_bit = bitmap_find_next_zero_area(map, size,
start + offset_bit, nr, 0);
if (start_bit != offset_bit)
start_bit = size;
return start_bit;
}
EXPORT_SYMBOL(gen_pool_fixed_alloc);
/**
* gen_pool_first_fit_order_align - find the first available region
* of memory matching the size requirement. The region will be aligned
@ -518,10 +596,11 @@ EXPORT_SYMBOL(gen_pool_first_fit);
* @start: The bitnumber to start searching at
* @nr: The number of zeroed bits we're looking for
* @data: additional data - unused
* @pool: pool to find the fit region memory from
*/
unsigned long gen_pool_first_fit_order_align(unsigned long *map,
unsigned long size, unsigned long start,
unsigned int nr, void *data)
unsigned int nr, void *data, struct gen_pool *pool)
{
unsigned long align_mask = roundup_pow_of_two(nr) - 1;
@ -537,12 +616,14 @@ EXPORT_SYMBOL(gen_pool_first_fit_order_align);
* @start: The bitnumber to start searching at
* @nr: The number of zeroed bits we're looking for
* @data: additional data - unused
* @pool: pool to find the fit region memory from
*
* Iterate over the bitmap to find the smallest free region
* which we can allocate the memory.
*/
unsigned long gen_pool_best_fit(unsigned long *map, unsigned long size,
unsigned long start, unsigned int nr, void *data)
unsigned long start, unsigned int nr, void *data,
struct gen_pool *pool)
{
unsigned long start_bit = size;
unsigned long len = size + 1;