arm64: cpufeature: add MMFR0 helper functions
Those helper functions for MMFR0 register will be used later by kexec_file loader. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: James Morse <james.morse@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -486,11 +486,59 @@ static inline bool system_supports_32bit_el0(void)
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return cpus_have_const_cap(ARM64_HAS_32BIT_EL0);
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}
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static inline bool system_supports_4kb_granule(void)
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{
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u64 mmfr0;
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u32 val;
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mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
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val = cpuid_feature_extract_unsigned_field(mmfr0,
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ID_AA64MMFR0_TGRAN4_SHIFT);
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return val == ID_AA64MMFR0_TGRAN4_SUPPORTED;
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}
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static inline bool system_supports_64kb_granule(void)
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{
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u64 mmfr0;
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u32 val;
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mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
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val = cpuid_feature_extract_unsigned_field(mmfr0,
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ID_AA64MMFR0_TGRAN64_SHIFT);
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return val == ID_AA64MMFR0_TGRAN64_SUPPORTED;
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}
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static inline bool system_supports_16kb_granule(void)
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{
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u64 mmfr0;
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u32 val;
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mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
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val = cpuid_feature_extract_unsigned_field(mmfr0,
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ID_AA64MMFR0_TGRAN16_SHIFT);
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return val == ID_AA64MMFR0_TGRAN16_SUPPORTED;
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}
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static inline bool system_supports_mixed_endian_el0(void)
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{
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return id_aa64mmfr0_mixed_endian_el0(read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1));
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}
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static inline bool system_supports_mixed_endian(void)
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{
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u64 mmfr0;
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u32 val;
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mmfr0 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR0_EL1);
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val = cpuid_feature_extract_unsigned_field(mmfr0,
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ID_AA64MMFR0_BIGENDEL_SHIFT);
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return val == 0x1;
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}
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static inline bool system_supports_fpsimd(void)
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{
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return !cpus_have_const_cap(ARM64_HAS_NO_FPSIMD);
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