[MIPS] Add missing arch defines for the Alchemy MTD driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
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#define BOARD_PC1_INT DB1200_PC1_INT
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#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
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/* Nand chip select */
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#define NAND_CS 1
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#endif /* __ASM_DB1200_H */
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@ -200,6 +200,12 @@ typedef volatile struct
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((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
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((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
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((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
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#define NAND_CS 1
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/* should be done by yamon */
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#define NAND_STCFG 0x00400005 /* 8-bit NAND */
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#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
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#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
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#endif /* __ASM_DB1X00_H */
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@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
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#define BOARD_PC1_INT PB1200_PC1_INT
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#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
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/* Nand chip select */
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#define NAND_CS 1
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#endif /* __ASM_PB1200_H */
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@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
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((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
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((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
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#define NAND_CS 1
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/* should be done by yamon */
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#define NAND_STCFG 0x00400005 /* 8-bit NAND */
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#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
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#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
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#endif /* __ASM_PB1550_H */
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