Staging: udlfb: remove printk and small cleanup
Remove last remaining printk and clarify comments Signed-off-by: Bernie Thompson <bernie@plugable.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -83,8 +83,8 @@ static struct fb_deferred_io dlfb_defio;
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#endif
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/*
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* Inserts a specific DisplayLink controller command into the provided
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* buffer.
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* All DisplayLink bulk operations start with 0xAF, followed by specific code
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* All operations are written to buffers which then later get sent to device
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*/
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static char *dlfb_set_register(char *buf, u8 reg, u8 val)
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{
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@ -129,6 +129,10 @@ static char *dlfb_set_base16bpp(char *wrptr, u32 base)
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return dlfb_set_register(wrptr, 0x22, base);
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}
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/*
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* DisplayLink HW has separate 16bpp and 8bpp framebuffers.
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* In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer
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*/
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static char *dlfb_set_base8bpp(char *wrptr, u32 base)
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{
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wrptr = dlfb_set_register(wrptr, 0x26, base >> 16);
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@ -161,7 +165,7 @@ static char *dlfb_set_register_16be(char *wrptr, u8 reg, u16 value)
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* same actual count. This makes sense once you read above a couple of
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* times and think about it from a hardware perspective.
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*/
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static u16 lfsr16(u16 actual_count)
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static u16 dlfb_lfsr16(u16 actual_count)
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{
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u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */
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@ -180,7 +184,7 @@ static u16 lfsr16(u16 actual_count)
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*/
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static char *dlfb_set_register_lfsr16(char *wrptr, u8 reg, u16 value)
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{
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return dlfb_set_register_16(wrptr, reg, lfsr16(value));
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return dlfb_set_register_16(wrptr, reg, dlfb_lfsr16(value));
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}
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/*
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@ -292,8 +296,9 @@ static int dlfb_ops_mmap(struct fb_info *info, struct vm_area_struct *vma)
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unsigned long size = vma->vm_end - vma->vm_start;
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unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
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unsigned long page, pos;
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struct dlfb_data *dev = info->par;
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printk("MMAP: %lu %u\n", offset + size, info->fix.smem_len);
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dl_notice("MMAP: %lu %u\n", offset + size, info->fix.smem_len);
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if (offset + size > info->fix.smem_len)
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return -EINVAL;
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