drm/amdgpu:new field members for SRIOV
and implement CSA functions in this file Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -28,11 +28,17 @@
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#define AMDGPU_SRIOV_CAPS_ENABLE_IOV (1 << 1) /* sr-iov is enabled on this GPU */
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#define AMDGPU_SRIOV_CAPS_IS_VF (1 << 2) /* this GPU is a virtual function */
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#define AMDGPU_PASSTHROUGH_MODE (1 << 3) /* thw whole GPU is pass through for VM */
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/* GPU virtualization */
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struct amdgpu_virt {
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uint32_t caps;
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struct amdgpu_bo *csa_obj;
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uint64_t csa_vmid0_addr;
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};
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#define AMDGPU_CSA_SIZE (8 * 1024)
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#define AMDGPU_CSA_VADDR (AMDGPU_VA_RESERVED_SIZE - AMDGPU_CSA_SIZE)
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#define amdgpu_sriov_enabled(adev) \
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((adev)->virt.caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
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@ -111,6 +111,8 @@ struct amdgpu_vm {
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/* client id */
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u64 client_id;
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/* each VM will map on CSA */
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struct amdgpu_bo_va *csa_bo_va;
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};
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struct amdgpu_vm_id {
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