A few more MIPS fixes:
- Fix a silly typo in virt_addr_valid which led to completely bogus behavior (that happened to stop tripping up hardened usercopy despite being broken). - Fix UART parity setup on AR933x systems. - A build fix for non-Linux build machines. - Have the 'all' make target build DTBs, primarily to fit in with the behavior of scripts/package/builddeb. - Handle an execution hazard in TLB exceptions that use KScratch registers, which could inadvertently clobber the $1 register on some generally higher-end out-of-order CPUs. - A MAINTAINERS update to fix the path to the NAND driver for Ingenic systems. -----BEGIN PGP SIGNATURE----- iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXSDJfhUccGF1bC5idXJ0 b25AbWlwcy5jb20ACgkQPqefrLV1AN35ygEA30KckazfjbtmW0EqD+C19sgtbSS3 eCAiweHHwLJoyUUBAJ/HzlZ8ap2X9ilZuFdzKEf1igj5WsLIyrkl6kkauUEA =DRYO -----END PGP SIGNATURE----- Merge tag 'mips_fixes_5.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS fixes from Paul Burton: "A few more MIPS fixes: - Fix a silly typo in virt_addr_valid which led to completely bogus behavior (that happened to stop tripping up hardened usercopy despite being broken). - Fix UART parity setup on AR933x systems. - A build fix for non-Linux build machines. - Have the 'all' make target build DTBs, primarily to fit in with the behavior of scripts/package/builddeb. - Handle an execution hazard in TLB exceptions that use KScratch registers, which could inadvertently clobber the $1 register on some generally higher-end out-of-order CPUs. - A MAINTAINERS update to fix the path to the NAND driver for Ingenic systems" * tag 'mips_fixes_5.2_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MAINTAINERS: Correct path to moved files MIPS: Add missing EHB in mtc0 -> mfc0 sequence. MIPS: have "plain" make calls build dtbs for selected platforms MIPS: fix build on non-linux hosts MIPS: ath79: fix ar933x uart parity mode MIPS: Fix bounds check virt_addr_valid
This commit is contained in:
commit
bcc0e65f47
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@ -7810,7 +7810,7 @@ INGENIC JZ4780 NAND DRIVER
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M: Harvey Hunt <harveyhuntnexus@gmail.com>
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L: linux-mtd@lists.infradead.org
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S: Maintained
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F: drivers/mtd/nand/raw/jz4780_*
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F: drivers/mtd/nand/raw/ingenic/
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INOTIFY
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M: Jan Kara <jack@suse.cz>
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@ -17,6 +17,7 @@ archscripts: scripts_basic
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$(Q)$(MAKE) $(build)=arch/mips/boot/tools relocs
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KBUILD_DEFCONFIG := 32r2el_defconfig
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KBUILD_DTBS := dtbs
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#
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# Select the object file format to substitute into the linker script.
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@ -384,7 +385,7 @@ quiet_cmd_64 = OBJCOPY $@
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vmlinux.64: vmlinux
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$(call cmd,64)
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all: $(all-y)
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all: $(all-y) $(KBUILD_DTBS)
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# boot
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$(boot-y): $(vmlinux-32) FORCE
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@ -78,6 +78,8 @@ OBJCOPYFLAGS_piggy.o := --add-section=.image=$(obj)/vmlinux.bin.z \
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$(obj)/piggy.o: $(obj)/dummy.o $(obj)/vmlinux.bin.z FORCE
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$(call if_changed,objcopy)
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HOSTCFLAGS_calc_vmlinuz_load_addr.o += $(LINUXINCLUDE)
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# Calculate the load address of the compressed kernel image
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hostprogs-y := calc_vmlinuz_load_addr
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@ -9,7 +9,7 @@
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "../../../../include/linux/sizes.h"
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#include <linux/sizes.h>
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int main(int argc, char *argv[])
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{
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@ -24,8 +24,8 @@
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#define AR933X_UART_CS_PARITY_S 0
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#define AR933X_UART_CS_PARITY_M 0x3
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#define AR933X_UART_CS_PARITY_NONE 0
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#define AR933X_UART_CS_PARITY_ODD 1
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#define AR933X_UART_CS_PARITY_EVEN 2
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#define AR933X_UART_CS_PARITY_ODD 2
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#define AR933X_UART_CS_PARITY_EVEN 3
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#define AR933X_UART_CS_IF_MODE_S 2
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#define AR933X_UART_CS_IF_MODE_M 0x3
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#define AR933X_UART_CS_IF_MODE_NONE 0
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@ -203,7 +203,7 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
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bool __virt_addr_valid(const volatile void *kaddr)
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{
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unsigned long vaddr = (unsigned long)vaddr;
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unsigned long vaddr = (unsigned long)kaddr;
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if ((vaddr < PAGE_OFFSET) || (vaddr >= MAP_BASE))
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return false;
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@ -391,6 +391,7 @@ static struct work_registers build_get_work_registers(u32 **p)
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static void build_restore_work_registers(u32 **p)
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{
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if (scratch_reg >= 0) {
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uasm_i_ehb(p);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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return;
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}
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@ -668,10 +669,12 @@ static void build_restore_pagemask(u32 **p, struct uasm_reloc **r,
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uasm_i_mtc0(p, 0, C0_PAGEMASK);
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uasm_il_b(p, r, lid);
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}
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if (scratch_reg >= 0)
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if (scratch_reg >= 0) {
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uasm_i_ehb(p);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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else
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} else {
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UASM_i_LW(p, 1, scratchpad_offset(0), 0);
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}
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} else {
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/* Reset default page size */
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if (PM_DEFAULT_MASK >> 16) {
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@ -938,10 +941,12 @@ build_get_pgd_vmalloc64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
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uasm_i_jr(p, ptr);
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if (mode == refill_scratch) {
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if (scratch_reg >= 0)
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if (scratch_reg >= 0) {
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uasm_i_ehb(p);
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UASM_i_MFC0(p, 1, c0_kscratch(), scratch_reg);
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else
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} else {
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UASM_i_LW(p, 1, scratchpad_offset(0), 0);
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}
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} else {
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uasm_i_nop(p);
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}
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@ -1258,6 +1263,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
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UASM_i_MTC0(p, odd, C0_ENTRYLO1); /* load it */
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if (c0_scratch_reg >= 0) {
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uasm_i_ehb(p);
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UASM_i_MFC0(p, scratch, c0_kscratch(), c0_scratch_reg);
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build_tlb_write_entry(p, l, r, tlb_random);
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uasm_l_leave(l, *p);
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@ -1603,15 +1609,17 @@ static void build_setup_pgd(void)
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uasm_i_dinsm(&p, a0, 0, 29, 64 - 29);
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uasm_l_tlbl_goaround1(&l, p);
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UASM_i_SLL(&p, a0, a0, 11);
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uasm_i_jr(&p, 31);
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UASM_i_MTC0(&p, a0, C0_CONTEXT);
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uasm_i_jr(&p, 31);
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uasm_i_ehb(&p);
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} else {
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/* PGD in c0_KScratch */
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uasm_i_jr(&p, 31);
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if (cpu_has_ldpte)
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UASM_i_MTC0(&p, a0, C0_PWBASE);
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else
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UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg);
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uasm_i_jr(&p, 31);
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uasm_i_ehb(&p);
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}
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#else
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#ifdef CONFIG_SMP
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@ -1625,13 +1633,16 @@ static void build_setup_pgd(void)
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UASM_i_LA_mostly(&p, a2, pgdc);
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UASM_i_SW(&p, a0, uasm_rel_lo(pgdc), a2);
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#endif /* SMP */
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uasm_i_jr(&p, 31);
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/* if pgd_reg is allocated, save PGD also to scratch register */
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if (pgd_reg != -1)
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if (pgd_reg != -1) {
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UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg);
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else
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uasm_i_jr(&p, 31);
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uasm_i_ehb(&p);
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} else {
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uasm_i_jr(&p, 31);
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uasm_i_nop(&p);
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}
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#endif
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if (p >= (u32 *)tlbmiss_handler_setup_pgd_end)
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panic("tlbmiss_handler_setup_pgd space exceeded");
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