tty: serial: samsung: add byte-order aware bit functions
This driver makes use of the __set_bit() and __clear_bit() functions. When running under big-endian, these functions don't convert the bit indexes when working with peripheral registers, leading to the incorrect bits being set and cleared when running big-endian. Add two new driver functions for setting and clearing bits that are byte-order aware. Signed-off-by: Matthew Leach <matthew@mattleach.net> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -169,8 +169,7 @@ static void s3c24xx_serial_stop_tx(struct uart_port *port)
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return;
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if (s3c24xx_serial_has_interrupt_mask(port))
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__set_bit(S3C64XX_UINTM_TXD,
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portaddrl(port, S3C64XX_UINTM));
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s3c24xx_set_bit(port, S3C64XX_UINTM_TXD, S3C64XX_UINTM);
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else
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disable_irq_nosync(ourport->tx_irq);
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@ -235,8 +234,7 @@ static void enable_tx_dma(struct s3c24xx_uart_port *ourport)
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/* Mask Tx interrupt */
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if (s3c24xx_serial_has_interrupt_mask(port))
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__set_bit(S3C64XX_UINTM_TXD,
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portaddrl(port, S3C64XX_UINTM));
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s3c24xx_set_bit(port, S3C64XX_UINTM_TXD, S3C64XX_UINTM);
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else
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disable_irq_nosync(ourport->tx_irq);
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@ -269,8 +267,8 @@ static void enable_tx_pio(struct s3c24xx_uart_port *ourport)
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/* Unmask Tx interrupt */
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if (s3c24xx_serial_has_interrupt_mask(port))
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__clear_bit(S3C64XX_UINTM_TXD,
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portaddrl(port, S3C64XX_UINTM));
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s3c24xx_clear_bit(port, S3C64XX_UINTM_TXD,
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S3C64XX_UINTM);
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else
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enable_irq(ourport->tx_irq);
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@ -397,8 +395,8 @@ static void s3c24xx_serial_stop_rx(struct uart_port *port)
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if (rx_enabled(port)) {
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dbg("s3c24xx_serial_stop_rx: port=%p\n", port);
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if (s3c24xx_serial_has_interrupt_mask(port))
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__set_bit(S3C64XX_UINTM_RXD,
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portaddrl(port, S3C64XX_UINTM));
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s3c24xx_set_bit(port, S3C64XX_UINTM_RXD,
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S3C64XX_UINTM);
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else
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disable_irq_nosync(ourport->rx_irq);
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rx_enabled(port) = 0;
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@ -1069,7 +1067,7 @@ static int s3c64xx_serial_startup(struct uart_port *port)
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spin_unlock_irqrestore(&port->lock, flags);
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/* Enable Rx Interrupt */
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__clear_bit(S3C64XX_UINTM_RXD, portaddrl(port, S3C64XX_UINTM));
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s3c24xx_clear_bit(port, S3C64XX_UINTM_RXD, S3C64XX_UINTM);
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dbg("s3c64xx_serial_startup ok\n");
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return ret;
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@ -123,4 +123,32 @@ struct s3c24xx_uart_port {
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#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port, reg))
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#define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg))
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/* Byte-order aware bit setting/clearing functions. */
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static inline void s3c24xx_set_bit(struct uart_port *port, int idx,
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unsigned int reg)
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{
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unsigned long flags;
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u32 val;
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local_irq_save(flags);
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val = rd_regl(port, reg);
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val |= (1 << idx);
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wr_regl(port, reg, val);
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local_irq_restore(flags);
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}
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static inline void s3c24xx_clear_bit(struct uart_port *port, int idx,
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unsigned int reg)
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{
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unsigned long flags;
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u32 val;
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local_irq_save(flags);
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val = rd_regl(port, reg);
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val &= ~(1 << idx);
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wr_regl(port, reg, val);
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local_irq_restore(flags);
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}
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#endif
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