ALSA: hda/tegra: correct number of SDO lines for Tegra194
Tegra194 supports 4 SDO lines but GCAP register indicates 2 lines. Thus it does not reflect the true capability of the HW. This patch presents a workaround by updating NSDO value accordingly in T_AZA_DBG_CFG_2 register. Signed-off-by: Sameer Pujar <spujar@nvidia.com> Link: https://lore.kernel.org/r/1588580176-2801-2-git-send-email-spujar@nvidia.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -52,10 +52,21 @@
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#define HDA_IPFS_INTR_MASK 0x188
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#define HDA_IPFS_EN_INTR (1 << 16)
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/* FPCI */
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#define FPCI_DBG_CFG_2 0x10F4
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#define FPCI_GCAP_NSDO_SHIFT 18
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#define FPCI_GCAP_NSDO_MASK (0x3 << FPCI_GCAP_NSDO_SHIFT)
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/* max number of SDs */
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#define NUM_CAPTURE_SD 1
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#define NUM_PLAYBACK_SD 1
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/*
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* Tegra194 does not reflect correct number of SDO lines. Below macro
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* is used to update the GCAP register to workaround the issue.
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*/
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#define TEGRA194_NUM_SDO_LINES 4
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struct hda_tegra {
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struct azx chip;
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struct device *dev;
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@ -275,6 +286,7 @@ static int hda_tegra_init_clk(struct hda_tegra *hda)
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static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
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{
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struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
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struct hdac_bus *bus = azx_bus(chip);
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struct snd_card *card = chip->card;
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int err;
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@ -298,6 +310,26 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
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bus->irq = irq_id;
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card->sync_irq = bus->irq;
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/*
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* Tegra194 has 4 SDO lines and the STRIPE can be used to
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* indicate how many of the SDO lines the stream should be
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* striped. But GCAP register does not reflect the true
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* capability of HW. Below workaround helps to fix this.
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*
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* GCAP_NSDO is bits 19:18 in T_AZA_DBG_CFG_2,
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* 0 for 1 SDO, 1 for 2 SDO, 2 for 4 SDO lines.
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*/
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if (of_device_is_compatible(np, "nvidia,tegra194-hda")) {
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u32 val;
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dev_info(card->dev, "Override SDO lines to %u\n",
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TEGRA194_NUM_SDO_LINES);
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val = readl(hda->regs + FPCI_DBG_CFG_2) & ~FPCI_GCAP_NSDO_MASK;
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val |= (TEGRA194_NUM_SDO_LINES >> 1) << FPCI_GCAP_NSDO_SHIFT;
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writel(val, hda->regs + FPCI_DBG_CFG_2);
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}
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gcap = azx_readw(chip, GCAP);
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dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
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@ -408,6 +440,7 @@ static int hda_tegra_create(struct snd_card *card,
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static const struct of_device_id hda_tegra_match[] = {
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{ .compatible = "nvidia,tegra30-hda" },
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{ .compatible = "nvidia,tegra194-hda" },
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{},
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};
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MODULE_DEVICE_TABLE(of, hda_tegra_match);
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