arm64: dts: fvp/juno: Fix node address fields
The Arm Ltd. boards were using an outdated address convention in the DT node names, by separating the high from the low 32-bits of an address by a comma. Remove the comma from the node name suffix to be DT spec compliant. Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
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@ -31,7 +31,7 @@
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#interrupt-cells = <1>;
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ranges;
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nor_flash: flash@0,00000000 {
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nor_flash: flash@0 {
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compatible = "arm,vexpress-flash", "cfi-flash";
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reg = <0 0x00000000 0x04000000>,
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<4 0x00000000 0x04000000>;
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@ -41,13 +41,13 @@
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};
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};
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psram@1,00000000 {
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psram@100000000 {
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compatible = "arm,vexpress-psram", "mtd-ram";
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reg = <1 0x00000000 0x02000000>;
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bank-width = <4>;
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};
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ethernet@2,02000000 {
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ethernet@202000000 {
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compatible = "smsc,lan9118", "smsc,lan9115";
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reg = <2 0x02000000 0x10000>;
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interrupts = <15>;
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@ -59,14 +59,14 @@
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vddvario-supply = <&v2m_fixed_3v3>;
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};
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usb@2,03000000 {
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usb@203000000 {
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compatible = "nxp,usb-isp1761";
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reg = <2 0x03000000 0x20000>;
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interrupts = <16>;
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port1-otg;
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};
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iofpga@3,00000000 {
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iofpga@300000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -151,7 +151,7 @@
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<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
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<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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ethernet@2,02000000 {
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ethernet@202000000 {
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compatible = "smsc,lan91c111";
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reg = <2 0x02000000 0x10000>;
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interrupts = <15>;
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@ -178,7 +178,7 @@
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clock-output-names = "v2m:refclk32khz";
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};
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iofpga@3,00000000 {
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iofpga@300000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -103,7 +103,7 @@
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};
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};
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flash@0,00000000 {
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flash@0 {
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/* 2 * 32MiB NOR Flash memory mounted on CS0 */
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compatible = "arm,vexpress-flash", "cfi-flash";
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reg = <0 0x00000000 0x04000000>;
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@ -120,7 +120,7 @@
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};
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};
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ethernet@2,00000000 {
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ethernet@200000000 {
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compatible = "smsc,lan9118", "smsc,lan9115";
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reg = <2 0x00000000 0x10000>;
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interrupts = <3>;
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@ -133,7 +133,7 @@
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vddvario-supply = <&mb_fixed_3v3>;
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};
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iofpga@3,00000000 {
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iofpga@300000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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@ -9,7 +9,7 @@
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motherboard {
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arm,v2m-memory-map = "rs2";
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iofpga@3,00000000 {
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iofpga@300000000 {
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virtio-p9@140000 {
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compatible = "virtio,mmio";
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reg = <0x140000 0x200>;
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@ -17,14 +17,14 @@
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#interrupt-cells = <1>;
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ranges;
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flash@0,00000000 {
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flash@0 {
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compatible = "arm,vexpress-flash", "cfi-flash";
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reg = <0 0x00000000 0x04000000>,
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<4 0x00000000 0x04000000>;
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bank-width = <4>;
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};
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ethernet@2,02000000 {
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ethernet@202000000 {
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compatible = "smsc,lan91c111";
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reg = <2 0x02000000 0x10000>;
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interrupts = <15>;
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@ -51,7 +51,7 @@
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clock-output-names = "v2m:refclk32khz";
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};
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iofpga@3,00000000 {
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iofpga@300000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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