ASoC: sgtl5000: Fix wrong register name in restore
Correct SGTL5000_CHIP_CLK_CTRL to SGTL5000_CHIP_REF_CTRL in sgtl5000_restore_regs(), and add comment to explain the restore order. Reported-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Zeng Zhaoming <zengzm.kernel@gmail.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -987,12 +987,12 @@ static int sgtl5000_restore_regs(struct snd_soc_codec *codec)
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/* restore regular registers */
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for (reg = 0; reg <= SGTL5000_CHIP_SHORT_CTRL; reg += 2) {
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/* this regs depends on the others */
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/* These regs should restore in particular order */
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if (reg == SGTL5000_CHIP_ANA_POWER ||
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reg == SGTL5000_CHIP_CLK_CTRL ||
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reg == SGTL5000_CHIP_LINREG_CTRL ||
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reg == SGTL5000_CHIP_LINE_OUT_CTRL ||
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reg == SGTL5000_CHIP_CLK_CTRL)
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reg == SGTL5000_CHIP_REF_CTRL)
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continue;
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snd_soc_write(codec, reg, cache[reg]);
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@ -1003,8 +1003,17 @@ static int sgtl5000_restore_regs(struct snd_soc_codec *codec)
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snd_soc_write(codec, reg, cache[reg]);
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/*
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* restore power and other regs according
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* to set_power() and set_clock()
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* restore these regs according to the power setting sequence in
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* sgtl5000_set_power_regs() and clock setting sequence in
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* sgtl5000_set_clock().
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*
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* The order of restore is:
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* 1. SGTL5000_CHIP_CLK_CTRL MCLK_FREQ bits (1:0) should be restore after
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* SGTL5000_CHIP_ANA_POWER PLL bits set
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* 2. SGTL5000_CHIP_LINREG_CTRL should be set before
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* SGTL5000_CHIP_ANA_POWER LINREG_D restored
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* 3. SGTL5000_CHIP_REF_CTRL controls Analog Ground Voltage,
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* prefer to resotre it after SGTL5000_CHIP_ANA_POWER restored
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*/
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snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL,
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cache[SGTL5000_CHIP_LINREG_CTRL]);
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