regmap: Updates for v3.14
Nothing terribly exciting with regmap this release, mainly a few small extensions to allow more devices to be supported: - Allow the bulk I/O APIs to be used with no-bus regmaps. - Support interrupt controllers with zero ack base. - Warning and spelling fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJS3UFZAAoJELSic+t+oim9zBoP/1+NutE5VraEmanqx6oXBa94 EOBqdOP+DmiXjRxzZsB9EmLx2SkS2DLh+/D1aQR4L7+eyH2NDJYVCJYH61TkS5RL IcO1K9h+vBrDop6UyDEyqp5QXFUk0gk+EVAuIyqh7ODQqZlYPgAfRp/U1OCISwe7 OY28+wxYUY8QvWPkp312ijEODDkti95mrM9xfNKoWySeGY7+A7q0j7EPudwfmlLJ p4HeHflSJ09eHDGJF1LDLvWiaxuHGLcUL7G8tGAtf8zWJkdvwQiT6ia3JjpMnfeS hLBxFwr4rZbSuenGh7eE1ZHkEZor2ePJNoZa93hzMJ4l5PXKU+e5NotW/YsNrIY7 nXVxFFZmcOOYKuLHGztjHrzZX8T/V4FvLUyESQitG5XZaBOX76aBLJMhhzm4mzBD yJ43mMJpLNHrQYiCdnE7GvFrH+GQysyY2w5LwCkE5UMZej8+y2qsRZO298o7sRhB ihlYDJN/IGm0qa+cH2GawI5YdAO/rQu+Pm8qamkNaxw7ooa81KIad53Q9B76XyQS GWi0mxNBlKryReHWHfv8U4M3ABS4IIGFPFH1MZ2NPpYoa7dDKyDxnOSDmVy7ZpbY t+TK86hFBTIREST4unssZGg0ehSmuOMIwnyqqU/rQ3RX+71PsHHspqUeyS6I8jM4 aa5hyi5eyb+DC4iIojXu =iPRC -----END PGP SIGNATURE----- Merge tag 'regmap-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap Pull regmap updates from Mark Brown: "Nothing terribly exciting with regmap this release, mainly a few small extensions to allow more devices to be supported: - Allow the bulk I/O APIs to be used with no-bus regmaps - Support interrupt controllers with zero ack base - Warning and spelling fixes" * tag 'regmap-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: regmap: fix a couple of typos regmap: Allow regmap_bulk_write() to work for "no-bus" regmaps regmap: Allow regmap_bulk_read() to work for "no-bus" regmaps regmap: irq: Allow using zero value for ack_base regmap: Fix 'ret' would return an uninitialized value
This commit is contained in:
commit
bb1b64908f
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@ -113,7 +113,7 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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* OR if there is masked interrupt which hasn't been Acked,
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* it'll be ignored in irq handler, then may introduce irq storm
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*/
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if (d->mask_buf[i] && d->chip->ack_base) {
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if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) {
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reg = d->chip->ack_base +
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(i * map->reg_stride * d->irq_reg_stride);
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ret = regmap_write(map, reg, d->mask_buf[i]);
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@ -271,7 +271,7 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)
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for (i = 0; i < data->chip->num_regs; i++) {
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data->status_buf[i] &= ~data->mask_buf[i];
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if (data->status_buf[i] && chip->ack_base) {
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if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) {
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reg = chip->ack_base +
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(i * map->reg_stride * data->irq_reg_stride);
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ret = regmap_write(map, reg, data->status_buf[i]);
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@ -448,7 +448,7 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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goto err_alloc;
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}
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if (d->status_buf[i] && chip->ack_base) {
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if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) {
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reg = chip->ack_base +
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(i * map->reg_stride * d->irq_reg_stride);
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ret = regmap_write(map, reg,
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@ -1514,21 +1514,49 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
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{
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int ret = 0, i;
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size_t val_bytes = map->format.val_bytes;
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void *wval;
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if (!map->bus)
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return -EINVAL;
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if (!map->format.parse_inplace)
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if (map->bus && !map->format.parse_inplace)
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return -EINVAL;
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if (reg % map->reg_stride)
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return -EINVAL;
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map->lock(map->lock_arg);
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/*
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* Some devices don't support bulk write, for
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* them we have a series of single write operations.
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*/
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if (!map->bus || map->use_single_rw) {
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for (i = 0; i < val_count; i++) {
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unsigned int ival;
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/* No formatting is require if val_byte is 1 */
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if (val_bytes == 1) {
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wval = (void *)val;
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switch (val_bytes) {
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case 1:
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ival = *(u8 *)(val + (i * val_bytes));
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break;
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case 2:
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ival = *(u16 *)(val + (i * val_bytes));
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break;
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case 4:
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ival = *(u32 *)(val + (i * val_bytes));
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break;
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#ifdef CONFIG_64BIT
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case 8:
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ival = *(u64 *)(val + (i * val_bytes));
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break;
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#endif
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default:
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ret = -EINVAL;
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goto out;
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}
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ret = _regmap_write(map, reg + (i * map->reg_stride),
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ival);
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if (ret != 0)
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goto out;
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}
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} else {
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void *wval;
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wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
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if (!wval) {
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ret = -ENOMEM;
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@ -1537,27 +1565,11 @@ int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
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}
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for (i = 0; i < val_count * val_bytes; i += val_bytes)
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map->format.parse_inplace(wval + i);
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}
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/*
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* Some devices does not support bulk write, for
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* them we have a series of single write operations.
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*/
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if (map->use_single_rw) {
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for (i = 0; i < val_count; i++) {
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ret = _regmap_raw_write(map,
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reg + (i * map->reg_stride),
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val + (i * val_bytes),
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val_bytes);
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if (ret != 0)
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goto out;
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}
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} else {
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ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
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}
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if (val_bytes != 1)
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kfree(wval);
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}
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out:
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map->unlock(map->lock_arg);
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return ret;
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@ -1897,14 +1909,10 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
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size_t val_bytes = map->format.val_bytes;
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bool vol = regmap_volatile_range(map, reg, val_count);
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if (!map->bus)
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return -EINVAL;
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if (!map->format.parse_inplace)
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return -EINVAL;
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if (reg % map->reg_stride)
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return -EINVAL;
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if (vol || map->cache_type == REGCACHE_NONE) {
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if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
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/*
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* Some devices does not support bulk read, for
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* them we have a series of single read operations.
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@ -2173,6 +2181,10 @@ int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
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int i, ret;
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bool bypass;
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if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
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num_regs))
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return 0;
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map->lock(map->lock_arg);
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bypass = map->cache_bypass;
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@ -122,9 +122,9 @@ typedef void (*regmap_unlock)(void *);
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* volatile_table (see below) is not, the check is performed on
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* such table (a register is volatile if it belongs to one of
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* the ranges specified by volatile_table).
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* @precious_reg: Optional callback returning true if the rgister
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* @precious_reg: Optional callback returning true if the register
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* should not be read outside of a call from the driver
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* (eg, a clear on read interrupt status register). If this
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* (e.g., a clear on read interrupt status register). If this
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* field is NULL but precious_table (see below) is not, the
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* check is performed on such table (a register is precious if
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* it belongs to one of the ranges specified by precious_table).
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@ -136,9 +136,9 @@ typedef void (*regmap_unlock)(void *);
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* are not overridden).
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* @reg_read: Optional callback that if filled will be used to perform
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* all the reads from the registers. Should only be provided for
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* devices whos read operation cannot be represented as a simple read
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* operation on a bus such as SPI, I2C, etc. Most of the devices do
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* not need this.
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* devices whose read operation cannot be represented as a simple
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* read operation on a bus such as SPI, I2C, etc. Most of the
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* devices do not need this.
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* @reg_write: Same as above for writing.
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* @fast_io: Register IO is fast. Use a spinlock instead of a mutex
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* to perform locking. This field is ignored if custom lock/unlock
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@ -497,11 +497,13 @@ struct regmap_irq {
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*
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* @status_base: Base status register address.
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* @mask_base: Base mask register address.
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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* @ack_base: Base ack address. If zero then the chip is clear on read.
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* Using zero value is possible with @use_ack bit.
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* @wake_base: Base address for wake enables. If zero unsupported.
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* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
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* @init_ack_masked: Ack all masked interrupts once during initalization.
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* @mask_invert: Inverted mask register: cleared bits are masked out.
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* @use_ack: Use @ack register even if it is zero.
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* @wake_invert: Inverted wake register: cleared bits are wake enabled.
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* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
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*
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@ -520,6 +522,7 @@ struct regmap_irq_chip {
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unsigned int irq_reg_stride;
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bool init_ack_masked:1;
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bool mask_invert:1;
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bool use_ack:1;
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bool wake_invert:1;
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bool runtime_pm:1;
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