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Input: tegra-kbc - change wakeup logic to be all or nothing 

Tegra hardware design cannot reliably support an arbitrary set of keys
waking up the system. Modify wakeup logic so either any key wakes the
system up or none will do.

Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
This commit is contained in:
Rakesh Iyer 2011-05-11 14:24:10 -07:00 committed by Dmitry Torokhov
parent 7388754e03
commit baafb43537
2 changed files with 2 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/mach-tegra/include/mach/kbc.h
View File

@ -50,9 +50,6 @@ struct tegra_kbc_platform_data {
unsigned int debounce_cnt; unsigned int debounce_cnt;
unsigned int repeat_cnt; unsigned int repeat_cnt;
unsigned int wake_cnt; /* 0:wake on any key >1:wake on wake_cfg */
const struct tegra_kbc_wake_key *wake_cfg;
struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO]; struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
const struct matrix_keymap_data *keymap_data; const struct matrix_keymap_data *keymap_data;

24
drivers/input/keyboard/tegra-kbc.c
View File

@ -66,8 +66,6 @@ struct tegra_kbc {
void __iomem *mmio; void __iomem *mmio;
struct input_dev *idev; struct input_dev *idev;
unsigned int irq; unsigned int irq;
unsigned int wake_enable_rows;
unsigned int wake_enable_cols;
spinlock_t lock; spinlock_t lock;
unsigned int repoll_dly; unsigned int repoll_dly;
unsigned long cp_dly_jiffies; unsigned long cp_dly_jiffies;
@ -418,21 +416,11 @@ static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
int i; int i;
unsigned int rst_val; unsigned int rst_val;
BUG_ON(pdata->wake_cnt > KBC_MAX_KEY); /* Either mask all keys or none. */
rst_val = (filter && pdata->wake_cnt) ? ~0 : 0; rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
for (i = 0; i < KBC_MAX_ROW; i++) for (i = 0; i < KBC_MAX_ROW; i++)
writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
if (filter) {
for (i = 0; i < pdata->wake_cnt; i++) {
u32 val, addr;
addr = pdata->wake_cfg[i].row * 4 + KBC_ROW0_MASK_0;
val = readl(kbc->mmio + addr);
val &= ~(1 << pdata->wake_cfg[i].col);
writel(val, kbc->mmio + addr);
}
}
} }
static void tegra_kbc_config_pins(struct tegra_kbc *kbc) static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
@ -594,7 +582,6 @@ static int __devinit tegra_kbc_probe(struct platform_device *pdev)
struct resource *res; struct resource *res;
int irq; int irq;
int err; int err;
int i;
int num_rows = 0; int num_rows = 0;
unsigned int debounce_cnt; unsigned int debounce_cnt;
unsigned int scan_time_rows; unsigned int scan_time_rows;
@ -651,13 +638,6 @@ static int __devinit tegra_kbc_probe(struct platform_device *pdev)
goto err_iounmap; goto err_iounmap;
} }
kbc->wake_enable_rows = 0;
kbc->wake_enable_cols = 0;
for (i = 0; i < pdata->wake_cnt; i++) {
kbc->wake_enable_rows |= (1 << pdata->wake_cfg[i].row);
kbc->wake_enable_cols |= (1 << pdata->wake_cfg[i].col);
}
/* /*
* The time delay between two consecutive reads of the FIFO is * The time delay between two consecutive reads of the FIFO is
* the sum of the repeat time and the time taken for scanning * the sum of the repeat time and the time taken for scanning