mtd: nand: add generic READ RETRY support
Modern MLC (and even SLC?) NAND can experience a large number of bitflips (beyond the recommended correctability capacity) due to drifts in the voltage threshold (Vt). These bitflips can cause ECC errors to occur well within the expected lifetime of the flash. To account for this, some manufacturers provide a mechanism for shifting the Vt threshold after a corrupted read. The generic pattern seems to be that a particular flash has N read retry modes (where N = 0, traditionally), and after an ECC failure, the host should reconfigure the flash to use the next available mode, then retry the read operation. This process repeats until all bitfips can be corrected or until the host has tried all available retry modes. This patch adds the infrastructure support for a vendor-specific/flash-specific callback, used for setting the read-retry mode (i.e., voltage threshold). For now, this patch always returns the flash to mode 0 (the default mode) after a successful read-retry, according to the flowchart found in Micron's datasheets. This may need to change in the future if it is determined that eventually, mode 0 is insufficient for the majority of the flash cells (and so for performance reasons, we should leave the flash in mode 1, 2, etc.). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com>
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@ -1409,6 +1409,30 @@ static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
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return NULL;
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}
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/**
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* nand_setup_read_retry - [INTERN] Set the READ RETRY mode
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* @mtd: MTD device structure
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* @retry_mode: the retry mode to use
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*
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* Some vendors supply a special command to shift the Vt threshold, to be used
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* when there are too many bitflips in a page (i.e., ECC error). After setting
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* a new threshold, the host should retry reading the page.
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*/
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static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode)
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{
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struct nand_chip *chip = mtd->priv;
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pr_debug("setting READ RETRY mode %d\n", retry_mode);
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if (retry_mode >= chip->read_retries)
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return -EINVAL;
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if (!chip->setup_read_retry)
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return -EOPNOTSUPP;
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return chip->setup_read_retry(mtd, retry_mode);
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}
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/**
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* nand_do_read_ops - [INTERN] Read data with ECC
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* @mtd: MTD device structure
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@ -1430,6 +1454,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
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uint8_t *bufpoi, *oob, *buf;
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unsigned int max_bitflips = 0;
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int retry_mode = 0;
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bool ecc_fail = false;
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chipnr = (int)(from >> chip->chip_shift);
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@ -1454,6 +1479,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
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if (realpage != chip->pagebuf || oob) {
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bufpoi = aligned ? buf : chip->buffers->databuf;
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read_retry:
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chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
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/*
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@ -1494,8 +1520,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
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memcpy(buf, chip->buffers->databuf + col, bytes);
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}
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buf += bytes;
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if (unlikely(oob)) {
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int toread = min(oobreadlen, max_oobsize);
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@ -1514,8 +1538,24 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
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nand_wait_ready(mtd);
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}
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if (mtd->ecc_stats.failed - ecc_failures)
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ecc_fail = true;
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if (mtd->ecc_stats.failed - ecc_failures) {
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if (retry_mode + 1 <= chip->read_retries) {
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retry_mode++;
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ret = nand_setup_read_retry(mtd,
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retry_mode);
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if (ret < 0)
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break;
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/* Reset failures; retry */
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mtd->ecc_stats.failed = ecc_failures;
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goto read_retry;
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} else {
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/* No more retry modes; real failure */
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ecc_fail = true;
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}
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}
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buf += bytes;
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} else {
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memcpy(buf, chip->buffers->databuf + col, bytes);
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buf += bytes;
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@ -1525,6 +1565,14 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
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readlen -= bytes;
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/* Reset to retry mode 0 */
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if (retry_mode) {
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ret = nand_setup_read_retry(mtd, 0);
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if (ret < 0)
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break;
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retry_mode = 0;
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}
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if (!readlen)
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break;
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@ -472,6 +472,8 @@ struct nand_buffers {
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* commands to the chip.
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* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
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* ready.
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* @setup_read_retry: [FLASHSPECIFIC] flash (vendor) specific function for
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* setting the read-retry mode. Mostly needed for MLC NAND.
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* @ecc: [BOARDSPECIFIC] ECC control structure
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* @buffers: buffer structure for read/write
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* @hwcontrol: platform-specific hardware control structure
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@ -518,6 +520,7 @@ struct nand_buffers {
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* non 0 if ONFI supported.
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* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
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* supported, 0 otherwise.
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* @read_retries: [INTERN] the number of read retry modes supported
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* @onfi_set_features: [REPLACEABLE] set the features for ONFI nand
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* @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
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* @bbt: [INTERN] bad block table pointer
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@ -565,6 +568,7 @@ struct nand_chip {
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int feature_addr, uint8_t *subfeature_para);
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int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
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int feature_addr, uint8_t *subfeature_para);
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int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
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int chip_delay;
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unsigned int options;
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@ -589,6 +593,8 @@ struct nand_chip {
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int onfi_version;
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struct nand_onfi_params onfi_params;
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int read_retries;
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flstate_t state;
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uint8_t *oob_poi;
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