mt76: add mt76x02_phy_set_txpower utility routine
Add mt76x02_phy_set_txpower utility routine in mt76x02_phy.c in order to be reused in mt76x0 tx power management code. Moreover move following routines in mt76x02-lib module: - mt76x02_tx_power_mask - mt76x02_get_max_rate_power - mt76x02_limit_rate_power - mt76x02_add_rate_power_offset Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
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b6862effdc
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b9f192b8be
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@ -16,7 +16,7 @@ CFLAGS_trace.o := -I$(src)
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CFLAGS_usb_trace.o := -I$(src)
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mt76x02-lib-y := mt76x02_util.o mt76x02_mac.o mt76x02_mcu.o \
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mt76x02_eeprom.o
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mt76x02_eeprom.o mt76x02_phy.o
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mt76x02-usb-y := mt76x02_usb_mcu.o mt76x02_usb_core.o
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@ -0,0 +1,97 @@
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/kernel.h>
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#include "mt76.h"
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#include "mt76x02_phy.h"
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static u32
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mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4)
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{
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u32 val = 0;
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val |= (v1 & (BIT(6) - 1)) << 0;
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val |= (v2 & (BIT(6) - 1)) << 8;
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val |= (v3 & (BIT(6) - 1)) << 16;
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val |= (v4 & (BIT(6) - 1)) << 24;
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return val;
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}
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int mt76x02_get_max_rate_power(struct mt76_rate_power *r)
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{
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s8 ret = 0;
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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ret = max(ret, r->all[i]);
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return ret;
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}
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EXPORT_SYMBOL_GPL(mt76x02_get_max_rate_power);
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void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit)
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{
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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if (r->all[i] > limit)
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r->all[i] = limit;
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}
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EXPORT_SYMBOL_GPL(mt76x02_limit_rate_power);
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void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset)
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{
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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r->all[i] += offset;
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}
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EXPORT_SYMBOL_GPL(mt76x02_add_rate_power_offset);
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void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_1)
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{
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struct mt76_rate_power *t = &dev->rate_power;
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__mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0,
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txp_0);
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__mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1,
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txp_1);
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__mt76_wr(dev, MT_TX_PWR_CFG_0,
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mt76x02_tx_power_mask(t->cck[0], t->cck[2], t->ofdm[0],
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t->ofdm[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_1,
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mt76x02_tx_power_mask(t->ofdm[4], t->ofdm[6], t->ht[0],
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t->ht[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_2,
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mt76x02_tx_power_mask(t->ht[4], t->ht[6], t->ht[8],
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t->ht[10]));
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__mt76_wr(dev, MT_TX_PWR_CFG_3,
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mt76x02_tx_power_mask(t->ht[12], t->ht[14], t->stbc[0],
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t->stbc[2]));
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__mt76_wr(dev, MT_TX_PWR_CFG_4,
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mt76x02_tx_power_mask(t->stbc[4], t->stbc[6], 0, 0));
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__mt76_wr(dev, MT_TX_PWR_CFG_7,
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mt76x02_tx_power_mask(t->ofdm[7], t->vht[8], t->ht[7],
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t->vht[9]));
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__mt76_wr(dev, MT_TX_PWR_CFG_8,
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mt76x02_tx_power_mask(t->ht[14], 0, t->vht[8], t->vht[9]));
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__mt76_wr(dev, MT_TX_PWR_CFG_9,
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mt76x02_tx_power_mask(t->ht[7], 0, t->stbc[8], t->stbc[9]));
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}
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EXPORT_SYMBOL_GPL(mt76x02_phy_set_txpower);
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@ -0,0 +1,27 @@
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/*
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* Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __MT76x02_PHY_H
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#define __MT76x02_PHY_H
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#include "mt76x02_regs.h"
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void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset);
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void mt76x02_phy_set_txpower(struct mt76_dev *dev, int txp_0, int txp_2);
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void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit);
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int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
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#endif /* __MT76x02_PHY_H */
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@ -381,18 +381,6 @@ void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
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}
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EXPORT_SYMBOL_GPL(mt76x2_get_rate_power);
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int mt76x2_get_max_rate_power(struct mt76_rate_power *r)
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{
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int i;
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s8 ret = 0;
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for (i = 0; i < sizeof(r->all); i++)
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ret = max(ret, r->all[i]);
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return ret;
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}
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EXPORT_SYMBOL_GPL(mt76x2_get_max_rate_power);
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static void
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mt76x2_get_power_info_2g(struct mt76x2_dev *dev, struct mt76x2_tx_power_info *t,
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struct ieee80211_channel *chan, int chain, int offset)
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@ -53,7 +53,6 @@ struct mt76x2_temp_comp {
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void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
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struct ieee80211_channel *chan);
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int mt76x2_get_max_rate_power(struct mt76_rate_power *r);
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void mt76x2_get_power_info(struct mt76x2_dev *dev,
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struct mt76x2_tx_power_info *t,
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struct ieee80211_channel *chan);
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@ -17,6 +17,7 @@
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#include "mt76x2.h"
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#include "mt76x2_eeprom.h"
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#include "mt76x02_phy.h"
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static void
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mt76x2_set_wlan_state(struct mt76x2_dev *dev, bool enable)
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@ -214,7 +215,7 @@ void mt76x2_init_txpower(struct mt76x2_dev *dev,
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mt76x2_get_rate_power(dev, &t, chan);
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chan->max_power = mt76x2_get_max_rate_power(&t) +
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chan->max_power = mt76x02_get_max_rate_power(&t) +
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target_power;
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chan->max_power /= 2;
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@ -18,6 +18,7 @@
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#include "mt76x2.h"
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#include "mt76x2_eeprom.h"
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#include "mt76x2_mcu.h"
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#include "mt76x02_phy.h"
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static void
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mt76x2_adjust_high_lna_gain(struct mt76x2_dev *dev, int reg, s8 offset)
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@ -124,37 +125,6 @@ void mt76x2_phy_set_txpower_regs(struct mt76x2_dev *dev,
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower_regs);
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static void
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mt76x2_limit_rate_power(struct mt76_rate_power *r, int limit)
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{
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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if (r->all[i] > limit)
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r->all[i] = limit;
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}
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static u32
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mt76x2_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4)
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{
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u32 val = 0;
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val |= (v1 & (BIT(6) - 1)) << 0;
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val |= (v2 & (BIT(6) - 1)) << 8;
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val |= (v3 & (BIT(6) - 1)) << 16;
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val |= (v4 & (BIT(6) - 1)) << 24;
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return val;
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}
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static void
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mt76x2_add_rate_power_offset(struct mt76_rate_power *r, int offset)
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{
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int i;
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for (i = 0; i < sizeof(r->all); i++)
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r->all[i] += offset;
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}
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static int
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mt76x2_get_min_rate_power(struct mt76_rate_power *r)
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{
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@ -191,9 +161,9 @@ void mt76x2_phy_set_txpower(struct mt76x2_dev *dev)
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delta = txp.delta_bw80;
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mt76x2_get_rate_power(dev, &t, chan);
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mt76x2_add_rate_power_offset(&t, txp.chain[0].target_power);
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mt76x2_limit_rate_power(&t, dev->mt76.txpower_conf);
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dev->mt76.txpower_cur = mt76x2_get_max_rate_power(&t);
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mt76x02_add_rate_power_offset(&t, txp.chain[0].target_power);
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mt76x02_limit_rate_power(&t, dev->mt76.txpower_conf);
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dev->mt76.txpower_cur = mt76x02_get_max_rate_power(&t);
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base_power = mt76x2_get_min_rate_power(&t);
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delta += base_power - txp.chain[0].target_power;
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@ -211,31 +181,13 @@ void mt76x2_phy_set_txpower(struct mt76x2_dev *dev)
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txp_1 = 0x2f;
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}
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mt76x2_add_rate_power_offset(&t, -base_power);
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mt76x02_add_rate_power_offset(&t, -base_power);
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dev->target_power = txp.chain[0].target_power;
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dev->target_power_delta[0] = txp_0 - txp.chain[0].target_power;
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dev->target_power_delta[1] = txp_1 - txp.chain[0].target_power;
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dev->mt76.rate_power = t;
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mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0, txp_0);
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mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1, txp_1);
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mt76_wr(dev, MT_TX_PWR_CFG_0,
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mt76x2_tx_power_mask(t.cck[0], t.cck[2], t.ofdm[0], t.ofdm[2]));
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mt76_wr(dev, MT_TX_PWR_CFG_1,
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mt76x2_tx_power_mask(t.ofdm[4], t.ofdm[6], t.ht[0], t.ht[2]));
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mt76_wr(dev, MT_TX_PWR_CFG_2,
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mt76x2_tx_power_mask(t.ht[4], t.ht[6], t.ht[8], t.ht[10]));
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mt76_wr(dev, MT_TX_PWR_CFG_3,
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mt76x2_tx_power_mask(t.ht[12], t.ht[14], t.stbc[0], t.stbc[2]));
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mt76_wr(dev, MT_TX_PWR_CFG_4,
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mt76x2_tx_power_mask(t.stbc[4], t.stbc[6], 0, 0));
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mt76_wr(dev, MT_TX_PWR_CFG_7,
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mt76x2_tx_power_mask(t.ofdm[7], t.vht[8], t.ht[7], t.vht[9]));
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mt76_wr(dev, MT_TX_PWR_CFG_8,
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mt76x2_tx_power_mask(t.ht[14], 0, t.vht[8], t.vht[9]));
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mt76_wr(dev, MT_TX_PWR_CFG_9,
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mt76x2_tx_power_mask(t.ht[7], 0, t.stbc[8], t.stbc[9]));
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mt76x02_phy_set_txpower(&dev->mt76, txp_0, txp_1);
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}
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EXPORT_SYMBOL_GPL(mt76x2_phy_set_txpower);
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