[PATCH] skge: handle pci errors better
When a PCI error occurs, try and report more info. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -2764,17 +2764,6 @@ static void skge_mac_parity(struct skge_hw *hw, int port)
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? GMF_CLI_TX_FC : GMF_CLI_TX_PE);
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? GMF_CLI_TX_FC : GMF_CLI_TX_PE);
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}
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}
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static void skge_pci_clear(struct skge_hw *hw)
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{
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u16 status;
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pci_read_config_word(hw->pdev, PCI_STATUS, &status);
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skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_write_config_word(hw->pdev, PCI_STATUS,
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status | PCI_STATUS_ERROR_BITS);
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skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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}
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static void skge_mac_intr(struct skge_hw *hw, int port)
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static void skge_mac_intr(struct skge_hw *hw, int port)
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{
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{
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if (hw->chip_id == CHIP_ID_GENESIS)
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if (hw->chip_id == CHIP_ID_GENESIS)
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@ -2816,23 +2805,39 @@ static void skge_error_irq(struct skge_hw *hw)
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if (hwstatus & IS_M2_PAR_ERR)
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if (hwstatus & IS_M2_PAR_ERR)
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skge_mac_parity(hw, 1);
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skge_mac_parity(hw, 1);
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if (hwstatus & IS_R1_PAR_ERR)
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if (hwstatus & IS_R1_PAR_ERR) {
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printk(KERN_ERR PFX "%s: receive queue parity error\n",
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hw->dev[0]->name);
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skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P);
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skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P);
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}
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if (hwstatus & IS_R2_PAR_ERR)
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if (hwstatus & IS_R2_PAR_ERR) {
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printk(KERN_ERR PFX "%s: receive queue parity error\n",
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hw->dev[1]->name);
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skge_write32(hw, B0_R2_CSR, CSR_IRQ_CL_P);
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skge_write32(hw, B0_R2_CSR, CSR_IRQ_CL_P);
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}
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if (hwstatus & (IS_IRQ_MST_ERR|IS_IRQ_STAT)) {
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if (hwstatus & (IS_IRQ_MST_ERR|IS_IRQ_STAT)) {
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printk(KERN_ERR PFX "hardware error detected (status 0x%x)\n",
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u16 pci_status, pci_cmd;
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hwstatus);
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skge_pci_clear(hw);
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pci_read_config_word(hw->pdev, PCI_COMMAND, &pci_cmd);
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pci_read_config_word(hw->pdev, PCI_STATUS, &pci_status);
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printk(KERN_ERR PFX "%s: PCI error cmd=%#x status=%#x\n",
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pci_name(hw->pdev), pci_cmd, pci_status);
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/* Write the error bits back to clear them. */
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pci_status &= PCI_STATUS_ERROR_BITS;
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skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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pci_write_config_word(hw->pdev, PCI_COMMAND,
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pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
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pci_write_config_word(hw->pdev, PCI_STATUS, pci_status);
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skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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/* if error still set then just ignore it */
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/* if error still set then just ignore it */
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hwstatus = skge_read32(hw, B0_HWE_ISRC);
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hwstatus = skge_read32(hw, B0_HWE_ISRC);
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if (hwstatus & IS_IRQ_STAT) {
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if (hwstatus & IS_IRQ_STAT) {
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pr_debug("IRQ status %x: still set ignoring hardware errors\n",
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printk(KERN_INFO PFX "unable to clear error (so ignoring them)\n");
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hwstatus);
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hw->intr_mask &= ~IS_HW_ERR;
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hw->intr_mask &= ~IS_HW_ERR;
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}
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}
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}
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}
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@ -2998,7 +3003,7 @@ static const char *skge_board_name(const struct skge_hw *hw)
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static int skge_reset(struct skge_hw *hw)
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static int skge_reset(struct skge_hw *hw)
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{
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{
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u32 reg;
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u32 reg;
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u16 ctst;
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u16 ctst, pci_status;
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u8 t8, mac_cfg, pmd_type, phy_type;
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u8 t8, mac_cfg, pmd_type, phy_type;
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int i;
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int i;
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@ -3009,8 +3014,13 @@ static int skge_reset(struct skge_hw *hw)
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skge_write8(hw, B0_CTST, CS_RST_CLR);
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skge_write8(hw, B0_CTST, CS_RST_CLR);
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/* clear PCI errors, if any */
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/* clear PCI errors, if any */
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skge_pci_clear(hw);
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skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
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skge_write8(hw, B2_TST_CTRL2, 0);
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pci_read_config_word(hw->pdev, PCI_STATUS, &pci_status);
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pci_write_config_word(hw->pdev, PCI_STATUS,
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pci_status | PCI_STATUS_ERROR_BITS);
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skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
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skge_write8(hw, B0_CTST, CS_MRST_CLR);
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skge_write8(hw, B0_CTST, CS_MRST_CLR);
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/* restore CLK_RUN bits (for Yukon-Lite) */
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/* restore CLK_RUN bits (for Yukon-Lite) */
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@ -3377,7 +3387,6 @@ static void __devexit skge_remove(struct pci_dev *pdev)
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skge_write32(hw, B0_IMSK, 0);
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skge_write32(hw, B0_IMSK, 0);
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skge_write16(hw, B0_LED, LED_STAT_OFF);
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skge_write16(hw, B0_LED, LED_STAT_OFF);
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skge_pci_clear(hw);
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skge_write8(hw, B0_CTST, CS_RST_SET);
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skge_write8(hw, B0_CTST, CS_RST_SET);
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tasklet_kill(&hw->ext_tasklet);
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tasklet_kill(&hw->ext_tasklet);
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