net/mlx4_en: Verify mlx4_en module parameters
Verify mlx4_en module parameters. In case they are out of range - reset to default values. Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -72,6 +72,12 @@ MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
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MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
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" Per priority bit mask");
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MLX4_EN_PARM_INT(inline_thold, MAX_INLINE,
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"Threshold for using inline data (range: 17-104, default: 104)");
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#define MAX_PFC_TX 0xff
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#define MAX_PFC_RX 0xff
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int en_print(const char *level, const struct mlx4_en_priv *priv,
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const char *format, ...)
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{
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@ -140,6 +146,7 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
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params->prof[i].tx_ring_num = params->num_tx_rings_p_up *
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MLX4_EN_NUM_UP;
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params->prof[i].rss_rings = 0;
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params->prof[i].inline_thold = inline_thold;
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}
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return 0;
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@ -325,8 +332,31 @@ static struct mlx4_interface mlx4_en_interface = {
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.protocol = MLX4_PROT_ETH,
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};
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void mlx4_en_verify_params(void)
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{
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if (pfctx > MAX_PFC_TX) {
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pr_warn("mlx4_en: WARNING: illegal module parameter pfctx 0x%x - should be in range 0-0x%x, will be changed to default (0)\n",
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pfctx, MAX_PFC_TX);
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pfctx = 0;
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}
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if (pfcrx > MAX_PFC_RX) {
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pr_warn("mlx4_en: WARNING: illegal module parameter pfcrx 0x%x - should be in range 0-0x%x, will be changed to default (0)\n",
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pfcrx, MAX_PFC_RX);
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pfcrx = 0;
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}
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if (inline_thold < MIN_PKT_LEN || inline_thold > MAX_INLINE) {
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pr_warn("mlx4_en: WARNING: illegal module parameter inline_thold %d - should be in range %d-%d, will be changed to default (%d)\n",
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inline_thold, MIN_PKT_LEN, MAX_INLINE, MAX_INLINE);
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inline_thold = MAX_INLINE;
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}
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}
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static int __init mlx4_en_init(void)
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{
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mlx4_en_verify_params();
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return mlx4_register_interface(&mlx4_en_interface);
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}
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@ -44,16 +44,6 @@
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#include "mlx4_en.h"
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enum {
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MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
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MAX_BF = 256,
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};
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static int inline_thold __read_mostly = MAX_INLINE;
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module_param_named(inline_thold, inline_thold, int, 0444);
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MODULE_PARM_DESC(inline_thold, "threshold for using inline data");
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int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
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struct mlx4_en_tx_ring **pring, int qpn, u32 size,
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u16 stride, int node, int queue_index)
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@ -75,8 +65,7 @@ int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
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ring->size = size;
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ring->size_mask = size - 1;
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ring->stride = stride;
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inline_thold = min(inline_thold, MAX_INLINE);
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ring->inline_thold = priv->prof->inline_thold;
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tmp = size * sizeof(struct mlx4_en_tx_info);
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ring->tx_info = vmalloc_node(tmp, node);
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@ -520,7 +509,7 @@ static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,
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return ring->buf + index * TXBB_SIZE;
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}
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static int is_inline(struct sk_buff *skb, void **pfrag)
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static int is_inline(int inline_thold, struct sk_buff *skb, void **pfrag)
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{
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void *ptr;
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@ -580,7 +569,7 @@ static int get_real_size(struct sk_buff *skb, struct net_device *dev,
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}
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} else {
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*lso_header_size = 0;
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if (!is_inline(skb, NULL))
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if (!is_inline(priv->prof->inline_thold, skb, NULL))
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real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE;
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else
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real_size = inline_size(skb);
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@ -747,11 +736,11 @@ netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
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tx_info->data_offset = (void *)data - (void *)tx_desc;
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tx_info->linear = (lso_header_size < skb_headlen(skb) &&
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!is_inline(skb, NULL)) ? 1 : 0;
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!is_inline(ring->inline_thold, skb, NULL)) ? 1 : 0;
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data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1;
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if (is_inline(skb, &fragptr)) {
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if (is_inline(ring->inline_thold, skb, &fragptr)) {
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tx_info->inl = 1;
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} else {
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/* Map fragments */
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@ -187,6 +187,13 @@ enum {
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#define GET_AVG_PERF_COUNTER(cnt) (0)
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#endif /* MLX4_EN_PERF_STAT */
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/* Constants for TX flow */
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enum {
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MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
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MAX_BF = 256,
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MIN_PKT_LEN = 17,
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};
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/*
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* Configurables
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*/
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@ -271,6 +278,7 @@ struct mlx4_en_tx_ring {
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bool bf_enabled;
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struct netdev_queue *tx_queue;
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int hwtstamp_tx_type;
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int inline_thold;
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};
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struct mlx4_en_rx_desc {
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@ -346,6 +354,7 @@ struct mlx4_en_port_profile {
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u8 tx_pause;
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u8 tx_ppp;
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int rss_rings;
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int inline_thold;
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};
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struct mlx4_en_profile {
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