MIPS: Alchemy: rewrite USB platform setup.
Use runtime CPU detection to setup all USB parts. Remove the Au1200 OTG and UDC platform devices since there are no drivers for them anyway. Clean up the USB address mess in the au1000 header. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
ce6bc92285
commit
b9581b8488
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@ -111,34 +111,84 @@ static void __init alchemy_setup_uarts(int ctype)
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printk(KERN_INFO "Alchemy: failed to register UARTs\n");
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}
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/* OHCI (USB full speed host controller) */
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static struct resource au1xxx_usb_ohci_resources[] = {
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[0] = {
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.start = USB_OHCI_BASE,
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.end = USB_OHCI_BASE + USB_OHCI_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = FOR_PLATFORM_C_USB_HOST_INT,
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.end = FOR_PLATFORM_C_USB_HOST_INT,
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.flags = IORESOURCE_IRQ,
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},
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/* The dmamask must be set for OHCI/EHCI to work */
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static u64 alchemy_ohci_dmamask = DMA_BIT_MASK(32);
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static u64 __maybe_unused alchemy_ehci_dmamask = DMA_BIT_MASK(32);
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static unsigned long alchemy_ohci_data[][2] __initdata = {
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[ALCHEMY_CPU_AU1000] = { AU1000_USB_OHCI_PHYS_ADDR, AU1000_USB_HOST_INT },
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[ALCHEMY_CPU_AU1500] = { AU1000_USB_OHCI_PHYS_ADDR, AU1500_USB_HOST_INT },
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[ALCHEMY_CPU_AU1100] = { AU1000_USB_OHCI_PHYS_ADDR, AU1100_USB_HOST_INT },
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[ALCHEMY_CPU_AU1550] = { AU1550_USB_OHCI_PHYS_ADDR, AU1550_USB_HOST_INT },
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[ALCHEMY_CPU_AU1200] = { AU1200_USB_OHCI_PHYS_ADDR, AU1200_USB_INT },
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};
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/* The dmamask must be set for OHCI to work */
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static u64 ohci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_ohci_device = {
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.name = "au1xxx-ohci",
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.id = 0,
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.dev = {
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.dma_mask = &ohci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
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.resource = au1xxx_usb_ohci_resources,
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static unsigned long alchemy_ehci_data[][2] __initdata = {
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[ALCHEMY_CPU_AU1200] = { AU1200_USB_EHCI_PHYS_ADDR, AU1200_USB_INT },
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};
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static int __init _new_usbres(struct resource **r, struct platform_device **d)
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{
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*r = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL);
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if (!*r)
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return -ENOMEM;
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*d = kzalloc(sizeof(struct platform_device), GFP_KERNEL);
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if (!*d) {
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kfree(*r);
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return -ENOMEM;
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}
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(*d)->dev.coherent_dma_mask = DMA_BIT_MASK(32);
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(*d)->num_resources = 2;
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(*d)->resource = *r;
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return 0;
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}
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static void __init alchemy_setup_usb(int ctype)
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{
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struct resource *res;
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struct platform_device *pdev;
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/* setup OHCI0. Every variant has one */
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if (_new_usbres(&res, &pdev))
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return;
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res[0].start = alchemy_ohci_data[ctype][0];
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res[0].end = res[0].start + 0x100 - 1;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = alchemy_ohci_data[ctype][1];
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res[1].end = res[1].start;
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res[1].flags = IORESOURCE_IRQ;
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pdev->name = "au1xxx-ohci";
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pdev->id = 0;
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pdev->dev.dma_mask = &alchemy_ohci_dmamask;
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if (platform_device_register(pdev))
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printk(KERN_INFO "Alchemy USB: cannot add OHCI0\n");
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/* setup EHCI0: Au1200 */
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if (ctype == ALCHEMY_CPU_AU1200) {
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if (_new_usbres(&res, &pdev))
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return;
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res[0].start = alchemy_ehci_data[ctype][0];
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res[0].end = res[0].start + 0x100 - 1;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = alchemy_ehci_data[ctype][1];
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res[1].end = res[1].start;
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res[1].flags = IORESOURCE_IRQ;
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pdev->name = "au1xxx-ehci";
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pdev->id = 0;
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pdev->dev.dma_mask = &alchemy_ehci_dmamask;
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if (platform_device_register(pdev))
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printk(KERN_INFO "Alchemy USB: cannot add EHCI0\n");
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}
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}
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/*** AU1100 LCD controller ***/
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#ifdef CONFIG_FB_AU1100
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@ -170,86 +220,6 @@ static struct platform_device au1100_lcd_device = {
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#endif
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#ifdef CONFIG_SOC_AU1200
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/* EHCI (USB high speed host controller) */
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static struct resource au1xxx_usb_ehci_resources[] = {
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[0] = {
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.start = USB_EHCI_BASE,
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.end = USB_EHCI_BASE + USB_EHCI_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 ehci_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_ehci_device = {
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.name = "au1xxx-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
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.resource = au1xxx_usb_ehci_resources,
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};
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/* Au1200 UDC (USB gadget controller) */
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static struct resource au1xxx_usb_gdt_resources[] = {
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[0] = {
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.start = USB_UDC_BASE,
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.end = USB_UDC_BASE + USB_UDC_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_gdt_device = {
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.name = "au1xxx-udc",
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.id = 0,
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.dev = {
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.dma_mask = &udc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
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.resource = au1xxx_usb_gdt_resources,
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};
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/* Au1200 UOC (USB OTG controller) */
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static struct resource au1xxx_usb_otg_resources[] = {
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[0] = {
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.start = USB_UOC_BASE,
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.end = USB_UOC_BASE + USB_UOC_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AU1200_USB_INT,
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.end = AU1200_USB_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 uoc_dmamask = DMA_BIT_MASK(32);
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static struct platform_device au1xxx_usb_otg_device = {
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.name = "au1xxx-uoc",
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.id = 0,
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.dev = {
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.dma_mask = &uoc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
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.resource = au1xxx_usb_otg_resources,
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};
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static struct resource au1200_lcd_resources[] = {
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[0] = {
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@ -534,14 +504,10 @@ static void __init alchemy_setup_macs(int ctype)
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}
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static struct platform_device *au1xxx_platform_devices[] __initdata = {
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&au1xxx_usb_ohci_device,
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#ifdef CONFIG_FB_AU1100
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&au1100_lcd_device,
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#endif
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#ifdef CONFIG_SOC_AU1200
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&au1xxx_usb_ehci_device,
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&au1xxx_usb_gdt_device,
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&au1xxx_usb_otg_device,
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&au1200_lcd_device,
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&au1200_mmc0_device,
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#ifndef CONFIG_MIPS_DB1200
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@ -559,6 +525,7 @@ static int __init au1xxx_platform_init(void)
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alchemy_setup_uarts(ctype);
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alchemy_setup_macs(ctype);
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alchemy_setup_usb(ctype);
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err = platform_add_devices(au1xxx_platform_devices,
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ARRAY_SIZE(au1xxx_platform_devices));
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@ -833,56 +833,6 @@ enum soc_au1200_ints {
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#endif
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/* Au1000 */
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#ifdef CONFIG_SOC_AU1000
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#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */
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#define USB_HOST_CONFIG 0xB017FFFC
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#define FOR_PLATFORM_C_USB_HOST_INT AU1000_USB_HOST_INT
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#endif /* CONFIG_SOC_AU1000 */
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/* Au1500 */
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#ifdef CONFIG_SOC_AU1500
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#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */
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#define USB_HOST_CONFIG 0xB017fffc
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#define FOR_PLATFORM_C_USB_HOST_INT AU1500_USB_HOST_INT
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#endif /* CONFIG_SOC_AU1500 */
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/* Au1100 */
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#ifdef CONFIG_SOC_AU1100
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#define USB_OHCI_BASE 0x10100000 /* phys addr for ioremap */
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#define USB_HOST_CONFIG 0xB017FFFC
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#define FOR_PLATFORM_C_USB_HOST_INT AU1100_USB_HOST_INT
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#endif /* CONFIG_SOC_AU1100 */
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#ifdef CONFIG_SOC_AU1550
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#define USB_OHCI_BASE 0x14020000 /* phys addr for ioremap */
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#define USB_OHCI_LEN 0x00060000
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#define USB_HOST_CONFIG 0xB4027ffc
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#define FOR_PLATFORM_C_USB_HOST_INT AU1550_USB_HOST_INT
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#endif /* CONFIG_SOC_AU1550 */
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#ifdef CONFIG_SOC_AU1200
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#define USB_UOC_BASE 0x14020020
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#define USB_UOC_LEN 0x20
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#define USB_OHCI_BASE 0x14020100
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#define USB_OHCI_LEN 0x100
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#define USB_EHCI_BASE 0x14020200
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#define USB_EHCI_LEN 0x100
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#define USB_UDC_BASE 0x14022000
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#define USB_UDC_LEN 0x2000
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#define FOR_PLATFORM_C_USB_HOST_INT AU1200_USB_INT
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#endif /* CONFIG_SOC_AU1200 */
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/* Programmable Counters 0 and 1 */
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#define SYS_BASE 0xB1900000
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#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
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@ -953,11 +903,6 @@ enum soc_au1200_ints {
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# define I2S_CONTROL_D (1 << 1)
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# define I2S_CONTROL_CE (1 << 0)
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/* USB Host Controller */
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#ifndef USB_OHCI_LEN
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#define USB_OHCI_LEN 0x00100000
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#endif
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/* Ethernet Controllers */
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