powerpc: Expose PMCs & cache topology in sysfs on 32-bit
The file arch/powerpc/kernel/sysfs.c is currently only compiled for 64-bit kernels. It contain code to register CPU sysdevs in sysfs and add various properties such as cache topology and raw access by root to performance monitor counters (PMCs). A lot of that can be re-used as is on 32-bits. This makes the file be built for both, with appropriate ifdef'ing for the few bits that are really 64-bit specific, and adds some support for the raw PMCs for 75x and 74xx processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
parent
41eba0ad00
commit
b950bdd0fc
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@ -62,6 +62,7 @@ enum powerpc_pmc_type {
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PPC_PMC_DEFAULT = 0,
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PPC_PMC_IBM = 1,
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PPC_PMC_PA6T = 2,
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PPC_PMC_G4 = 3,
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};
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struct pt_regs;
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@ -27,13 +27,13 @@ endif
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obj-y := cputable.o ptrace.o syscalls.o \
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irq.o align.o signal_32.o pmc.o vdso.o \
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init_task.o process.o systbl.o idle.o \
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signal.o
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signal.o sysfs.o
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obj-y += vdso32/
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obj-$(CONFIG_PPC64) += setup_64.o sys_ppc32.o \
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signal_64.o ptrace32.o \
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paca.o cpu_setup_ppc970.o \
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cpu_setup_pa6t.o \
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firmware.o sysfs.o nvram_64.o
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firmware.o nvram_64.o
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obj-$(CONFIG_PPC64) += vdso64/
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obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
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obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
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@ -610,6 +610,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750cx,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -623,6 +624,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750cx,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -636,6 +638,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750cx,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -649,6 +652,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -662,6 +666,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -675,6 +680,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -688,6 +694,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -701,6 +708,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750fx,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -714,6 +722,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750fx,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -727,6 +736,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_750,
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.machine_check = machine_check_generic,
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.platform = "ppc750",
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@ -741,6 +751,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_7400,
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.machine_check = machine_check_generic,
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.platform = "ppc7400",
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@ -755,6 +766,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_7400,
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.machine_check = machine_check_generic,
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.platform = "ppc7400",
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@ -769,6 +781,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 4,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_7410,
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.machine_check = machine_check_generic,
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.platform = "ppc7400",
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@ -783,6 +796,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -799,6 +813,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -815,6 +830,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -831,6 +847,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -847,6 +864,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -863,6 +881,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -879,6 +898,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -895,6 +915,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -910,6 +931,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -926,6 +948,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -942,6 +965,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.icache_bsize = 32,
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.dcache_bsize = 32,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_G4,
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.cpu_setup = __setup_cpu_745x,
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.oprofile_cpu_type = "ppc/7450",
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.oprofile_type = PPC_OPROFILE_G4,
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@ -209,23 +209,12 @@ EXPORT_SYMBOL(nvram_sync);
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#endif /* CONFIG_NVRAM */
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static DEFINE_PER_CPU(struct cpu, cpu_devices);
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int __init ppc_init(void)
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{
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int cpu;
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/* clear the progress line */
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if (ppc_md.progress)
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ppc_md.progress(" ", 0xffff);
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/* register CPU devices */
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for_each_possible_cpu(cpu) {
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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c->hotpluggable = 1;
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register_cpu(c, cpu);
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}
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/* call platform init */
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if (ppc_md.init != NULL) {
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ppc_md.init();
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@ -15,18 +15,24 @@
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#include <asm/firmware.h>
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#include <asm/hvcall.h>
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#include <asm/prom.h>
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#include <asm/paca.h>
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#include <asm/lppaca.h>
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#include <asm/machdep.h>
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#include <asm/smp.h>
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/lppaca.h>
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#endif
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static DEFINE_PER_CPU(struct cpu, cpu_devices);
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static DEFINE_PER_CPU(struct kobject *, cache_toplevel);
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/* SMT stuff */
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/*
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* SMT snooze delay stuff, 64-bit only for now
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*/
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#ifdef CONFIG_PPC64
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#ifdef CONFIG_PPC_MULTIPLATFORM
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/* Time in microseconds we delay before sleeping in the idle loop */
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DEFINE_PER_CPU(unsigned long, smt_snooze_delay) = { 100 };
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@ -106,7 +112,7 @@ static int __init setup_smt_snooze_delay(char *str)
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}
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__setup("smt-snooze-delay=", setup_smt_snooze_delay);
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#endif /* CONFIG_PPC_MULTIPLATFORM */
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#endif /* CONFIG_PPC64 */
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/*
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* Enabling PMCs will slow partition context switch times so we only do
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@ -115,7 +121,7 @@ __setup("smt-snooze-delay=", setup_smt_snooze_delay);
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static DEFINE_PER_CPU(char, pmcs_enabled);
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void ppc64_enable_pmcs(void)
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void ppc_enable_pmcs(void)
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{
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/* Only need to enable them once */
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if (__get_cpu_var(pmcs_enabled))
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@ -126,7 +132,7 @@ void ppc64_enable_pmcs(void)
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if (ppc_md.enable_pmcs)
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ppc_md.enable_pmcs();
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}
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EXPORT_SYMBOL(ppc64_enable_pmcs);
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EXPORT_SYMBOL(ppc_enable_pmcs);
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/* XXX convert to rusty's on_one_cpu */
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static unsigned long run_on_cpu(unsigned long cpu,
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@ -154,7 +160,7 @@ static unsigned long read_##NAME(unsigned long junk) \
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} \
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static unsigned long write_##NAME(unsigned long val) \
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{ \
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ppc64_enable_pmcs(); \
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ppc_enable_pmcs(); \
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mtspr(ADDRESS, val); \
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return 0; \
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} \
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@ -184,28 +190,53 @@ static ssize_t __used \
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* that are implemented on the current processor
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*/
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#ifdef CONFIG_PPC64
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#define HAS_PPC_PMC_CLASSIC 1
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#define HAS_PPC_PMC_IBM 1
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#define HAS_PPC_PMC_PA6T 1
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#elif CONFIG_6xx
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#define HAS_PPC_PMC_CLASSIC 1
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#define HAS_PPC_PMC_IBM 1
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#define HAS_PPC_PMC_G4 1
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#endif
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#ifdef HAS_PPC_PMC_CLASSIC
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SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
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SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
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SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
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SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
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SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
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SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
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SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
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SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
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SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
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#ifdef HAS_PPC_PMC_G4
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SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
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#endif
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#ifdef CONFIG_PPC64
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SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
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SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
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SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
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SYSFS_PMCSETUP(purr, SPRN_PURR);
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SYSFS_PMCSETUP(spurr, SPRN_SPURR);
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SYSFS_PMCSETUP(dscr, SPRN_DSCR);
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static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
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static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
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static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
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static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
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#endif /* CONFIG_PPC64 */
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#ifdef HAS_PPC_PMC_PA6T
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SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
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SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
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SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
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SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
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SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
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SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
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#ifdef CONFIG_DEBUG_KERNEL
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SYSFS_PMCSETUP(hid0, SPRN_HID0);
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SYSFS_PMCSETUP(hid1, SPRN_HID1);
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@ -236,28 +267,37 @@ SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
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SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
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SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
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#endif /* CONFIG_DEBUG_KERNEL */
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#endif /* HAS_PPC_PMC_PA6T */
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static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
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static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
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static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
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static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
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#ifdef HAS_PPC_PMC_IBM
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static struct sysdev_attribute ibm_common_attrs[] = {
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_SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
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_SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
|
||||
};
|
||||
#endif /* HAS_PPC_PMC_G4 */
|
||||
|
||||
static struct sysdev_attribute ibm_pmc_attrs[] = {
|
||||
#ifdef HAS_PPC_PMC_G4
|
||||
static struct sysdev_attribute g4_common_attrs[] = {
|
||||
_SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
|
||||
_SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
|
||||
_SYSDEV_ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
|
||||
};
|
||||
#endif /* HAS_PPC_PMC_G4 */
|
||||
|
||||
static struct sysdev_attribute classic_pmc_attrs[] = {
|
||||
_SYSDEV_ATTR(pmc1, 0600, show_pmc1, store_pmc1),
|
||||
_SYSDEV_ATTR(pmc2, 0600, show_pmc2, store_pmc2),
|
||||
_SYSDEV_ATTR(pmc3, 0600, show_pmc3, store_pmc3),
|
||||
_SYSDEV_ATTR(pmc4, 0600, show_pmc4, store_pmc4),
|
||||
_SYSDEV_ATTR(pmc5, 0600, show_pmc5, store_pmc5),
|
||||
_SYSDEV_ATTR(pmc6, 0600, show_pmc6, store_pmc6),
|
||||
#ifdef CONFIG_PPC64
|
||||
_SYSDEV_ATTR(pmc7, 0600, show_pmc7, store_pmc7),
|
||||
_SYSDEV_ATTR(pmc8, 0600, show_pmc8, store_pmc8),
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef HAS_PPC_PMC_PA6T
|
||||
static struct sysdev_attribute pa6t_attrs[] = {
|
||||
_SYSDEV_ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
|
||||
_SYSDEV_ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
|
||||
|
@ -298,6 +338,8 @@ static struct sysdev_attribute pa6t_attrs[] = {
|
|||
_SYSDEV_ATTR(tsr3, 0600, show_tsr3, store_tsr3),
|
||||
#endif /* CONFIG_DEBUG_KERNEL */
|
||||
};
|
||||
#endif /* HAS_PPC_PMC_PA6T */
|
||||
#endif /* HAS_PPC_PMC_CLASSIC */
|
||||
|
||||
struct cache_desc {
|
||||
struct kobject kobj;
|
||||
|
@ -588,23 +630,36 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
|
|||
struct sysdev_attribute *attrs, *pmc_attrs;
|
||||
int i, nattrs;
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
|
||||
cpu_has_feature(CPU_FTR_SMT))
|
||||
sysdev_create_file(s, &attr_smt_snooze_delay);
|
||||
#endif
|
||||
|
||||
/* PMC stuff */
|
||||
switch (cur_cpu_spec->pmc_type) {
|
||||
#ifdef HAS_PPC_PMC_IBM
|
||||
case PPC_PMC_IBM:
|
||||
attrs = ibm_common_attrs;
|
||||
nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute);
|
||||
pmc_attrs = ibm_pmc_attrs;
|
||||
pmc_attrs = classic_pmc_attrs;
|
||||
break;
|
||||
#endif /* HAS_PPC_PMC_IBM */
|
||||
#ifdef HAS_PPC_PMC_G4
|
||||
case PPC_PMC_G4:
|
||||
attrs = g4_common_attrs;
|
||||
nattrs = sizeof(g4_common_attrs) / sizeof(struct sysdev_attribute);
|
||||
pmc_attrs = classic_pmc_attrs;
|
||||
break;
|
||||
#endif /* HAS_PPC_PMC_G4 */
|
||||
#ifdef HAS_PPC_PMC_PA6T
|
||||
case PPC_PMC_PA6T:
|
||||
/* PA Semi starts counting at PMC0 */
|
||||
attrs = pa6t_attrs;
|
||||
nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute);
|
||||
pmc_attrs = NULL;
|
||||
break;
|
||||
#endif /* HAS_PPC_PMC_PA6T */
|
||||
default:
|
||||
attrs = NULL;
|
||||
nattrs = 0;
|
||||
|
@ -618,6 +673,7 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
|
|||
for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
|
||||
sysdev_create_file(s, &pmc_attrs[i]);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
if (cpu_has_feature(CPU_FTR_MMCRA))
|
||||
sysdev_create_file(s, &attr_mmcra);
|
||||
|
||||
|
@ -629,6 +685,7 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
|
|||
|
||||
if (cpu_has_feature(CPU_FTR_DSCR))
|
||||
sysdev_create_file(s, &attr_dscr);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
create_cache_info(s);
|
||||
}
|
||||
|
@ -664,17 +721,28 @@ static void unregister_cpu_online(unsigned int cpu)
|
|||
|
||||
/* PMC stuff */
|
||||
switch (cur_cpu_spec->pmc_type) {
|
||||
#ifdef HAS_PPC_PMC_IBM
|
||||
case PPC_PMC_IBM:
|
||||
attrs = ibm_common_attrs;
|
||||
nattrs = sizeof(ibm_common_attrs) / sizeof(struct sysdev_attribute);
|
||||
pmc_attrs = ibm_pmc_attrs;
|
||||
pmc_attrs = classic_pmc_attrs;
|
||||
break;
|
||||
#endif /* HAS_PPC_PMC_IBM */
|
||||
#ifdef HAS_PPC_PMC_G4
|
||||
case PPC_PMC_G4:
|
||||
attrs = g4_common_attrs;
|
||||
nattrs = sizeof(g4_common_attrs) / sizeof(struct sysdev_attribute);
|
||||
pmc_attrs = classic_pmc_attrs;
|
||||
break;
|
||||
#endif /* HAS_PPC_PMC_G4 */
|
||||
#ifdef HAS_PPC_PMC_PA6T
|
||||
case PPC_PMC_PA6T:
|
||||
/* PA Semi starts counting at PMC0 */
|
||||
attrs = pa6t_attrs;
|
||||
nattrs = sizeof(pa6t_attrs) / sizeof(struct sysdev_attribute);
|
||||
pmc_attrs = NULL;
|
||||
break;
|
||||
#endif /* HAS_PPC_PMC_PA6T */
|
||||
default:
|
||||
attrs = NULL;
|
||||
nattrs = 0;
|
||||
|
@ -688,6 +756,7 @@ static void unregister_cpu_online(unsigned int cpu)
|
|||
for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
|
||||
sysdev_remove_file(s, &pmc_attrs[i]);
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
if (cpu_has_feature(CPU_FTR_MMCRA))
|
||||
sysdev_remove_file(s, &attr_mmcra);
|
||||
|
||||
|
@ -699,6 +768,7 @@ static void unregister_cpu_online(unsigned int cpu)
|
|||
|
||||
if (cpu_has_feature(CPU_FTR_DSCR))
|
||||
sysdev_remove_file(s, &attr_dscr);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
remove_cache_info(s);
|
||||
}
|
||||
|
|
|
@ -64,7 +64,7 @@ static int power4_reg_setup(struct op_counter_config *ctr,
|
|||
return 0;
|
||||
}
|
||||
|
||||
extern void ppc64_enable_pmcs(void);
|
||||
extern void ppc_enable_pmcs(void);
|
||||
|
||||
/*
|
||||
* Older CPUs require the MMCRA sample bit to be always set, but newer
|
||||
|
@ -91,7 +91,7 @@ static int power4_cpu_setup(struct op_counter_config *ctr)
|
|||
unsigned int mmcr0 = mmcr0_val;
|
||||
unsigned long mmcra = mmcra_val;
|
||||
|
||||
ppc64_enable_pmcs();
|
||||
ppc_enable_pmcs();
|
||||
|
||||
/* set the freeze bit */
|
||||
mmcr0 |= MMCR0_FC;
|
||||
|
|
Loading…
Reference in New Issue