MIPS: Loongson: Remove set_irq_trigger_mode()
set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -45,7 +45,6 @@ static inline void prom_init_uart_base(void)
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/* irq operation functions */
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extern void bonito_irqdispatch(void);
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extern void __init bonito_irq_init(void);
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extern void __init set_irq_trigger_mode(void);
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extern void __init mach_init_irq(void);
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extern void mach_irq_dispatch(unsigned int pending);
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extern int mach_i8259_irq(void);
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@ -53,9 +53,6 @@ void __init arch_init_irq(void)
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*/
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clear_c0_status(ST0_IM | ST0_BEV);
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/* setting irq trigger mode */
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set_irq_trigger_mode();
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/* no steer */
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LOONGSON_INTSTEER = 0;
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@ -44,13 +44,6 @@ static struct irqaction cascade_irqaction = {
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.name = "cascade",
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};
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void __init set_irq_trigger_mode(void)
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{
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/* most bonito irq should be level triggered */
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LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
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LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
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}
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void __init mach_init_irq(void)
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{
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/* init all controller
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@ -59,6 +52,10 @@ void __init mach_init_irq(void)
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* 32-63 ------> bonito irq
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*/
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/* most bonito irq should be level triggered */
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LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
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LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
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/* Sets the first-level interrupt dispatcher. */
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mips_cpu_irq_init();
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init_i8259_irqs();
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@ -91,13 +91,6 @@ void mach_irq_dispatch(unsigned int pending)
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spurious_interrupt();
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}
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void __init set_irq_trigger_mode(void)
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{
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/* setup cs5536 as high level trigger */
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LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
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LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
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}
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static irqreturn_t ip6_action(int cpl, void *dev_id)
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{
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return IRQ_HANDLED;
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@ -122,6 +115,10 @@ void __init mach_init_irq(void)
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* 32-63 ------> bonito irq
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*/
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/* setup cs5536 as high level trigger */
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LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1;
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LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1);
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/* Sets the first-level interrupt dispatcher. */
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mips_cpu_irq_init();
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init_i8259_irqs();
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