Merge drm/drm-fixes into drm-misc-fixes
We haven't backmerged for a while and this creates some coherency issues across DRM drivers. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Maxime Ripard
commit
b85d00bfef
4
.mailmap
4
.mailmap
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@ -156,6 +156,8 @@ Morten Welinder <welinder@darter.rentec.com>
|
|||
Morten Welinder <welinder@troll.com>
|
||||
Mythri P K <mythripk@ti.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>
|
||||
Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>
|
||||
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
|
||||
Patrick Mochel <mochel@digitalimplant.org>
|
||||
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>
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||||
|
|
@ -224,3 +226,5 @@ Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
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|||
Yusuke Goda <goda.yusuke@renesas.com>
|
||||
Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
||||
Gustavo Padovan <padovan@profusion.mobi>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
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Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
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||||
|
|
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|
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@ -56,12 +56,12 @@ situation from a state where some tasks are stalled but the CPU is
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still doing productive work. As such, time spent in this subset of the
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stall state is tracked separately and exported in the "full" averages.
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|
||||
The ratios are tracked as recent trends over ten, sixty, and three
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||||
hundred second windows, which gives insight into short term events as
|
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well as medium and long term trends. The total absolute stall time is
|
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tracked and exported as well, to allow detection of latency spikes
|
||||
which wouldn't necessarily make a dent in the time averages, or to
|
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average trends over custom time frames.
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The ratios (in %) are tracked as recent trends over ten, sixty, and
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||||
three hundred second windows, which gives insight into short term events
|
||||
as well as medium and long term trends. The total absolute stall time
|
||||
(in us) is tracked and exported as well, to allow detection of latency
|
||||
spikes which wouldn't necessarily make a dent in the time averages,
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or to average trends over custom time frames.
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||||
|
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Cgroup2 interface
|
||||
=================
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||||
|
|
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|||
|
|
@ -148,16 +148,16 @@ The ``btf_type.size * 8`` must be equal to or greater than ``BTF_INT_BITS()``
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for the type. The maximum value of ``BTF_INT_BITS()`` is 128.
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||||
|
||||
The ``BTF_INT_OFFSET()`` specifies the starting bit offset to calculate values
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||||
for this int. For example, a bitfield struct member has: * btf member bit
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offset 100 from the start of the structure, * btf member pointing to an int
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||||
type, * the int type has ``BTF_INT_OFFSET() = 2`` and ``BTF_INT_BITS() = 4``
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||||
for this int. For example, a bitfield struct member has:
|
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* btf member bit offset 100 from the start of the structure,
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* btf member pointing to an int type,
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* the int type has ``BTF_INT_OFFSET() = 2`` and ``BTF_INT_BITS() = 4``
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|
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Then in the struct memory layout, this member will occupy ``4`` bits starting
|
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from bits ``100 + 2 = 102``.
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|
||||
Alternatively, the bitfield struct member can be the following to access the
|
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same bits as the above:
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|
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* btf member bit offset 102,
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* btf member pointing to an int type,
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* the int type has ``BTF_INT_OFFSET() = 0`` and ``BTF_INT_BITS() = 4``
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|
|
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|
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@ -228,7 +228,7 @@ patternProperties:
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- renesas,r9a06g032-smp
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- rockchip,rk3036-smp
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- rockchip,rk3066-smp
|
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- socionext,milbeaut-m10v-smp
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- socionext,milbeaut-m10v-smp
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- ste,dbx500-smp
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|
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cpu-release-addr:
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ Required node properties:
|
|||
|
||||
Optional node properties:
|
||||
|
||||
- ti,mode: Operation mode (see above).
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||||
- ti,mode: Operation mode (u8) (see above).
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||||
|
||||
|
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Example (operation mode 2):
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||||
|
|
@ -34,5 +34,5 @@ Example (operation mode 2):
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|||
adc128d818@1d {
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compatible = "ti,adc128d818";
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reg = <0x1d>;
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ti,mode = <2>;
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ti,mode = /bits/ 8 <2>;
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};
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|
|
|
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|
|
@ -16,6 +16,7 @@ Required properties:
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|||
- "renesas,irqc-r8a7793" (R-Car M2-N)
|
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- "renesas,irqc-r8a7794" (R-Car E2)
|
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- "renesas,intc-ex-r8a774a1" (RZ/G2M)
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- "renesas,intc-ex-r8a774c0" (RZ/G2E)
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- "renesas,intc-ex-r8a7795" (R-Car H3)
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- "renesas,intc-ex-r8a7796" (R-Car M3-W)
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- "renesas,intc-ex-r8a77965" (R-Car M3-N)
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|
|
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|
|
@ -12,10 +12,15 @@ Required properties:
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Subnodes:
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|
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The integrated switch subnode should be specified according to the binding
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described in dsa/dsa.txt. As the QCA8K switches do not have a N:N mapping of
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port and PHY id, each subnode describing a port needs to have a valid phandle
|
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referencing the internal PHY connected to it. The CPU port of this switch is
|
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always port 0.
|
||||
described in dsa/dsa.txt. If the QCA8K switch is connect to a SoC's external
|
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mdio-bus each subnode describing a port needs to have a valid phandle
|
||||
referencing the internal PHY it is connected to. This is because there's no
|
||||
N:N mapping of port and PHY id.
|
||||
|
||||
Don't use mixed external and internal mdio-bus configurations, as this is
|
||||
not supported by the hardware.
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||||
|
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The CPU port of this switch is always port 0.
|
||||
|
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A CPU port node has the following optional node:
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|
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|
|
@ -31,8 +36,9 @@ For QCA8K the 'fixed-link' sub-node supports only the following properties:
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- 'full-duplex' (boolean, optional), to indicate that full duplex is
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used. When absent, half duplex is assumed.
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|
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Example:
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Examples:
|
||||
|
||||
for the external mdio-bus configuration:
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&mdio0 {
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phy_port1: phy@0 {
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|
|
@ -55,12 +61,12 @@ Example:
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reg = <4>;
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};
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switch0@0 {
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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|
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reg = <0>;
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reg = <0x10>;
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|
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ports {
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#address-cells = <1>;
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|
|
@ -108,3 +114,56 @@ Example:
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|||
};
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};
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};
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|
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for the internal master mdio-bus configuration:
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&mdio0 {
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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||||
|
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reg = <0x10>;
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|
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ports {
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||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
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||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "cpu";
|
||||
ethernet = <&gmac1>;
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||||
phy-mode = "rgmii";
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||||
fixed-link {
|
||||
speed = 1000;
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||||
full-duplex;
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||||
};
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||||
};
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||||
|
||||
port@1 {
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||||
reg = <1>;
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||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
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||||
label = "wan";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
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||||
|
|
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|||
|
|
@ -16,6 +16,7 @@ Required properties:
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|||
* "mediatek,mt8127-uart" for MT8127 compatible UARTS
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||||
* "mediatek,mt8135-uart" for MT8135 compatible UARTS
|
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* "mediatek,mt8173-uart" for MT8173 compatible UARTS
|
||||
* "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
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||||
* "mediatek,mt6577-uart" for MT6577 and all of the above
|
||||
|
||||
- reg: The base address of the UART register bank.
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||||
|
|
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|
|
@ -12,11 +12,13 @@ CONTENTS
|
|||
|
||||
(4) Filesystem context security.
|
||||
|
||||
(5) VFS filesystem context operations.
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||||
(5) VFS filesystem context API.
|
||||
|
||||
(6) Parameter description.
|
||||
(6) Superblock creation helpers.
|
||||
|
||||
(7) Parameter helper functions.
|
||||
(7) Parameter description.
|
||||
|
||||
(8) Parameter helper functions.
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||||
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||||
|
||||
========
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||||
|
|
@ -41,12 +43,15 @@ The creation of new mounts is now to be done in a multistep process:
|
|||
|
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(7) Destroy the context.
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||||
|
||||
To support this, the file_system_type struct gains a new field:
|
||||
To support this, the file_system_type struct gains two new fields:
|
||||
|
||||
int (*init_fs_context)(struct fs_context *fc);
|
||||
const struct fs_parameter_description *parameters;
|
||||
|
||||
which is invoked to set up the filesystem-specific parts of a filesystem
|
||||
context, including the additional space.
|
||||
The first is invoked to set up the filesystem-specific parts of a filesystem
|
||||
context, including the additional space, and the second points to the
|
||||
parameter description for validation at registration time and querying by a
|
||||
future system call.
|
||||
|
||||
Note that security initialisation is done *after* the filesystem is called so
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||||
that the namespaces may be adjusted first.
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||||
|
|
@ -73,9 +78,9 @@ context. This is represented by the fs_context structure:
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|||
void *s_fs_info;
|
||||
unsigned int sb_flags;
|
||||
unsigned int sb_flags_mask;
|
||||
unsigned int s_iflags;
|
||||
unsigned int lsm_flags;
|
||||
enum fs_context_purpose purpose:8;
|
||||
bool sloppy:1;
|
||||
bool silent:1;
|
||||
...
|
||||
};
|
||||
|
||||
|
|
@ -141,6 +146,10 @@ The fs_context fields are as follows:
|
|||
|
||||
Which bits SB_* flags are to be set/cleared in super_block::s_flags.
|
||||
|
||||
(*) unsigned int s_iflags
|
||||
|
||||
These will be bitwise-OR'd with s->s_iflags when a superblock is created.
|
||||
|
||||
(*) enum fs_context_purpose
|
||||
|
||||
This indicates the purpose for which the context is intended. The
|
||||
|
|
@ -150,17 +159,6 @@ The fs_context fields are as follows:
|
|||
FS_CONTEXT_FOR_SUBMOUNT -- New automatic submount of extant mount
|
||||
FS_CONTEXT_FOR_RECONFIGURE -- Change an existing mount
|
||||
|
||||
(*) bool sloppy
|
||||
(*) bool silent
|
||||
|
||||
These are set if the sloppy or silent mount options are given.
|
||||
|
||||
[NOTE] sloppy is probably unnecessary when userspace passes over one
|
||||
option at a time since the error can just be ignored if userspace deems it
|
||||
to be unimportant.
|
||||
|
||||
[NOTE] silent is probably redundant with sb_flags & SB_SILENT.
|
||||
|
||||
The mount context is created by calling vfs_new_fs_context() or
|
||||
vfs_dup_fs_context() and is destroyed with put_fs_context(). Note that the
|
||||
structure is not refcounted.
|
||||
|
|
@ -342,28 +340,47 @@ number of operations used by the new mount code for this purpose:
|
|||
It should return 0 on success or a negative error code on failure.
|
||||
|
||||
|
||||
=================================
|
||||
VFS FILESYSTEM CONTEXT OPERATIONS
|
||||
=================================
|
||||
==========================
|
||||
VFS FILESYSTEM CONTEXT API
|
||||
==========================
|
||||
|
||||
There are four operations for creating a filesystem context and
|
||||
one for destroying a context:
|
||||
There are four operations for creating a filesystem context and one for
|
||||
destroying a context:
|
||||
|
||||
(*) struct fs_context *vfs_new_fs_context(struct file_system_type *fs_type,
|
||||
struct dentry *reference,
|
||||
unsigned int sb_flags,
|
||||
unsigned int sb_flags_mask,
|
||||
enum fs_context_purpose purpose);
|
||||
(*) struct fs_context *fs_context_for_mount(
|
||||
struct file_system_type *fs_type,
|
||||
unsigned int sb_flags);
|
||||
|
||||
Create a filesystem context for a given filesystem type and purpose. This
|
||||
allocates the filesystem context, sets the superblock flags, initialises
|
||||
the security and calls fs_type->init_fs_context() to initialise the
|
||||
filesystem private data.
|
||||
Allocate a filesystem context for the purpose of setting up a new mount,
|
||||
whether that be with a new superblock or sharing an existing one. This
|
||||
sets the superblock flags, initialises the security and calls
|
||||
fs_type->init_fs_context() to initialise the filesystem private data.
|
||||
|
||||
reference can be NULL or it may indicate the root dentry of a superblock
|
||||
that is going to be reconfigured (FS_CONTEXT_FOR_RECONFIGURE) or
|
||||
the automount point that triggered a submount (FS_CONTEXT_FOR_SUBMOUNT).
|
||||
This is provided as a source of namespace information.
|
||||
fs_type specifies the filesystem type that will manage the context and
|
||||
sb_flags presets the superblock flags stored therein.
|
||||
|
||||
(*) struct fs_context *fs_context_for_reconfigure(
|
||||
struct dentry *dentry,
|
||||
unsigned int sb_flags,
|
||||
unsigned int sb_flags_mask);
|
||||
|
||||
Allocate a filesystem context for the purpose of reconfiguring an
|
||||
existing superblock. dentry provides a reference to the superblock to be
|
||||
configured. sb_flags and sb_flags_mask indicate which superblock flags
|
||||
need changing and to what.
|
||||
|
||||
(*) struct fs_context *fs_context_for_submount(
|
||||
struct file_system_type *fs_type,
|
||||
struct dentry *reference);
|
||||
|
||||
Allocate a filesystem context for the purpose of creating a new mount for
|
||||
an automount point or other derived superblock. fs_type specifies the
|
||||
filesystem type that will manage the context and the reference dentry
|
||||
supplies the parameters. Namespaces are propagated from the reference
|
||||
dentry's superblock also.
|
||||
|
||||
Note that it's not a requirement that the reference dentry be of the same
|
||||
filesystem type as fs_type.
|
||||
|
||||
(*) struct fs_context *vfs_dup_fs_context(struct fs_context *src_fc);
|
||||
|
||||
|
|
@ -390,20 +407,6 @@ context pointer or a negative error code.
|
|||
For the remaining operations, if an error occurs, a negative error code will be
|
||||
returned.
|
||||
|
||||
(*) int vfs_get_tree(struct fs_context *fc);
|
||||
|
||||
Get or create the mountable root and superblock, using the parameters in
|
||||
the filesystem context to select/configure the superblock. This invokes
|
||||
the ->validate() op and then the ->get_tree() op.
|
||||
|
||||
[NOTE] ->validate() could perhaps be rolled into ->get_tree() and
|
||||
->reconfigure().
|
||||
|
||||
(*) struct vfsmount *vfs_create_mount(struct fs_context *fc);
|
||||
|
||||
Create a mount given the parameters in the specified filesystem context.
|
||||
Note that this does not attach the mount to anything.
|
||||
|
||||
(*) int vfs_parse_fs_param(struct fs_context *fc,
|
||||
struct fs_parameter *param);
|
||||
|
||||
|
|
@ -432,17 +435,80 @@ returned.
|
|||
clear the pointer, but then becomes responsible for disposing of the
|
||||
object.
|
||||
|
||||
(*) int vfs_parse_fs_string(struct fs_context *fc, char *key,
|
||||
(*) int vfs_parse_fs_string(struct fs_context *fc, const char *key,
|
||||
const char *value, size_t v_size);
|
||||
|
||||
A wrapper around vfs_parse_fs_param() that just passes a constant string.
|
||||
A wrapper around vfs_parse_fs_param() that copies the value string it is
|
||||
passed.
|
||||
|
||||
(*) int generic_parse_monolithic(struct fs_context *fc, void *data);
|
||||
|
||||
Parse a sys_mount() data page, assuming the form to be a text list
|
||||
consisting of key[=val] options separated by commas. Each item in the
|
||||
list is passed to vfs_mount_option(). This is the default when the
|
||||
->parse_monolithic() operation is NULL.
|
||||
->parse_monolithic() method is NULL.
|
||||
|
||||
(*) int vfs_get_tree(struct fs_context *fc);
|
||||
|
||||
Get or create the mountable root and superblock, using the parameters in
|
||||
the filesystem context to select/configure the superblock. This invokes
|
||||
the ->get_tree() method.
|
||||
|
||||
(*) struct vfsmount *vfs_create_mount(struct fs_context *fc);
|
||||
|
||||
Create a mount given the parameters in the specified filesystem context.
|
||||
Note that this does not attach the mount to anything.
|
||||
|
||||
|
||||
===========================
|
||||
SUPERBLOCK CREATION HELPERS
|
||||
===========================
|
||||
|
||||
A number of VFS helpers are available for use by filesystems for the creation
|
||||
or looking up of superblocks.
|
||||
|
||||
(*) struct super_block *
|
||||
sget_fc(struct fs_context *fc,
|
||||
int (*test)(struct super_block *sb, struct fs_context *fc),
|
||||
int (*set)(struct super_block *sb, struct fs_context *fc));
|
||||
|
||||
This is the core routine. If test is non-NULL, it searches for an
|
||||
existing superblock matching the criteria held in the fs_context, using
|
||||
the test function to match them. If no match is found, a new superblock
|
||||
is created and the set function is called to set it up.
|
||||
|
||||
Prior to the set function being called, fc->s_fs_info will be transferred
|
||||
to sb->s_fs_info - and fc->s_fs_info will be cleared if set returns
|
||||
success (ie. 0).
|
||||
|
||||
The following helpers all wrap sget_fc():
|
||||
|
||||
(*) int vfs_get_super(struct fs_context *fc,
|
||||
enum vfs_get_super_keying keying,
|
||||
int (*fill_super)(struct super_block *sb,
|
||||
struct fs_context *fc))
|
||||
|
||||
This creates/looks up a deviceless superblock. The keying indicates how
|
||||
many superblocks of this type may exist and in what manner they may be
|
||||
shared:
|
||||
|
||||
(1) vfs_get_single_super
|
||||
|
||||
Only one such superblock may exist in the system. Any further
|
||||
attempt to get a new superblock gets this one (and any parameter
|
||||
differences are ignored).
|
||||
|
||||
(2) vfs_get_keyed_super
|
||||
|
||||
Multiple superblocks of this type may exist and they're keyed on
|
||||
their s_fs_info pointer (for example this may refer to a
|
||||
namespace).
|
||||
|
||||
(3) vfs_get_independent_super
|
||||
|
||||
Multiple independent superblocks of this type may exist. This
|
||||
function never matches an existing one and always creates a new
|
||||
one.
|
||||
|
||||
|
||||
=====================
|
||||
|
|
@ -454,35 +520,22 @@ There's a core description struct that links everything together:
|
|||
|
||||
struct fs_parameter_description {
|
||||
const char name[16];
|
||||
u8 nr_params;
|
||||
u8 nr_alt_keys;
|
||||
u8 nr_enums;
|
||||
bool ignore_unknown;
|
||||
bool no_source;
|
||||
const char *const *keys;
|
||||
const struct constant_table *alt_keys;
|
||||
const struct fs_parameter_spec *specs;
|
||||
const struct fs_parameter_enum *enums;
|
||||
};
|
||||
|
||||
For example:
|
||||
|
||||
enum afs_param {
|
||||
enum {
|
||||
Opt_autocell,
|
||||
Opt_bar,
|
||||
Opt_dyn,
|
||||
Opt_foo,
|
||||
Opt_source,
|
||||
nr__afs_params
|
||||
};
|
||||
|
||||
static const struct fs_parameter_description afs_fs_parameters = {
|
||||
.name = "kAFS",
|
||||
.nr_params = nr__afs_params,
|
||||
.nr_alt_keys = ARRAY_SIZE(afs_param_alt_keys),
|
||||
.nr_enums = ARRAY_SIZE(afs_param_enums),
|
||||
.keys = afs_param_keys,
|
||||
.alt_keys = afs_param_alt_keys,
|
||||
.specs = afs_param_specs,
|
||||
.enums = afs_param_enums,
|
||||
};
|
||||
|
|
@ -494,28 +547,24 @@ The members are as follows:
|
|||
The name to be used in error messages generated by the parse helper
|
||||
functions.
|
||||
|
||||
(2) u8 nr_params;
|
||||
(2) const struct fs_parameter_specification *specs;
|
||||
|
||||
The number of discrete parameter identifiers. This indicates the number
|
||||
of elements in the ->types[] array and also limits the values that may be
|
||||
used in the values that the ->keys[] array maps to.
|
||||
Table of parameter specifications, terminated with a null entry, where the
|
||||
entries are of type:
|
||||
|
||||
It is expected that, for example, two parameters that are related, say
|
||||
"acl" and "noacl" with have the same ID, but will be flagged to indicate
|
||||
that one is the inverse of the other. The value can then be picked out
|
||||
from the parse result.
|
||||
|
||||
(3) const struct fs_parameter_specification *specs;
|
||||
|
||||
Table of parameter specifications, where the entries are of type:
|
||||
|
||||
struct fs_parameter_type {
|
||||
enum fs_parameter_spec type:8;
|
||||
u8 flags;
|
||||
struct fs_parameter_spec {
|
||||
const char *name;
|
||||
u8 opt;
|
||||
enum fs_parameter_type type:8;
|
||||
unsigned short flags;
|
||||
};
|
||||
|
||||
and the parameter identifier is the index to the array. 'type' indicates
|
||||
the desired value type and must be one of:
|
||||
The 'name' field is a string to match exactly to the parameter key (no
|
||||
wildcards, patterns and no case-independence) and 'opt' is the value that
|
||||
will be returned by the fs_parser() function in the case of a successful
|
||||
match.
|
||||
|
||||
The 'type' field indicates the desired value type and must be one of:
|
||||
|
||||
TYPE NAME EXPECTED VALUE RESULT IN
|
||||
======================= ======================= =====================
|
||||
|
|
@ -525,85 +574,65 @@ The members are as follows:
|
|||
fs_param_is_u32_octal 32-bit octal int result->uint_32
|
||||
fs_param_is_u32_hex 32-bit hex int result->uint_32
|
||||
fs_param_is_s32 32-bit signed int result->int_32
|
||||
fs_param_is_u64 64-bit unsigned int result->uint_64
|
||||
fs_param_is_enum Enum value name result->uint_32
|
||||
fs_param_is_string Arbitrary string param->string
|
||||
fs_param_is_blob Binary blob param->blob
|
||||
fs_param_is_blockdev Blockdev path * Needs lookup
|
||||
fs_param_is_path Path * Needs lookup
|
||||
fs_param_is_fd File descriptor param->file
|
||||
|
||||
And each parameter can be qualified with 'flags':
|
||||
|
||||
fs_param_v_optional The value is optional
|
||||
fs_param_neg_with_no If key name is prefixed with "no", it is false
|
||||
fs_param_neg_with_empty If value is "", it is false
|
||||
fs_param_deprecated The parameter is deprecated.
|
||||
|
||||
For example:
|
||||
|
||||
static const struct fs_parameter_spec afs_param_specs[nr__afs_params] = {
|
||||
[Opt_autocell] = { fs_param_is flag },
|
||||
[Opt_bar] = { fs_param_is_enum },
|
||||
[Opt_dyn] = { fs_param_is flag },
|
||||
[Opt_foo] = { fs_param_is_bool, fs_param_neg_with_no },
|
||||
[Opt_source] = { fs_param_is_string },
|
||||
};
|
||||
fs_param_is_fd File descriptor result->int_32
|
||||
|
||||
Note that if the value is of fs_param_is_bool type, fs_parse() will try
|
||||
to match any string value against "0", "1", "no", "yes", "false", "true".
|
||||
|
||||
[!] NOTE that the table must be sorted according to primary key name so
|
||||
that ->keys[] is also sorted.
|
||||
Each parameter can also be qualified with 'flags':
|
||||
|
||||
(4) const char *const *keys;
|
||||
fs_param_v_optional The value is optional
|
||||
fs_param_neg_with_no result->negated set if key is prefixed with "no"
|
||||
fs_param_neg_with_empty result->negated set if value is ""
|
||||
fs_param_deprecated The parameter is deprecated.
|
||||
|
||||
Table of primary key names for the parameters. There must be one entry
|
||||
per defined parameter. The table is optional if ->nr_params is 0. The
|
||||
table is just an array of names e.g.:
|
||||
These are wrapped with a number of convenience wrappers:
|
||||
|
||||
static const char *const afs_param_keys[nr__afs_params] = {
|
||||
[Opt_autocell] = "autocell",
|
||||
[Opt_bar] = "bar",
|
||||
[Opt_dyn] = "dyn",
|
||||
[Opt_foo] = "foo",
|
||||
[Opt_source] = "source",
|
||||
MACRO SPECIFIES
|
||||
======================= ===============================================
|
||||
fsparam_flag() fs_param_is_flag
|
||||
fsparam_flag_no() fs_param_is_flag, fs_param_neg_with_no
|
||||
fsparam_bool() fs_param_is_bool
|
||||
fsparam_u32() fs_param_is_u32
|
||||
fsparam_u32oct() fs_param_is_u32_octal
|
||||
fsparam_u32hex() fs_param_is_u32_hex
|
||||
fsparam_s32() fs_param_is_s32
|
||||
fsparam_u64() fs_param_is_u64
|
||||
fsparam_enum() fs_param_is_enum
|
||||
fsparam_string() fs_param_is_string
|
||||
fsparam_blob() fs_param_is_blob
|
||||
fsparam_bdev() fs_param_is_blockdev
|
||||
fsparam_path() fs_param_is_path
|
||||
fsparam_fd() fs_param_is_fd
|
||||
|
||||
all of which take two arguments, name string and option number - for
|
||||
example:
|
||||
|
||||
static const struct fs_parameter_spec afs_param_specs[] = {
|
||||
fsparam_flag ("autocell", Opt_autocell),
|
||||
fsparam_flag ("dyn", Opt_dyn),
|
||||
fsparam_string ("source", Opt_source),
|
||||
fsparam_flag_no ("foo", Opt_foo),
|
||||
{}
|
||||
};
|
||||
|
||||
[!] NOTE that the table must be sorted such that the table can be searched
|
||||
with bsearch() using strcmp(). This means that the Opt_* values must
|
||||
correspond to the entries in this table.
|
||||
|
||||
(5) const struct constant_table *alt_keys;
|
||||
u8 nr_alt_keys;
|
||||
|
||||
Table of additional key names and their mappings to parameter ID plus the
|
||||
number of elements in the table. This is optional. The table is just an
|
||||
array of { name, integer } pairs, e.g.:
|
||||
|
||||
static const struct constant_table afs_param_keys[] = {
|
||||
{ "baz", Opt_bar },
|
||||
{ "dynamic", Opt_dyn },
|
||||
};
|
||||
|
||||
[!] NOTE that the table must be sorted such that strcmp() can be used with
|
||||
bsearch() to search the entries.
|
||||
|
||||
The parameter ID can also be fs_param_key_removed to indicate that a
|
||||
deprecated parameter has been removed and that an error will be given.
|
||||
This differs from fs_param_deprecated where the parameter may still have
|
||||
an effect.
|
||||
|
||||
Further, the behaviour of the parameter may differ when an alternate name
|
||||
is used (for instance with NFS, "v3", "v4.2", etc. are alternate names).
|
||||
An addition macro, __fsparam() is provided that takes an additional pair
|
||||
of arguments to specify the type and the flags for anything that doesn't
|
||||
match one of the above macros.
|
||||
|
||||
(6) const struct fs_parameter_enum *enums;
|
||||
u8 nr_enums;
|
||||
|
||||
Table of enum value names to integer mappings and the number of elements
|
||||
stored therein. This is of type:
|
||||
Table of enum value names to integer mappings, terminated with a null
|
||||
entry. This is of type:
|
||||
|
||||
struct fs_parameter_enum {
|
||||
u8 param_id;
|
||||
u8 opt;
|
||||
char name[14];
|
||||
u8 value;
|
||||
};
|
||||
|
|
@ -621,11 +650,6 @@ The members are as follows:
|
|||
try to look the value up in the enum table and the result will be stored
|
||||
in the parse result.
|
||||
|
||||
(7) bool no_source;
|
||||
|
||||
If this is set, fs_parse() will ignore any "source" parameter and not
|
||||
pass it to the filesystem.
|
||||
|
||||
The parser should be pointed to by the parser pointer in the file_system_type
|
||||
struct as this will provide validation on registration (if
|
||||
CONFIG_VALIDATE_FS_PARSER=y) and will allow the description to be queried from
|
||||
|
|
@ -650,9 +674,8 @@ process the parameters it is given.
|
|||
int value;
|
||||
};
|
||||
|
||||
and it must be sorted such that it can be searched using bsearch() using
|
||||
strcmp(). If a match is found, the corresponding value is returned. If a
|
||||
match isn't found, the not_found value is returned instead.
|
||||
If a match is found, the corresponding value is returned. If a match
|
||||
isn't found, the not_found value is returned instead.
|
||||
|
||||
(*) bool validate_constant_table(const struct constant_table *tbl,
|
||||
size_t tbl_size,
|
||||
|
|
@ -665,36 +688,36 @@ process the parameters it is given.
|
|||
should just be set to lie inside the low-to-high range.
|
||||
|
||||
If all is good, true is returned. If the table is invalid, errors are
|
||||
logged to dmesg, the stack is dumped and false is returned.
|
||||
logged to dmesg and false is returned.
|
||||
|
||||
(*) bool fs_validate_description(const struct fs_parameter_description *desc);
|
||||
|
||||
This performs some validation checks on a parameter description. It
|
||||
returns true if the description is good and false if it is not. It will
|
||||
log errors to dmesg if validation fails.
|
||||
|
||||
(*) int fs_parse(struct fs_context *fc,
|
||||
const struct fs_param_parser *parser,
|
||||
const struct fs_parameter_description *desc,
|
||||
struct fs_parameter *param,
|
||||
struct fs_param_parse_result *result);
|
||||
struct fs_parse_result *result);
|
||||
|
||||
This is the main interpreter of parameters. It uses the parameter
|
||||
description (parser) to look up the name of the parameter to use and to
|
||||
convert that to a parameter ID (stored in result->key).
|
||||
description to look up a parameter by key name and to convert that to an
|
||||
option number (which it returns).
|
||||
|
||||
If successful, and if the parameter type indicates the result is a
|
||||
boolean, integer or enum type, the value is converted by this function and
|
||||
the result stored in result->{boolean,int_32,uint_32}.
|
||||
the result stored in result->{boolean,int_32,uint_32,uint_64}.
|
||||
|
||||
If a match isn't initially made, the key is prefixed with "no" and no
|
||||
value is present then an attempt will be made to look up the key with the
|
||||
prefix removed. If this matches a parameter for which the type has flag
|
||||
fs_param_neg_with_no set, then a match will be made and the value will be
|
||||
set to false/0/NULL.
|
||||
fs_param_neg_with_no set, then a match will be made and result->negated
|
||||
will be set to true.
|
||||
|
||||
If the parameter is successfully matched and, optionally, parsed
|
||||
correctly, 1 is returned. If the parameter isn't matched and
|
||||
parser->ignore_unknown is set, then 0 is returned. Otherwise -EINVAL is
|
||||
returned.
|
||||
|
||||
(*) bool fs_validate_description(const struct fs_parameter_description *desc);
|
||||
|
||||
This is validates the parameter description. It returns true if the
|
||||
description is good and false if it is not.
|
||||
If the parameter isn't matched, -ENOPARAM will be returned; if the
|
||||
parameter is matched, but the value is erroneous, -EINVAL will be
|
||||
returned; otherwise the parameter's option number will be returned.
|
||||
|
||||
(*) int fs_lookup_param(struct fs_context *fc,
|
||||
struct fs_parameter *value,
|
||||
|
|
|
|||
|
|
@ -36,6 +36,7 @@ Supported adapters:
|
|||
* Intel Cannon Lake (PCH)
|
||||
* Intel Cedar Fork (PCH)
|
||||
* Intel Ice Lake (PCH)
|
||||
* Intel Comet Lake (PCH)
|
||||
Datasheets: Publicly available at the Intel website
|
||||
|
||||
On Intel Patsburg and later chipsets, both the normal host SMBus controller
|
||||
|
|
|
|||
|
|
@ -102,9 +102,11 @@ Byte sequences
|
|||
dictionary which is empty, and that it will always be
|
||||
invalid at this place.
|
||||
|
||||
17 : bitstream version. If the first byte is 17, the next byte
|
||||
gives the bitstream version (version 1 only). If the first byte
|
||||
is not 17, the bitstream version is 0.
|
||||
17 : bitstream version. If the first byte is 17, and compressed
|
||||
stream length is at least 5 bytes (length of shortest possible
|
||||
versioned bitstream), the next byte gives the bitstream version
|
||||
(version 1 only).
|
||||
Otherwise, the bitstream version is 0.
|
||||
|
||||
18..21 : copy 0..3 literals
|
||||
state = (byte - 17) = 0..3 [ copy <state> literals ]
|
||||
|
|
|
|||
|
|
@ -0,0 +1,126 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
==================
|
||||
BPF Flow Dissector
|
||||
==================
|
||||
|
||||
Overview
|
||||
========
|
||||
|
||||
Flow dissector is a routine that parses metadata out of the packets. It's
|
||||
used in the various places in the networking subsystem (RFS, flow hash, etc).
|
||||
|
||||
BPF flow dissector is an attempt to reimplement C-based flow dissector logic
|
||||
in BPF to gain all the benefits of BPF verifier (namely, limits on the
|
||||
number of instructions and tail calls).
|
||||
|
||||
API
|
||||
===
|
||||
|
||||
BPF flow dissector programs operate on an ``__sk_buff``. However, only the
|
||||
limited set of fields is allowed: ``data``, ``data_end`` and ``flow_keys``.
|
||||
``flow_keys`` is ``struct bpf_flow_keys`` and contains flow dissector input
|
||||
and output arguments.
|
||||
|
||||
The inputs are:
|
||||
* ``nhoff`` - initial offset of the networking header
|
||||
* ``thoff`` - initial offset of the transport header, initialized to nhoff
|
||||
* ``n_proto`` - L3 protocol type, parsed out of L2 header
|
||||
|
||||
Flow dissector BPF program should fill out the rest of the ``struct
|
||||
bpf_flow_keys`` fields. Input arguments ``nhoff/thoff/n_proto`` should be
|
||||
also adjusted accordingly.
|
||||
|
||||
The return code of the BPF program is either BPF_OK to indicate successful
|
||||
dissection, or BPF_DROP to indicate parsing error.
|
||||
|
||||
__sk_buff->data
|
||||
===============
|
||||
|
||||
In the VLAN-less case, this is what the initial state of the BPF flow
|
||||
dissector looks like::
|
||||
|
||||
+------+------+------------+-----------+
|
||||
| DMAC | SMAC | ETHER_TYPE | L3_HEADER |
|
||||
+------+------+------------+-----------+
|
||||
^
|
||||
|
|
||||
+-- flow dissector starts here
|
||||
|
||||
|
||||
.. code:: c
|
||||
|
||||
skb->data + flow_keys->nhoff point to the first byte of L3_HEADER
|
||||
flow_keys->thoff = nhoff
|
||||
flow_keys->n_proto = ETHER_TYPE
|
||||
|
||||
In case of VLAN, flow dissector can be called with the two different states.
|
||||
|
||||
Pre-VLAN parsing::
|
||||
|
||||
+------+------+------+-----+-----------+-----------+
|
||||
| DMAC | SMAC | TPID | TCI |ETHER_TYPE | L3_HEADER |
|
||||
+------+------+------+-----+-----------+-----------+
|
||||
^
|
||||
|
|
||||
+-- flow dissector starts here
|
||||
|
||||
.. code:: c
|
||||
|
||||
skb->data + flow_keys->nhoff point the to first byte of TCI
|
||||
flow_keys->thoff = nhoff
|
||||
flow_keys->n_proto = TPID
|
||||
|
||||
Please note that TPID can be 802.1AD and, hence, BPF program would
|
||||
have to parse VLAN information twice for double tagged packets.
|
||||
|
||||
|
||||
Post-VLAN parsing::
|
||||
|
||||
+------+------+------+-----+-----------+-----------+
|
||||
| DMAC | SMAC | TPID | TCI |ETHER_TYPE | L3_HEADER |
|
||||
+------+------+------+-----+-----------+-----------+
|
||||
^
|
||||
|
|
||||
+-- flow dissector starts here
|
||||
|
||||
.. code:: c
|
||||
|
||||
skb->data + flow_keys->nhoff point the to first byte of L3_HEADER
|
||||
flow_keys->thoff = nhoff
|
||||
flow_keys->n_proto = ETHER_TYPE
|
||||
|
||||
In this case VLAN information has been processed before the flow dissector
|
||||
and BPF flow dissector is not required to handle it.
|
||||
|
||||
|
||||
The takeaway here is as follows: BPF flow dissector program can be called with
|
||||
the optional VLAN header and should gracefully handle both cases: when single
|
||||
or double VLAN is present and when it is not present. The same program
|
||||
can be called for both cases and would have to be written carefully to
|
||||
handle both cases.
|
||||
|
||||
|
||||
Reference Implementation
|
||||
========================
|
||||
|
||||
See ``tools/testing/selftests/bpf/progs/bpf_flow.c`` for the reference
|
||||
implementation and ``tools/testing/selftests/bpf/flow_dissector_load.[hc]``
|
||||
for the loader. bpftool can be used to load BPF flow dissector program as well.
|
||||
|
||||
The reference implementation is organized as follows:
|
||||
* ``jmp_table`` map that contains sub-programs for each supported L3 protocol
|
||||
* ``_dissect`` routine - entry point; it does input ``n_proto`` parsing and
|
||||
does ``bpf_tail_call`` to the appropriate L3 handler
|
||||
|
||||
Since BPF at this point doesn't support looping (or any jumping back),
|
||||
jmp_table is used instead to handle multiple levels of encapsulation (and
|
||||
IPv6 options).
|
||||
|
||||
|
||||
Current Limitations
|
||||
===================
|
||||
BPF flow dissector doesn't support exporting all the metadata that in-kernel
|
||||
C-based implementation can export. Notable example is single VLAN (802.1Q)
|
||||
and double VLAN (802.1AD) tags. Please refer to the ``struct bpf_flow_keys``
|
||||
for a set of information that's currently can be exported from the BPF context.
|
||||
|
|
@ -9,6 +9,7 @@ Contents:
|
|||
netdev-FAQ
|
||||
af_xdp
|
||||
batman-adv
|
||||
bpf_flow_dissector
|
||||
can
|
||||
can_ucan_protocol
|
||||
device_drivers/freescale/dpaa2/index
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@ the excellent reporting over at LWN.net or read the original code.
|
|||
|
||||
patchset
|
||||
[PATCH net-next v4 0/9] socket sendmsg MSG_ZEROCOPY
|
||||
http://lkml.kernel.org/r/20170803202945.70750-1-willemdebruijn.kernel@gmail.com
|
||||
https://lkml.kernel.org/netdev/20170803202945.70750-1-willemdebruijn.kernel@gmail.com
|
||||
|
||||
|
||||
Interface
|
||||
|
|
|
|||
|
|
@ -131,6 +131,19 @@ it to the maintainer to figure out what is the most recent and current
|
|||
version that should be applied. If there is any doubt, the maintainer
|
||||
will reply and ask what should be done.
|
||||
|
||||
Q: I made changes to only a few patches in a patch series should I resend only those changed?
|
||||
--------------------------------------------------------------------------------------------
|
||||
A: No, please resend the entire patch series and make sure you do number your
|
||||
patches such that it is clear this is the latest and greatest set of patches
|
||||
that can be applied.
|
||||
|
||||
Q: I submitted multiple versions of a patch series and it looks like a version other than the last one has been accepted, what should I do?
|
||||
-------------------------------------------------------------------------------------------------------------------------------------------
|
||||
A: There is no revert possible, once it is pushed out, it stays like that.
|
||||
Please send incremental versions on top of what has been merged in order to fix
|
||||
the patches the way they would look like if your latest patch series was to be
|
||||
merged.
|
||||
|
||||
Q: How can I tell what patches are queued up for backporting to the various stable releases?
|
||||
--------------------------------------------------------------------------------------------
|
||||
A: Normally Greg Kroah-Hartman collects stable commits himself, but for
|
||||
|
|
|
|||
|
|
@ -44,10 +44,10 @@ including the Netfilter hooks and the flowtable fastpath bypass.
|
|||
/ \ / \ |Routing | / \
|
||||
--> ingress ---> prerouting ---> |decision| | postrouting |--> neigh_xmit
|
||||
\_________/ \__________/ ---------- \____________/ ^
|
||||
| ^ | | ^ |
|
||||
flowtable | | ____\/___ | |
|
||||
| | | / \ | |
|
||||
__\/___ | --------->| forward |------------ |
|
||||
| ^ | ^ |
|
||||
flowtable | ____\/___ | |
|
||||
| | / \ | |
|
||||
__\/___ | | forward |------------ |
|
||||
|-----| | \_________/ |
|
||||
|-----| | 'flow offload' rule |
|
||||
|-----| | adds entry to |
|
||||
|
|
|
|||
|
|
@ -413,7 +413,7 @@ algorithm.
|
|||
.. _F-RTO: https://tools.ietf.org/html/rfc5682
|
||||
|
||||
TCP Fast Path
|
||||
============
|
||||
=============
|
||||
When kernel receives a TCP packet, it has two paths to handler the
|
||||
packet, one is fast path, another is slow path. The comment in kernel
|
||||
code provides a good explanation of them, I pasted them below::
|
||||
|
|
@ -681,6 +681,7 @@ The TCP stack receives an out of order duplicate packet, so it sends a
|
|||
DSACK to the sender.
|
||||
|
||||
* TcpExtTCPDSACKRecv
|
||||
|
||||
The TCP stack receives a DSACK, which indicates an acknowledged
|
||||
duplicate packet is received.
|
||||
|
||||
|
|
@ -690,7 +691,7 @@ The TCP stack receives a DSACK, which indicate an out of order
|
|||
duplicate packet is received.
|
||||
|
||||
invalid SACK and DSACK
|
||||
====================
|
||||
======================
|
||||
When a SACK (or DSACK) block is invalid, a corresponding counter would
|
||||
be updated. The validation method is base on the start/end sequence
|
||||
number of the SACK block. For more details, please refer the comment
|
||||
|
|
@ -704,11 +705,13 @@ explaination:
|
|||
.. _Add counters for discarded SACK blocks: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=18f02545a9a16c9a89778b91a162ad16d510bb32
|
||||
|
||||
* TcpExtTCPSACKDiscard
|
||||
|
||||
This counter indicates how many SACK blocks are invalid. If the invalid
|
||||
SACK block is caused by ACK recording, the TCP stack will only ignore
|
||||
it and won't update this counter.
|
||||
|
||||
* TcpExtTCPDSACKIgnoredOld and TcpExtTCPDSACKIgnoredNoUndo
|
||||
|
||||
When a DSACK block is invalid, one of these two counters would be
|
||||
updated. Which counter will be updated depends on the undo_marker flag
|
||||
of the TCP socket. If the undo_marker is not set, the TCP stack isn't
|
||||
|
|
@ -719,7 +722,7 @@ will be updated. If the undo_marker is set, TcpExtTCPDSACKIgnoredOld
|
|||
will be updated. As implied in its name, it might be an old packet.
|
||||
|
||||
SACK shift
|
||||
=========
|
||||
==========
|
||||
The linux networking stack stores data in sk_buff struct (skb for
|
||||
short). If a SACK block acrosses multiple skb, the TCP stack will try
|
||||
to re-arrange data in these skb. E.g. if a SACK block acknowledges seq
|
||||
|
|
@ -730,12 +733,15 @@ seq 14 to 20. All data in skb2 will be moved to skb1, and skb2 will be
|
|||
discard, this operation is 'merge'.
|
||||
|
||||
* TcpExtTCPSackShifted
|
||||
|
||||
A skb is shifted
|
||||
|
||||
* TcpExtTCPSackMerged
|
||||
|
||||
A skb is merged
|
||||
|
||||
* TcpExtTCPSackShiftFallback
|
||||
|
||||
A skb should be shifted or merged, but the TCP stack doesn't do it for
|
||||
some reasons.
|
||||
|
||||
|
|
|
|||
|
|
@ -5,25 +5,32 @@ The Definitive KVM (Kernel-based Virtual Machine) API Documentation
|
|||
----------------------
|
||||
|
||||
The kvm API is a set of ioctls that are issued to control various aspects
|
||||
of a virtual machine. The ioctls belong to three classes
|
||||
of a virtual machine. The ioctls belong to three classes:
|
||||
|
||||
- System ioctls: These query and set global attributes which affect the
|
||||
whole kvm subsystem. In addition a system ioctl is used to create
|
||||
virtual machines
|
||||
virtual machines.
|
||||
|
||||
- VM ioctls: These query and set attributes that affect an entire virtual
|
||||
machine, for example memory layout. In addition a VM ioctl is used to
|
||||
create virtual cpus (vcpus).
|
||||
create virtual cpus (vcpus) and devices.
|
||||
|
||||
Only run VM ioctls from the same process (address space) that was used
|
||||
to create the VM.
|
||||
VM ioctls must be issued from the same process (address space) that was
|
||||
used to create the VM.
|
||||
|
||||
- vcpu ioctls: These query and set attributes that control the operation
|
||||
of a single virtual cpu.
|
||||
|
||||
Only run vcpu ioctls from the same thread that was used to create the
|
||||
vcpu.
|
||||
vcpu ioctls should be issued from the same thread that was used to create
|
||||
the vcpu, except for asynchronous vcpu ioctl that are marked as such in
|
||||
the documentation. Otherwise, the first ioctl after switching threads
|
||||
could see a performance impact.
|
||||
|
||||
- device ioctls: These query and set attributes that control the operation
|
||||
of a single device.
|
||||
|
||||
device ioctls must be issued from the same process (address space) that
|
||||
was used to create the VM.
|
||||
|
||||
2. File descriptors
|
||||
-------------------
|
||||
|
|
@ -32,17 +39,34 @@ The kvm API is centered around file descriptors. An initial
|
|||
open("/dev/kvm") obtains a handle to the kvm subsystem; this handle
|
||||
can be used to issue system ioctls. A KVM_CREATE_VM ioctl on this
|
||||
handle will create a VM file descriptor which can be used to issue VM
|
||||
ioctls. A KVM_CREATE_VCPU ioctl on a VM fd will create a virtual cpu
|
||||
and return a file descriptor pointing to it. Finally, ioctls on a vcpu
|
||||
fd can be used to control the vcpu, including the important task of
|
||||
actually running guest code.
|
||||
ioctls. A KVM_CREATE_VCPU or KVM_CREATE_DEVICE ioctl on a VM fd will
|
||||
create a virtual cpu or device and return a file descriptor pointing to
|
||||
the new resource. Finally, ioctls on a vcpu or device fd can be used
|
||||
to control the vcpu or device. For vcpus, this includes the important
|
||||
task of actually running guest code.
|
||||
|
||||
In general file descriptors can be migrated among processes by means
|
||||
of fork() and the SCM_RIGHTS facility of unix domain socket. These
|
||||
kinds of tricks are explicitly not supported by kvm. While they will
|
||||
not cause harm to the host, their actual behavior is not guaranteed by
|
||||
the API. The only supported use is one virtual machine per process,
|
||||
and one vcpu per thread.
|
||||
the API. See "General description" for details on the ioctl usage
|
||||
model that is supported by KVM.
|
||||
|
||||
It is important to note that althought VM ioctls may only be issued from
|
||||
the process that created the VM, a VM's lifecycle is associated with its
|
||||
file descriptor, not its creator (process). In other words, the VM and
|
||||
its resources, *including the associated address space*, are not freed
|
||||
until the last reference to the VM's file descriptor has been released.
|
||||
For example, if fork() is issued after ioctl(KVM_CREATE_VM), the VM will
|
||||
not be freed until both the parent (original) process and its child have
|
||||
put their references to the VM's file descriptor.
|
||||
|
||||
Because a VM's resources are not freed until the last reference to its
|
||||
file descriptor is released, creating additional references to a VM via
|
||||
via fork(), dup(), etc... without careful consideration is strongly
|
||||
discouraged and may have unwanted side effects, e.g. memory allocated
|
||||
by and on behalf of the VM's process may not be freed/unaccounted when
|
||||
the VM is shut down.
|
||||
|
||||
|
||||
It is important to note that althought VM ioctls may only be issued from
|
||||
|
|
@ -515,11 +539,15 @@ c) KVM_INTERRUPT_SET_LEVEL
|
|||
Note that any value for 'irq' other than the ones stated above is invalid
|
||||
and incurs unexpected behavior.
|
||||
|
||||
This is an asynchronous vcpu ioctl and can be invoked from any thread.
|
||||
|
||||
MIPS:
|
||||
|
||||
Queues an external interrupt to be injected into the virtual CPU. A negative
|
||||
interrupt number dequeues the interrupt.
|
||||
|
||||
This is an asynchronous vcpu ioctl and can be invoked from any thread.
|
||||
|
||||
|
||||
4.17 KVM_DEBUG_GUEST
|
||||
|
||||
|
|
@ -1086,14 +1114,12 @@ struct kvm_userspace_memory_region {
|
|||
#define KVM_MEM_LOG_DIRTY_PAGES (1UL << 0)
|
||||
#define KVM_MEM_READONLY (1UL << 1)
|
||||
|
||||
This ioctl allows the user to create or modify a guest physical memory
|
||||
slot. When changing an existing slot, it may be moved in the guest
|
||||
physical memory space, or its flags may be modified. It may not be
|
||||
resized. Slots may not overlap in guest physical address space.
|
||||
Bits 0-15 of "slot" specifies the slot id and this value should be
|
||||
less than the maximum number of user memory slots supported per VM.
|
||||
The maximum allowed slots can be queried using KVM_CAP_NR_MEMSLOTS,
|
||||
if this capability is supported by the architecture.
|
||||
This ioctl allows the user to create, modify or delete a guest physical
|
||||
memory slot. Bits 0-15 of "slot" specify the slot id and this value
|
||||
should be less than the maximum number of user memory slots supported per
|
||||
VM. The maximum allowed slots can be queried using KVM_CAP_NR_MEMSLOTS,
|
||||
if this capability is supported by the architecture. Slots may not
|
||||
overlap in guest physical address space.
|
||||
|
||||
If KVM_CAP_MULTI_ADDRESS_SPACE is available, bits 16-31 of "slot"
|
||||
specifies the address space which is being modified. They must be
|
||||
|
|
@ -1102,6 +1128,10 @@ KVM_CAP_MULTI_ADDRESS_SPACE capability. Slots in separate address spaces
|
|||
are unrelated; the restriction on overlapping slots only applies within
|
||||
each address space.
|
||||
|
||||
Deleting a slot is done by passing zero for memory_size. When changing
|
||||
an existing slot, it may be moved in the guest physical memory space,
|
||||
or its flags may be modified, but it may not be resized.
|
||||
|
||||
Memory for the region is taken starting at the address denoted by the
|
||||
field userspace_addr, which must point at user addressable memory for
|
||||
the entire memory slot size. Any object may back this memory, including
|
||||
|
|
@ -2493,7 +2523,7 @@ KVM_S390_MCHK (vm, vcpu) - machine check interrupt; cr 14 bits in parm,
|
|||
machine checks needing further payload are not
|
||||
supported by this ioctl)
|
||||
|
||||
Note that the vcpu ioctl is asynchronous to vcpu execution.
|
||||
This is an asynchronous vcpu ioctl and can be invoked from any thread.
|
||||
|
||||
4.78 KVM_PPC_GET_HTAB_FD
|
||||
|
||||
|
|
@ -3042,8 +3072,7 @@ KVM_S390_INT_EMERGENCY - sigp emergency; parameters in .emerg
|
|||
KVM_S390_INT_EXTERNAL_CALL - sigp external call; parameters in .extcall
|
||||
KVM_S390_MCHK - machine check interrupt; parameters in .mchk
|
||||
|
||||
|
||||
Note that the vcpu ioctl is asynchronous to vcpu execution.
|
||||
This is an asynchronous vcpu ioctl and can be invoked from any thread.
|
||||
|
||||
4.94 KVM_S390_GET_IRQ_STATE
|
||||
|
||||
|
|
|
|||
|
|
@ -142,7 +142,7 @@ Shadow pages contain the following information:
|
|||
If clear, this page corresponds to a guest page table denoted by the gfn
|
||||
field.
|
||||
role.quadrant:
|
||||
When role.cr4_pae=0, the guest uses 32-bit gptes while the host uses 64-bit
|
||||
When role.gpte_is_8_bytes=0, the guest uses 32-bit gptes while the host uses 64-bit
|
||||
sptes. That means a guest page table contains more ptes than the host,
|
||||
so multiple shadow pages are needed to shadow one guest page.
|
||||
For first-level shadow pages, role.quadrant can be 0 or 1 and denotes the
|
||||
|
|
@ -158,9 +158,9 @@ Shadow pages contain the following information:
|
|||
The page is invalid and should not be used. It is a root page that is
|
||||
currently pinned (by a cpu hardware register pointing to it); once it is
|
||||
unpinned it will be destroyed.
|
||||
role.cr4_pae:
|
||||
Contains the value of cr4.pae for which the page is valid (e.g. whether
|
||||
32-bit or 64-bit gptes are in use).
|
||||
role.gpte_is_8_bytes:
|
||||
Reflects the size of the guest PTE for which the page is valid, i.e. '1'
|
||||
if 64-bit gptes are in use, '0' if 32-bit gptes are in use.
|
||||
role.nxe:
|
||||
Contains the value of efer.nxe for which the page is valid.
|
||||
role.cr0_wp:
|
||||
|
|
@ -173,6 +173,9 @@ Shadow pages contain the following information:
|
|||
Contains the value of cr4.smap && !cr0.wp for which the page is valid
|
||||
(pages for which this is true are different from other pages; see the
|
||||
treatment of cr0.wp=0 below).
|
||||
role.ept_sp:
|
||||
This is a virtual flag to denote a shadowed nested EPT page. ept_sp
|
||||
is true if "cr0_wp && smap_andnot_wp", an otherwise invalid combination.
|
||||
role.smm:
|
||||
Is 1 if the page is valid in system management mode. This field
|
||||
determines which of the kvm_memslots array was used to build this
|
||||
|
|
|
|||
24
MAINTAINERS
24
MAINTAINERS
|
|
@ -1893,14 +1893,15 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
|
|||
ARM/NUVOTON NPCM ARCHITECTURE
|
||||
M: Avi Fishman <avifishman70@gmail.com>
|
||||
M: Tomer Maimon <tmaimon77@gmail.com>
|
||||
M: Tali Perry <tali.perry1@gmail.com>
|
||||
R: Patrick Venture <venture@google.com>
|
||||
R: Nancy Yuen <yuenn@google.com>
|
||||
R: Brendan Higgins <brendanhiggins@google.com>
|
||||
R: Benjamin Fair <benjaminfair@google.com>
|
||||
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: arch/arm/mach-npcm/
|
||||
F: arch/arm/boot/dts/nuvoton-npcm*
|
||||
F: include/dt-bindings/clock/nuvoton,npcm7xx-clks.h
|
||||
F: include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
|
||||
F: drivers/*/*npcm*
|
||||
F: Documentation/devicetree/bindings/*/*npcm*
|
||||
F: Documentation/devicetree/bindings/*/*/*npcm*
|
||||
|
|
@ -2356,7 +2357,7 @@ F: arch/arm/mm/cache-uniphier.c
|
|||
F: arch/arm64/boot/dts/socionext/uniphier*
|
||||
F: drivers/bus/uniphier-system-bus.c
|
||||
F: drivers/clk/uniphier/
|
||||
F: drivers/dmaengine/uniphier-mdmac.c
|
||||
F: drivers/dma/uniphier-mdmac.c
|
||||
F: drivers/gpio/gpio-uniphier.c
|
||||
F: drivers/i2c/busses/i2c-uniphier*
|
||||
F: drivers/irqchip/irq-uniphier-aidet.c
|
||||
|
|
@ -4129,7 +4130,7 @@ F: drivers/cpuidle/*
|
|||
F: include/linux/cpuidle.h
|
||||
|
||||
CRAMFS FILESYSTEM
|
||||
M: Nicolas Pitre <nico@linaro.org>
|
||||
M: Nicolas Pitre <nico@fluxnic.net>
|
||||
S: Maintained
|
||||
F: Documentation/filesystems/cramfs.txt
|
||||
F: fs/cramfs/
|
||||
|
|
@ -5833,7 +5834,7 @@ L: netdev@vger.kernel.org
|
|||
S: Maintained
|
||||
F: Documentation/ABI/testing/sysfs-bus-mdio
|
||||
F: Documentation/devicetree/bindings/net/mdio*
|
||||
F: Documentation/networking/phy.txt
|
||||
F: Documentation/networking/phy.rst
|
||||
F: drivers/net/phy/
|
||||
F: drivers/of/of_mdio.c
|
||||
F: drivers/of/of_net.c
|
||||
|
|
@ -6408,7 +6409,6 @@ L: linux-kernel@vger.kernel.org
|
|||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git locking/core
|
||||
S: Maintained
|
||||
F: kernel/futex.c
|
||||
F: kernel/futex_compat.c
|
||||
F: include/asm-generic/futex.h
|
||||
F: include/linux/futex.h
|
||||
F: include/uapi/linux/futex.h
|
||||
|
|
@ -8096,6 +8096,16 @@ F: include/linux/iommu.h
|
|||
F: include/linux/of_iommu.h
|
||||
F: include/linux/iova.h
|
||||
|
||||
IO_URING
|
||||
M: Jens Axboe <axboe@kernel.dk>
|
||||
L: linux-block@vger.kernel.org
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
T: git git://git.kernel.dk/linux-block
|
||||
T: git git://git.kernel.dk/liburing
|
||||
S: Maintained
|
||||
F: fs/io_uring.c
|
||||
F: include/uapi/linux/io_uring.h
|
||||
|
||||
IP MASQUERADING
|
||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||
S: Maintained
|
||||
|
|
@ -13972,7 +13982,7 @@ F: drivers/media/rc/serial_ir.c
|
|||
SFC NETWORK DRIVER
|
||||
M: Solarflare linux maintainers <linux-net-drivers@solarflare.com>
|
||||
M: Edward Cree <ecree@solarflare.com>
|
||||
M: Bert Kenward <bkenward@solarflare.com>
|
||||
M: Martin Habets <mhabets@solarflare.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/sfc/
|
||||
|
|
|
|||
49
Makefile
49
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 1
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Shy Crocodile
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
@ -31,26 +31,12 @@ _all:
|
|||
# descending is started. They are now explicitly listed as the
|
||||
# prepare rule.
|
||||
|
||||
# Ugly workaround for Debian make-kpkg:
|
||||
# make-kpkg directly includes the top Makefile of Linux kernel. In such a case,
|
||||
# skip sub-make to support debian_* targets in ruleset/kernel_version.mk, but
|
||||
# displays warning to discourage such abusage.
|
||||
ifneq ($(word 2, $(MAKEFILE_LIST)),)
|
||||
$(warning Do not include top Makefile of Linux Kernel)
|
||||
sub-make-done := 1
|
||||
MAKEFLAGS += -rR
|
||||
endif
|
||||
|
||||
ifneq ($(sub-make-done),1)
|
||||
ifneq ($(sub_make_done),1)
|
||||
|
||||
# Do not use make's built-in rules and variables
|
||||
# (this increases performance and avoids hard-to-debug behaviour)
|
||||
MAKEFLAGS += -rR
|
||||
|
||||
# 'MAKEFLAGS += -rR' does not become immediately effective for old
|
||||
# GNU Make versions. Cancel implicit rules for this Makefile.
|
||||
$(lastword $(MAKEFILE_LIST)): ;
|
||||
|
||||
# Avoid funny character set dependencies
|
||||
unexport LC_ALL
|
||||
LC_COLLATE=C
|
||||
|
|
@ -153,6 +139,7 @@ $(if $(KBUILD_OUTPUT),, \
|
|||
# 'sub-make' below.
|
||||
MAKEFLAGS += --include-dir=$(CURDIR)
|
||||
|
||||
need-sub-make := 1
|
||||
else
|
||||
|
||||
# Do not print "Entering directory ..." at all for in-tree build.
|
||||
|
|
@ -160,6 +147,18 @@ MAKEFLAGS += --no-print-directory
|
|||
|
||||
endif # ifneq ($(KBUILD_OUTPUT),)
|
||||
|
||||
ifneq ($(filter 3.%,$(MAKE_VERSION)),)
|
||||
# 'MAKEFLAGS += -rR' does not immediately become effective for GNU Make 3.x
|
||||
# We need to invoke sub-make to avoid implicit rules in the top Makefile.
|
||||
need-sub-make := 1
|
||||
# Cancel implicit rules for this Makefile.
|
||||
$(lastword $(MAKEFILE_LIST)): ;
|
||||
endif
|
||||
|
||||
export sub_make_done := 1
|
||||
|
||||
ifeq ($(need-sub-make),1)
|
||||
|
||||
PHONY += $(MAKECMDGOALS) sub-make
|
||||
|
||||
$(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
|
||||
|
|
@ -167,12 +166,15 @@ $(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make
|
|||
|
||||
# Invoke a second make in the output directory, passing relevant variables
|
||||
sub-make:
|
||||
$(Q)$(MAKE) sub-make-done=1 \
|
||||
$(Q)$(MAKE) \
|
||||
$(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
|
||||
-f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
|
||||
|
||||
else # sub-make-done
|
||||
endif # need-sub-make
|
||||
endif # sub_make_done
|
||||
|
||||
# We process the rest of the Makefile if this is the final invocation of make
|
||||
ifeq ($(need-sub-make),)
|
||||
|
||||
# Do not print "Entering directory ...",
|
||||
# but we want to display it when entering to the output directory
|
||||
|
|
@ -497,7 +499,8 @@ outputmakefile:
|
|||
ifneq ($(KBUILD_SRC),)
|
||||
$(Q)ln -fsn $(srctree) source
|
||||
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile $(srctree)
|
||||
$(Q){ echo "# this is build directory, ignore it"; echo "*"; } > .gitignore
|
||||
$(Q)test -e .gitignore || \
|
||||
{ echo "# this is build directory, ignore it"; echo "*"; } > .gitignore
|
||||
endif
|
||||
|
||||
ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),)
|
||||
|
|
@ -677,7 +680,7 @@ KBUILD_CFLAGS += $(call cc-disable-warning, format-overflow)
|
|||
KBUILD_CFLAGS += $(call cc-disable-warning, int-in-bool-context)
|
||||
|
||||
ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
|
||||
KBUILD_CFLAGS += $(call cc-option,-Oz,-Os)
|
||||
KBUILD_CFLAGS += -Os
|
||||
else
|
||||
KBUILD_CFLAGS += -O2
|
||||
endif
|
||||
|
|
@ -950,9 +953,11 @@ mod_sign_cmd = true
|
|||
endif
|
||||
export mod_sign_cmd
|
||||
|
||||
HOST_LIBELF_LIBS = $(shell pkg-config libelf --libs 2>/dev/null || echo -lelf)
|
||||
|
||||
ifdef CONFIG_STACK_VALIDATION
|
||||
has_libelf := $(call try-run,\
|
||||
echo "int main() {}" | $(HOSTCC) -xc -o /dev/null -lelf -,1,0)
|
||||
echo "int main() {}" | $(HOSTCC) -xc -o /dev/null $(HOST_LIBELF_LIBS) -,1,0)
|
||||
ifeq ($(has_libelf),1)
|
||||
objtool_target := tools/objtool FORCE
|
||||
else
|
||||
|
|
@ -1757,7 +1762,7 @@ existing-targets := $(wildcard $(sort $(targets)))
|
|||
|
||||
endif # ifeq ($(config-targets),1)
|
||||
endif # ifeq ($(mixed-targets),1)
|
||||
endif # sub-make-done
|
||||
endif # need-sub-make
|
||||
|
||||
PHONY += FORCE
|
||||
FORCE:
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@ generic-y += exec.h
|
|||
generic-y += export.h
|
||||
generic-y += fb.h
|
||||
generic-y += irq_work.h
|
||||
generic-y += kvm_para.h
|
||||
generic-y += mcs_spinlock.h
|
||||
generic-y += mm-arch-hooks.h
|
||||
generic-y += preempt.h
|
||||
|
|
|
|||
|
|
@ -1,2 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
||||
#include <asm-generic/kvm_para.h>
|
||||
|
|
@ -144,11 +144,11 @@ config ARC_CPU_770
|
|||
Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
|
||||
This core has a bunch of cool new features:
|
||||
-MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
|
||||
Shared Address Spaces (for sharing TLB entries in MMU)
|
||||
Shared Address Spaces (for sharing TLB entries in MMU)
|
||||
-Caches: New Prog Model, Region Flush
|
||||
-Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
|
||||
|
||||
endif #ISA_ARCOMPACT
|
||||
endif #ISA_ARCOMPACT
|
||||
|
||||
config ARC_CPU_HS
|
||||
bool "ARC-HS"
|
||||
|
|
@ -198,7 +198,7 @@ config ARC_SMP_HALT_ON_RESET
|
|||
at designated entry point. For other case, all jump to common
|
||||
entry point and spin wait for Master's signal.
|
||||
|
||||
endif #SMP
|
||||
endif #SMP
|
||||
|
||||
config ARC_MCIP
|
||||
bool "ARConnect Multicore IP (MCIP) Support "
|
||||
|
|
@ -249,7 +249,7 @@ config ARC_CACHE_VIPT_ALIASING
|
|||
bool "Support VIPT Aliasing D$"
|
||||
depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
|
||||
|
||||
endif #ARC_CACHE
|
||||
endif #ARC_CACHE
|
||||
|
||||
config ARC_HAS_ICCM
|
||||
bool "Use ICCM"
|
||||
|
|
@ -370,7 +370,7 @@ config ARC_FPU_SAVE_RESTORE
|
|||
based on actual usage of FPU by a task. Thus our implemn does
|
||||
this for all tasks in system.
|
||||
|
||||
endif #ISA_ARCOMPACT
|
||||
endif #ISA_ARCOMPACT
|
||||
|
||||
config ARC_CANT_LLSC
|
||||
def_bool n
|
||||
|
|
@ -386,6 +386,15 @@ config ARC_HAS_SWAPE
|
|||
|
||||
if ISA_ARCV2
|
||||
|
||||
config ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
bool "Enable unaligned access in HW"
|
||||
default y
|
||||
select HAVE_EFFICIENT_UNALIGNED_ACCESS
|
||||
help
|
||||
The ARC HS architecture supports unaligned memory access
|
||||
which is disabled by default. Enable unaligned access in
|
||||
hardware and use software to use it
|
||||
|
||||
config ARC_HAS_LL64
|
||||
bool "Insn: 64bit LDD/STD"
|
||||
help
|
||||
|
|
@ -414,7 +423,7 @@ config ARC_IRQ_NO_AUTOSAVE
|
|||
This is programmable and can be optionally disabled in which case
|
||||
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
|
||||
|
||||
endif # ISA_ARCV2
|
||||
endif # ISA_ARCV2
|
||||
|
||||
endmenu # "ARC CPU Configuration"
|
||||
|
||||
|
|
|
|||
|
|
@ -28,6 +28,12 @@ cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
|
|||
|
||||
ifdef CONFIG_ISA_ARCV2
|
||||
|
||||
ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
cflags-y += -munaligned-access
|
||||
else
|
||||
cflags-y += -mno-unaligned-access
|
||||
endif
|
||||
|
||||
ifndef CONFIG_ARC_HAS_LL64
|
||||
cflags-y += -mno-ll64
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
clock-div = <6>;
|
||||
};
|
||||
|
||||
iomux: iomux@FF10601c {
|
||||
iomux: iomux@ff10601c {
|
||||
/* Port 1 */
|
||||
pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
|
||||
abilis,function = "mis0";
|
||||
|
|
@ -162,182 +162,182 @@
|
|||
};
|
||||
};
|
||||
|
||||
gpioa: gpio@FF140000 {
|
||||
gpioa: gpio@ff140000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF140000 0x1000>;
|
||||
reg = <0xff140000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioa";
|
||||
};
|
||||
gpiob: gpio@FF141000 {
|
||||
gpiob: gpio@ff141000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF141000 0x1000>;
|
||||
reg = <0xff141000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiob";
|
||||
};
|
||||
gpioc: gpio@FF142000 {
|
||||
gpioc: gpio@ff142000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF142000 0x1000>;
|
||||
reg = <0xff142000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioc";
|
||||
};
|
||||
gpiod: gpio@FF143000 {
|
||||
gpiod: gpio@ff143000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF143000 0x1000>;
|
||||
reg = <0xff143000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiod";
|
||||
};
|
||||
gpioe: gpio@FF144000 {
|
||||
gpioe: gpio@ff144000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF144000 0x1000>;
|
||||
reg = <0xff144000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioe";
|
||||
};
|
||||
gpiof: gpio@FF145000 {
|
||||
gpiof: gpio@ff145000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF145000 0x1000>;
|
||||
reg = <0xff145000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiof";
|
||||
};
|
||||
gpiog: gpio@FF146000 {
|
||||
gpiog: gpio@ff146000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF146000 0x1000>;
|
||||
reg = <0xff146000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiog";
|
||||
};
|
||||
gpioh: gpio@FF147000 {
|
||||
gpioh: gpio@ff147000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF147000 0x1000>;
|
||||
reg = <0xff147000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioh";
|
||||
};
|
||||
gpioi: gpio@FF148000 {
|
||||
gpioi: gpio@ff148000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF148000 0x1000>;
|
||||
reg = <0xff148000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <12>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioi";
|
||||
};
|
||||
gpioj: gpio@FF149000 {
|
||||
gpioj: gpio@ff149000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF149000 0x1000>;
|
||||
reg = <0xff149000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <32>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioj";
|
||||
};
|
||||
gpiok: gpio@FF14a000 {
|
||||
gpiok: gpio@ff14a000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14A000 0x1000>;
|
||||
reg = <0xff14a000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <22>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiok";
|
||||
};
|
||||
gpiol: gpio@FF14b000 {
|
||||
gpiol: gpio@ff14b000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14B000 0x1000>;
|
||||
reg = <0xff14b000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiol";
|
||||
};
|
||||
gpiom: gpio@FF14c000 {
|
||||
gpiom: gpio@ff14c000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14C000 0x1000>;
|
||||
reg = <0xff14c000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiom";
|
||||
};
|
||||
gpion: gpio@FF14d000 {
|
||||
gpion: gpio@ff14d000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14D000 0x1000>;
|
||||
reg = <0xff14d000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <5>;
|
||||
|
|
|
|||
|
|
@ -37,27 +37,27 @@
|
|||
};
|
||||
|
||||
soc100 {
|
||||
uart@FF100000 {
|
||||
uart@ff100000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pctl_uart0>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
ethernet@fe100000 {
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
i2c0: i2c@FF120000 {
|
||||
i2c0: i2c@ff120000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c1: i2c@FF121000 {
|
||||
i2c1: i2c@ff121000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c2: i2c@FF122000 {
|
||||
i2c2: i2c@ff122000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c3: i2c@FF123000 {
|
||||
i2c3: i2c@ff123000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c4: i2c@FF124000 {
|
||||
i2c4: i2c@ff124000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
clock-div = <6>;
|
||||
};
|
||||
|
||||
iomux: iomux@FF10601c {
|
||||
iomux: iomux@ff10601c {
|
||||
/* Port 1 */
|
||||
pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
|
||||
abilis,function = "mis0";
|
||||
|
|
@ -171,182 +171,182 @@
|
|||
};
|
||||
};
|
||||
|
||||
gpioa: gpio@FF140000 {
|
||||
gpioa: gpio@ff140000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF140000 0x1000>;
|
||||
reg = <0xff140000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioa";
|
||||
};
|
||||
gpiob: gpio@FF141000 {
|
||||
gpiob: gpio@ff141000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF141000 0x1000>;
|
||||
reg = <0xff141000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiob";
|
||||
};
|
||||
gpioc: gpio@FF142000 {
|
||||
gpioc: gpio@ff142000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF142000 0x1000>;
|
||||
reg = <0xff142000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioc";
|
||||
};
|
||||
gpiod: gpio@FF143000 {
|
||||
gpiod: gpio@ff143000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF143000 0x1000>;
|
||||
reg = <0xff143000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiod";
|
||||
};
|
||||
gpioe: gpio@FF144000 {
|
||||
gpioe: gpio@ff144000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF144000 0x1000>;
|
||||
reg = <0xff144000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioe";
|
||||
};
|
||||
gpiof: gpio@FF145000 {
|
||||
gpiof: gpio@ff145000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF145000 0x1000>;
|
||||
reg = <0xff145000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiof";
|
||||
};
|
||||
gpiog: gpio@FF146000 {
|
||||
gpiog: gpio@ff146000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF146000 0x1000>;
|
||||
reg = <0xff146000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <3>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiog";
|
||||
};
|
||||
gpioh: gpio@FF147000 {
|
||||
gpioh: gpio@ff147000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF147000 0x1000>;
|
||||
reg = <0xff147000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <2>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioh";
|
||||
};
|
||||
gpioi: gpio@FF148000 {
|
||||
gpioi: gpio@ff148000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF148000 0x1000>;
|
||||
reg = <0xff148000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <12>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioi";
|
||||
};
|
||||
gpioj: gpio@FF149000 {
|
||||
gpioj: gpio@ff149000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF149000 0x1000>;
|
||||
reg = <0xff149000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <32>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpioj";
|
||||
};
|
||||
gpiok: gpio@FF14a000 {
|
||||
gpiok: gpio@ff14a000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14A000 0x1000>;
|
||||
reg = <0xff14a000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <22>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiok";
|
||||
};
|
||||
gpiol: gpio@FF14b000 {
|
||||
gpiol: gpio@ff14b000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14B000 0x1000>;
|
||||
reg = <0xff14b000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiol";
|
||||
};
|
||||
gpiom: gpio@FF14c000 {
|
||||
gpiom: gpio@ff14c000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14C000 0x1000>;
|
||||
reg = <0xff14c000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <4>;
|
||||
gpio-ranges = <&iomux 0 0 0>;
|
||||
gpio-ranges-group-names = "gpiom";
|
||||
};
|
||||
gpion: gpio@FF14d000 {
|
||||
gpion: gpio@ff14d000 {
|
||||
compatible = "abilis,tb10x-gpio";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <27 2>;
|
||||
reg = <0xFF14D000 0x1000>;
|
||||
reg = <0xff14d000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
abilis,ngpio = <5>;
|
||||
|
|
|
|||
|
|
@ -37,27 +37,27 @@
|
|||
};
|
||||
|
||||
soc100 {
|
||||
uart@FF100000 {
|
||||
uart@ff100000 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pctl_uart0>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
ethernet@fe100000 {
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
i2c0: i2c@FF120000 {
|
||||
i2c0: i2c@ff120000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c1: i2c@FF121000 {
|
||||
i2c1: i2c@ff121000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c2: i2c@FF122000 {
|
||||
i2c2: i2c@ff122000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c3: i2c@FF123000 {
|
||||
i2c3: i2c@ff123000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
i2c4: i2c@FF124000 {
|
||||
i2c4: i2c@ff124000 {
|
||||
i2c-sda-hold-time-ns = <432>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@
|
|||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
ranges = <0xfe000000 0xfe000000 0x02000000
|
||||
0x000F0000 0x000F0000 0x00010000>;
|
||||
0x000f0000 0x000f0000 0x00010000>;
|
||||
compatible = "abilis,tb10x", "simple-bus";
|
||||
|
||||
pll0: oscillator {
|
||||
|
|
@ -75,10 +75,10 @@
|
|||
clock-output-names = "ahb_clk";
|
||||
};
|
||||
|
||||
iomux: iomux@FF10601c {
|
||||
iomux: iomux@ff10601c {
|
||||
compatible = "abilis,tb10x-iomux";
|
||||
#gpio-range-cells = <3>;
|
||||
reg = <0xFF10601c 0x4>;
|
||||
reg = <0xff10601c 0x4>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller {
|
||||
|
|
@ -88,7 +88,7 @@
|
|||
};
|
||||
tb10x_ictl: pic@fe002000 {
|
||||
compatible = "abilis,tb10x-ictl";
|
||||
reg = <0xFE002000 0x20>;
|
||||
reg = <0xfe002000 0x20>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
|
@ -96,27 +96,27 @@
|
|||
20 21 22 23 24 25 26 27 28 29 30 31>;
|
||||
};
|
||||
|
||||
uart@FF100000 {
|
||||
uart@ff100000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xFF100000 0x100>;
|
||||
reg = <0xff100000 0x100>;
|
||||
clock-frequency = <166666666>;
|
||||
interrupts = <25 8>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
};
|
||||
ethernet@FE100000 {
|
||||
ethernet@fe100000 {
|
||||
compatible = "snps,dwmac-3.70a","snps,dwmac";
|
||||
reg = <0xFE100000 0x1058>;
|
||||
reg = <0xfe100000 0x1058>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <6 8>;
|
||||
interrupt-names = "macirq";
|
||||
clocks = <&ahb_clk>;
|
||||
clock-names = "stmmaceth";
|
||||
};
|
||||
dma@FE000000 {
|
||||
dma@fe000000 {
|
||||
compatible = "snps,dma-spear1340";
|
||||
reg = <0xFE000000 0x400>;
|
||||
reg = <0xfe000000 0x400>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <14 8>;
|
||||
dma-channels = <6>;
|
||||
|
|
@ -132,70 +132,70 @@
|
|||
multi-block = <1 1 1 1 1 1>;
|
||||
};
|
||||
|
||||
i2c0: i2c@FF120000 {
|
||||
i2c0: i2c@ff120000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF120000 0x1000>;
|
||||
reg = <0xff120000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c1: i2c@FF121000 {
|
||||
i2c1: i2c@ff121000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF121000 0x1000>;
|
||||
reg = <0xff121000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c2: i2c@FF122000 {
|
||||
i2c2: i2c@ff122000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF122000 0x1000>;
|
||||
reg = <0xff122000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c3: i2c@FF123000 {
|
||||
i2c3: i2c@ff123000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF123000 0x1000>;
|
||||
reg = <0xff123000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
i2c4: i2c@FF124000 {
|
||||
i2c4: i2c@ff124000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0xFF124000 0x1000>;
|
||||
reg = <0xff124000 0x1000>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <12 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
|
||||
spi0: spi@0xFE010000 {
|
||||
spi0: spi@fe010000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "abilis,tb100-spi";
|
||||
num-cs = <1>;
|
||||
reg = <0xFE010000 0x20>;
|
||||
reg = <0xfe010000 0x20>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <26 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
};
|
||||
spi1: spi@0xFE011000 {
|
||||
spi1: spi@fe011000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "abilis,tb100-spi";
|
||||
num-cs = <2>;
|
||||
reg = <0xFE011000 0x20>;
|
||||
reg = <0xfe011000 0x20>;
|
||||
interrupt-parent = <&tb10x_ictl>;
|
||||
interrupts = <10 8>;
|
||||
clocks = <&ahb_clk>;
|
||||
|
|
@ -226,23 +226,23 @@
|
|||
interrupts = <20 2>, <19 2>;
|
||||
interrupt-names = "cmd_irq", "event_irq";
|
||||
};
|
||||
tb10x_mdsc0: tb10x-mdscr@FF300000 {
|
||||
tb10x_mdsc0: tb10x-mdscr@ff300000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF300000 0x7000>;
|
||||
reg = <0xff300000 0x7000>;
|
||||
tb100-mdscr-manage-tsin;
|
||||
};
|
||||
tb10x_mscr0: tb10x-mdscr@FF307000 {
|
||||
tb10x_mscr0: tb10x-mdscr@ff307000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF307000 0x7000>;
|
||||
reg = <0xff307000 0x7000>;
|
||||
};
|
||||
tb10x_scr0: tb10x-mdscr@ff30e000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF30e000 0x4000>;
|
||||
reg = <0xff30e000 0x4000>;
|
||||
tb100-mdscr-manage-tsin;
|
||||
};
|
||||
tb10x_scr1: tb10x-mdscr@ff312000 {
|
||||
compatible = "abilis,tb100-mdscr";
|
||||
reg = <0xFF312000 0x4000>;
|
||||
reg = <0xff312000 0x4000>;
|
||||
tb100-mdscr-manage-tsin;
|
||||
};
|
||||
tb10x_wfb: tb10x-wfb@ff319000 {
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@
|
|||
* this GPIO block ORs all interrupts on CPU card (creg,..)
|
||||
* to uplink only 1 IRQ to ARC core intc
|
||||
*/
|
||||
dw-apb-gpio@0x2000 {
|
||||
dw-apb-gpio@2000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = < 0x2000 0x80 >;
|
||||
#address-cells = <1>;
|
||||
|
|
@ -60,7 +60,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <33333000>;
|
||||
|
|
@ -88,7 +88,7 @@
|
|||
* avoid duplicating the MB dtsi file given that IRQ from
|
||||
* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@
|
|||
* this GPIO block ORs all interrupts on CPU card (creg,..)
|
||||
* to uplink only 1 IRQ to ARC core intc
|
||||
*/
|
||||
dw-apb-gpio@0x2000 {
|
||||
dw-apb-gpio@2000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = < 0x2000 0x80 >;
|
||||
#address-cells = <1>;
|
||||
|
|
@ -74,7 +74,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <33333000>;
|
||||
|
|
@ -102,19 +102,19 @@
|
|||
* external DMA buffer located outside of IOC aperture.
|
||||
*/
|
||||
axs10x_mb {
|
||||
ethernet@0x18000 {
|
||||
ethernet@18000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
ohci@60000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
|
@ -132,7 +132,7 @@
|
|||
* avoid duplicating the MB dtsi file given that IRQ from
|
||||
* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
|
|
@ -153,7 +153,7 @@
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xAz).
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xaz).
|
||||
*/
|
||||
frame_buffer: frame_buffer@be000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@
|
|||
* this GPIO block ORs all interrupts on CPU card (creg,..)
|
||||
* to uplink only 1 IRQ to ARC core intc
|
||||
*/
|
||||
dw-apb-gpio@0x2000 {
|
||||
dw-apb-gpio@2000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = < 0x2000 0x80 >;
|
||||
#address-cells = <1>;
|
||||
|
|
@ -81,7 +81,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <33333000>;
|
||||
|
|
@ -109,19 +109,19 @@
|
|||
* external DMA buffer located outside of IOC aperture.
|
||||
*/
|
||||
axs10x_mb {
|
||||
ethernet@0x18000 {
|
||||
ethernet@18000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
ohci@60000 {
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
|
@ -138,7 +138,7 @@
|
|||
* avoid duplicating the MB dtsi file given that IRQ from
|
||||
* this intc to cpu intc are different for axs101 and axs103
|
||||
*/
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0x0 0xe0012000 0x0 0x200 >;
|
||||
|
|
@ -159,7 +159,7 @@
|
|||
#size-cells = <2>;
|
||||
ranges;
|
||||
/*
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xAz).
|
||||
* Move frame buffer out of IOC aperture (0x8z-0xaz).
|
||||
*/
|
||||
frame_buffer: frame_buffer@be000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
gmac: ethernet@0x18000 {
|
||||
gmac: ethernet@18000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = < 0x18000 0x2000 >;
|
||||
|
|
@ -88,13 +88,13 @@
|
|||
mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = < 0x40000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
};
|
||||
|
||||
ohci@0x60000 {
|
||||
ohci@60000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = < 0x60000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
|
|
@ -118,7 +118,7 @@
|
|||
* dw_mci_pltfm_prepare_command() is used in generic platform
|
||||
* code.
|
||||
*/
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
compatible = "altr,socfpga-dw-mshc";
|
||||
reg = < 0x15000 0x400 >;
|
||||
fifo-depth = < 16 >;
|
||||
|
|
@ -129,7 +129,7 @@
|
|||
bus-width = < 4 >;
|
||||
};
|
||||
|
||||
uart@0x20000 {
|
||||
uart@20000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x20000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
|
|
@ -139,7 +139,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x21000 {
|
||||
uart@21000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x21000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
|
|
@ -150,7 +150,7 @@
|
|||
};
|
||||
|
||||
/* UART muxed with USB data port (ttyS3) */
|
||||
uart@0x22000 {
|
||||
uart@22000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x22000 0x100>;
|
||||
clock-frequency = <33333333>;
|
||||
|
|
@ -160,7 +160,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
i2c@0x1d000 {
|
||||
i2c@1d000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
reg = <0x1d000 0x100>;
|
||||
clock-frequency = <400000>;
|
||||
|
|
@ -177,7 +177,7 @@
|
|||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
i2c@0x1f000 {
|
||||
i2c@1f000 {
|
||||
compatible = "snps,designware-i2c";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -218,13 +218,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
eeprom@0x54{
|
||||
eeprom@54{
|
||||
compatible = "atmel,24c01";
|
||||
reg = <0x54>;
|
||||
pagesize = <0x8>;
|
||||
};
|
||||
|
||||
eeprom@0x57{
|
||||
eeprom@57{
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x57>;
|
||||
pagesize = <0x8>;
|
||||
|
|
|
|||
|
|
@ -110,12 +110,12 @@
|
|||
cgu_rst: reset-controller@8a0 {
|
||||
compatible = "snps,hsdk-reset";
|
||||
#reset-cells = <1>;
|
||||
reg = <0x8A0 0x4>, <0xFF0 0x4>;
|
||||
reg = <0x8a0 0x4>, <0xff0 0x4>;
|
||||
};
|
||||
|
||||
core_clk: core-clk@0 {
|
||||
compatible = "snps,hsdk-core-pll-clock";
|
||||
reg = <0x00 0x10>, <0x14B8 0x4>;
|
||||
reg = <0x00 0x10>, <0x14b8 0x4>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&input_clk>;
|
||||
|
||||
|
|
@ -167,6 +167,18 @@
|
|||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
dmac_core_clk: dmac-core-clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <400000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
dmac_cfg_clk: dmac-gpu-cfg-clk {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <200000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
gmac: ethernet@8000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
|
|
@ -200,6 +212,7 @@
|
|||
compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
|
||||
reg = <0x60000 0x100>;
|
||||
interrupts = <15>;
|
||||
resets = <&cgu_rst HSDK_USB_RESET>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
|
|
@ -207,6 +220,7 @@
|
|||
compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
|
||||
reg = <0x40000 0x100>;
|
||||
interrupts = <15>;
|
||||
resets = <&cgu_rst HSDK_USB_RESET>;
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
|
|
@ -237,6 +251,21 @@
|
|||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
dmac: dmac@80000 {
|
||||
compatible = "snps,axi-dma-1.01a";
|
||||
reg = <0x80000 0x400>;
|
||||
interrupts = <27>;
|
||||
clocks = <&dmac_core_clk>, <&dmac_cfg_clk>;
|
||||
clock-names = "core-clk", "cfgr-clk";
|
||||
|
||||
dma-channels = <4>;
|
||||
snps,dma-masters = <2>;
|
||||
snps,data-width = <3>;
|
||||
snps,block-size = <4096 4096 4096 4096>;
|
||||
snps,priority = <0 1 2 3>;
|
||||
snps,axi-max-burst-len = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@
|
|||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
|
@ -49,7 +49,7 @@
|
|||
|
||||
};
|
||||
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
debug_uart: dw-apb-uart@0x5000 {
|
||||
debug_uart: dw-apb-uart@5000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x5000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
|
@ -57,7 +57,7 @@
|
|||
|
||||
};
|
||||
|
||||
mb_intc: dw-apb-ictl@0xe0012000 {
|
||||
mb_intc: dw-apb-ictl@e0012000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dw-apb-ictl";
|
||||
reg = < 0xe0012000 0x200 >;
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
ethernet@0x18000 {
|
||||
ethernet@18000 {
|
||||
#interrupt-cells = <1>;
|
||||
compatible = "snps,dwmac";
|
||||
reg = < 0x18000 0x2000 >;
|
||||
|
|
@ -49,13 +49,13 @@
|
|||
clock-names = "stmmaceth";
|
||||
};
|
||||
|
||||
ehci@0x40000 {
|
||||
ehci@40000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = < 0x40000 0x100 >;
|
||||
interrupts = < 8 >;
|
||||
};
|
||||
|
||||
uart@0x20000 {
|
||||
uart@20000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x20000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
|
@ -65,7 +65,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x21000 {
|
||||
uart@21000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x21000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
|
@ -75,7 +75,7 @@
|
|||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart@0x22000 {
|
||||
uart@22000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x22000 0x100>;
|
||||
clock-frequency = <2403200>;
|
||||
|
|
@ -101,7 +101,7 @@
|
|||
interrupt-names = "arc_ps2_irq";
|
||||
};
|
||||
|
||||
mmc@0x15000 {
|
||||
mmc@15000 {
|
||||
compatible = "snps,dw-mshc";
|
||||
reg = <0x15000 0x400>;
|
||||
fifo-depth = <1024>;
|
||||
|
|
@ -117,11 +117,11 @@
|
|||
* Embedded Vision subsystem UIO mappings; only relevant for EV VDK
|
||||
*
|
||||
* This node is intentionally put outside of MB above becase
|
||||
* it maps areas outside of MB's 0xEz-0xFz.
|
||||
* it maps areas outside of MB's 0xez-0xfz.
|
||||
*/
|
||||
uio_ev: uio@0xD0000000 {
|
||||
uio_ev: uio@d0000000 {
|
||||
compatible = "generic-uio";
|
||||
reg = <0xD0000000 0x2000 0xD1000000 0x2000 0x90000000 0x10000000 0xC0000000 0x10000000>;
|
||||
reg = <0xd0000000 0x2000 0xd1000000 0x2000 0x90000000 0x10000000 0xc0000000 0x10000000>;
|
||||
reg-names = "ev_gsa", "ev_ctrl", "ev_shared_mem", "ev_code_mem";
|
||||
interrupt-parent = <&mb_intc>;
|
||||
interrupts = <23>;
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ CONFIG_NAMESPACES=y
|
|||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@ generic-y += hardirq.h
|
|||
generic-y += hw_irq.h
|
||||
generic-y += irq_regs.h
|
||||
generic-y += irq_work.h
|
||||
generic-y += kvm_para.h
|
||||
generic-y += local.h
|
||||
generic-y += local64.h
|
||||
generic-y += mcs_spinlock.h
|
||||
|
|
|
|||
|
|
@ -82,6 +82,7 @@
|
|||
#define ECR_V_DTLB_MISS 0x05
|
||||
#define ECR_V_PROTV 0x06
|
||||
#define ECR_V_TRAP 0x09
|
||||
#define ECR_V_MISALIGN 0x0d
|
||||
#endif
|
||||
|
||||
/* DTLB Miss and Protection Violation Cause Codes */
|
||||
|
|
@ -167,14 +168,6 @@ struct bcr_mpy {
|
|||
#endif
|
||||
};
|
||||
|
||||
struct bcr_extn_xymem {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int ram_org:2, num_banks:4, bank_sz:4, ver:8;
|
||||
#else
|
||||
unsigned int ver:8, bank_sz:4, num_banks:4, ram_org:2;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct bcr_iccm_arcompact {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int base:16, pad:5, sz:3, ver:8;
|
||||
|
|
@ -312,7 +305,7 @@ struct cpuinfo_arc {
|
|||
struct cpuinfo_arc_bpu bpu;
|
||||
struct bcr_identity core;
|
||||
struct bcr_isa_arcv2 isa;
|
||||
const char *details, *name;
|
||||
const char *release, *name;
|
||||
unsigned int vec_base;
|
||||
struct cpuinfo_arc_ccm iccm, dccm;
|
||||
struct {
|
||||
|
|
@ -322,7 +315,6 @@ struct cpuinfo_arc {
|
|||
timer0:1, timer1:1, rtc:1, gfrc:1, pad4:4;
|
||||
} extn;
|
||||
struct bcr_mpy extn_mpy;
|
||||
struct bcr_extn_xymem extn_xymem;
|
||||
};
|
||||
|
||||
extern struct cpuinfo_arc cpuinfo_arc700[];
|
||||
|
|
|
|||
|
|
@ -44,7 +44,13 @@
|
|||
#define ARCV2_IRQ_DEF_PRIO 1
|
||||
|
||||
/* seed value for status register */
|
||||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \
|
||||
#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
#define __AD_ENB STATUS_AD_MASK
|
||||
#else
|
||||
#define __AD_ENB 0
|
||||
#endif
|
||||
|
||||
#define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | __AD_ENB | \
|
||||
(ARCV2_IRQ_DEF_PRIO << 1))
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
|||
|
|
@ -105,10 +105,10 @@ static const char * const arc_pmu_ev_hw_map[] = {
|
|||
[PERF_COUNT_HW_INSTRUCTIONS] = "iall",
|
||||
/* All jump instructions that are taken */
|
||||
[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmptak",
|
||||
[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
[PERF_COUNT_HW_BRANCH_MISSES] = "bpmp",
|
||||
#else
|
||||
[PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
|
||||
[PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", /* NP-T, PT-NT, PNT-T */
|
||||
#endif
|
||||
[PERF_COUNT_ARC_LDC] = "imemrdc", /* Instr: mem read cached */
|
||||
|
|
|
|||
|
|
@ -21,8 +21,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
{
|
||||
unsigned int val;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[slock]] \n"
|
||||
" breq %[val], %[LOCKED], 1b \n" /* spin while LOCKED */
|
||||
|
|
@ -34,6 +32,14 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
|
||||
: "memory", "cc");
|
||||
|
||||
/*
|
||||
* ACQUIRE barrier to ensure load/store after taking the lock
|
||||
* don't "bleed-up" out of the critical section (leak-in is allowed)
|
||||
* http://www.spinics.net/lists/kernel/msg2010409.html
|
||||
*
|
||||
* ARCv2 only has load-load, store-store and all-all barrier
|
||||
* thus need the full all-all barrier
|
||||
*/
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
|
|
@ -42,8 +48,6 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
|||
{
|
||||
unsigned int val, got_it = 0;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[slock]] \n"
|
||||
" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
|
||||
|
|
@ -67,9 +71,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
|||
{
|
||||
smp_mb();
|
||||
|
||||
lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||
|
||||
smp_mb();
|
||||
WRITE_ONCE(lock->slock, __ARCH_SPIN_LOCK_UNLOCKED__);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -81,8 +83,6 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val;
|
||||
|
||||
smp_mb();
|
||||
|
||||
/*
|
||||
* zero means writer holds the lock exclusively, deny Reader.
|
||||
* Otherwise grant lock to first/subseq reader
|
||||
|
|
@ -113,8 +113,6 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val, got_it = 0;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[rwlock]] \n"
|
||||
" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
|
||||
|
|
@ -140,8 +138,6 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val;
|
||||
|
||||
smp_mb();
|
||||
|
||||
/*
|
||||
* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
|
||||
* deny writer. Otherwise if unlocked grant to writer
|
||||
|
|
@ -175,8 +171,6 @@ static inline int arch_write_trylock(arch_rwlock_t *rw)
|
|||
{
|
||||
unsigned int val, got_it = 0;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: llock %[val], [%[rwlock]] \n"
|
||||
" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
|
||||
|
|
@ -217,17 +211,13 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
|
|||
: [val] "=&r" (val)
|
||||
: [rwlock] "r" (&(rw->counter))
|
||||
: "memory", "cc");
|
||||
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
static inline void arch_write_unlock(arch_rwlock_t *rw)
|
||||
{
|
||||
smp_mb();
|
||||
|
||||
rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
|
||||
|
||||
smp_mb();
|
||||
WRITE_ONCE(rw->counter, __ARCH_RW_LOCK_UNLOCKED__);
|
||||
}
|
||||
|
||||
#else /* !CONFIG_ARC_HAS_LLSC */
|
||||
|
|
@ -237,10 +227,9 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
|
||||
|
||||
/*
|
||||
* This smp_mb() is technically superfluous, we only need the one
|
||||
* after the lock for providing the ACQUIRE semantics.
|
||||
* However doing the "right" thing was regressing hackbench
|
||||
* so keeping this, pending further investigation
|
||||
* Per lkmm, smp_mb() is only required after _lock (and before_unlock)
|
||||
* for ACQ and REL semantics respectively. However EX based spinlocks
|
||||
* need the extra smp_mb to workaround a hardware quirk.
|
||||
*/
|
||||
smp_mb();
|
||||
|
||||
|
|
@ -257,14 +246,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
|
|||
#endif
|
||||
: "memory");
|
||||
|
||||
/*
|
||||
* ACQUIRE barrier to ensure load/store after taking the lock
|
||||
* don't "bleed-up" out of the critical section (leak-in is allowed)
|
||||
* http://www.spinics.net/lists/kernel/msg2010409.html
|
||||
*
|
||||
* ARCv2 only has load-load, store-store and all-all barrier
|
||||
* thus need the full all-all barrier
|
||||
*/
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
|
|
@ -309,8 +290,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
|||
: "memory");
|
||||
|
||||
/*
|
||||
* superfluous, but keeping for now - see pairing version in
|
||||
* arch_spin_lock above
|
||||
* see pairing version/comment in arch_spin_lock above
|
||||
*/
|
||||
smp_mb();
|
||||
}
|
||||
|
|
@ -344,7 +324,6 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
|
|||
arch_spin_unlock(&(rw->lock_mutex));
|
||||
local_irq_restore(flags);
|
||||
|
||||
smp_mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -55,12 +55,11 @@ syscall_set_return_value(struct task_struct *task, struct pt_regs *regs,
|
|||
*/
|
||||
static inline void
|
||||
syscall_get_arguments(struct task_struct *task, struct pt_regs *regs,
|
||||
unsigned int i, unsigned int n, unsigned long *args)
|
||||
unsigned long *args)
|
||||
{
|
||||
unsigned long *inside_ptregs = &(regs->r0);
|
||||
inside_ptregs -= i;
|
||||
|
||||
BUG_ON((i + n) > 6);
|
||||
unsigned int n = 6;
|
||||
unsigned int i = 0;
|
||||
|
||||
while (n--) {
|
||||
args[i++] = (*inside_ptregs);
|
||||
|
|
|
|||
|
|
@ -1,2 +1 @@
|
|||
generic-y += kvm_para.h
|
||||
generic-y += ucontext.h
|
||||
|
|
|
|||
|
|
@ -54,7 +54,12 @@
|
|||
; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
|
||||
; by default
|
||||
lr r5, [status32]
|
||||
#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
bset r5, r5, STATUS_AD_BIT
|
||||
#else
|
||||
; Although disabled at reset, bootloader might have enabled it
|
||||
bclr r5, r5, STATUS_AD_BIT
|
||||
#endif
|
||||
kflag r5
|
||||
#endif
|
||||
.endm
|
||||
|
|
@ -106,6 +111,7 @@ ENTRY(stext)
|
|||
; r2 = pointer to uboot provided cmdline or external DTB in mem
|
||||
; These are handled later in handle_uboot_args()
|
||||
st r0, [@uboot_tag]
|
||||
st r1, [@uboot_magic]
|
||||
st r2, [@uboot_arg]
|
||||
|
||||
; setup "current" tsk and optionally cache it in dedicated r25
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ void arc_init_IRQ(void)
|
|||
|
||||
/* setup status32, don't enable intr yet as kernel doesn't want */
|
||||
tmp = read_aux_reg(ARC_REG_STATUS32);
|
||||
tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
|
||||
tmp |= ARCV2_IRQ_DEF_PRIO << 1;
|
||||
tmp &= ~STATUS_IE_MASK;
|
||||
asm volatile("kflag %0 \n"::"r"(tmp));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -36,6 +36,7 @@ unsigned int intr_to_DE_cnt;
|
|||
|
||||
/* Part of U-boot ABI: see head.S */
|
||||
int __initdata uboot_tag;
|
||||
int __initdata uboot_magic;
|
||||
char __initdata *uboot_arg;
|
||||
|
||||
const struct machine_desc *machine_desc;
|
||||
|
|
@ -44,29 +45,24 @@ struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
|
|||
|
||||
struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
|
||||
|
||||
static const struct id_to_str arc_cpu_rel[] = {
|
||||
static const struct id_to_str arc_legacy_rel[] = {
|
||||
/* ID.ARCVER, Release */
|
||||
#ifdef CONFIG_ISA_ARCOMPACT
|
||||
{ 0x34, "R4.10"},
|
||||
{ 0x35, "R4.11"},
|
||||
{ 0x34, "R4.10"},
|
||||
{ 0x35, "R4.11"},
|
||||
#else
|
||||
{ 0x51, "R2.0" },
|
||||
{ 0x52, "R2.1" },
|
||||
{ 0x53, "R3.0" },
|
||||
{ 0x54, "R3.10a" },
|
||||
{ 0x51, "R2.0" },
|
||||
{ 0x52, "R2.1" },
|
||||
{ 0x53, "R3.0" },
|
||||
#endif
|
||||
{ 0x00, NULL }
|
||||
{ 0x00, NULL }
|
||||
};
|
||||
|
||||
static const struct id_to_str arc_cpu_nm[] = {
|
||||
#ifdef CONFIG_ISA_ARCOMPACT
|
||||
{ 0x20, "ARC 600" },
|
||||
{ 0x30, "ARC 770" }, /* 750 identified seperately */
|
||||
#else
|
||||
{ 0x40, "ARC EM" },
|
||||
{ 0x50, "ARC HS38" },
|
||||
{ 0x54, "ARC HS48" },
|
||||
#endif
|
||||
{ 0x00, "Unknown" }
|
||||
static const struct id_to_str arc_cpu_rel[] = {
|
||||
/* UARCH.MAJOR, Release */
|
||||
{ 0, "R3.10a"},
|
||||
{ 1, "R3.50a"},
|
||||
{ 0xFF, NULL }
|
||||
};
|
||||
|
||||
static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
|
||||
|
|
@ -116,31 +112,72 @@ static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
|
|||
}
|
||||
}
|
||||
|
||||
static void decode_arc_core(struct cpuinfo_arc *cpu)
|
||||
{
|
||||
struct bcr_uarch_build_arcv2 uarch;
|
||||
const struct id_to_str *tbl;
|
||||
|
||||
/*
|
||||
* Up until (including) the first core4 release (0x54) things were
|
||||
* simple: AUX IDENTITY.ARCVER was sufficient to identify arc family
|
||||
* and release: 0x50 to 0x53 was HS38, 0x54 was HS48 (dual issue)
|
||||
*/
|
||||
|
||||
if (cpu->core.family < 0x54) { /* includes arc700 */
|
||||
|
||||
for (tbl = &arc_legacy_rel[0]; tbl->id != 0; tbl++) {
|
||||
if (cpu->core.family == tbl->id) {
|
||||
cpu->release = tbl->str;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (is_isa_arcompact())
|
||||
cpu->name = "ARC700";
|
||||
else if (tbl->str)
|
||||
cpu->name = "HS38";
|
||||
else
|
||||
cpu->name = cpu->release = "Unknown";
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* However the subsequent HS release (same 0x54) allow HS38 or HS48
|
||||
* configurations and encode this info in a different BCR.
|
||||
* The BCR was introduced in 0x54 so can't be read unconditionally.
|
||||
*/
|
||||
|
||||
READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
|
||||
|
||||
if (uarch.prod == 4) {
|
||||
cpu->name = "HS48";
|
||||
cpu->extn.dual = 1;
|
||||
|
||||
} else {
|
||||
cpu->name = "HS38";
|
||||
}
|
||||
|
||||
for (tbl = &arc_cpu_rel[0]; tbl->id != 0xFF; tbl++) {
|
||||
if (uarch.maj == tbl->id) {
|
||||
cpu->release = tbl->str;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void read_arc_build_cfg_regs(void)
|
||||
{
|
||||
struct bcr_timer timer;
|
||||
struct bcr_generic bcr;
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
|
||||
const struct id_to_str *tbl;
|
||||
struct bcr_isa_arcv2 isa;
|
||||
struct bcr_actionpoint ap;
|
||||
|
||||
FIX_PTR(cpu);
|
||||
|
||||
READ_BCR(AUX_IDENTITY, cpu->core);
|
||||
|
||||
for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
|
||||
if (cpu->core.family == tbl->id) {
|
||||
cpu->details = tbl->str;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
|
||||
if ((cpu->core.family & 0xF4) == tbl->id)
|
||||
break;
|
||||
}
|
||||
cpu->name = tbl->str;
|
||||
decode_arc_core(cpu);
|
||||
|
||||
READ_BCR(ARC_REG_TIMERS_BCR, timer);
|
||||
cpu->extn.timer0 = timer.t0;
|
||||
|
|
@ -151,16 +188,6 @@ static void read_arc_build_cfg_regs(void)
|
|||
|
||||
READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
|
||||
|
||||
cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
|
||||
cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
|
||||
cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
|
||||
cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
|
||||
cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
|
||||
cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
|
||||
IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
|
||||
|
||||
READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
|
||||
|
||||
/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
|
||||
read_decode_ccm_bcr(cpu);
|
||||
|
||||
|
|
@ -198,30 +225,12 @@ static void read_arc_build_cfg_regs(void)
|
|||
cpu->bpu.num_pred = 2048 << bpu.pte;
|
||||
cpu->bpu.ret_stk = 4 << bpu.rse;
|
||||
|
||||
if (cpu->core.family >= 0x54) {
|
||||
/* if dual issue hardware, is it enabled ? */
|
||||
if (cpu->extn.dual) {
|
||||
unsigned int exec_ctrl;
|
||||
|
||||
struct bcr_uarch_build_arcv2 uarch;
|
||||
|
||||
/*
|
||||
* The first 0x54 core (uarch maj:min 0:1 or 0:2) was
|
||||
* dual issue only (HS4x). But next uarch rev (1:0)
|
||||
* allows it be configured for single issue (HS3x)
|
||||
* Ensure we fiddle with dual issue only on HS4x
|
||||
*/
|
||||
READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
|
||||
|
||||
if (uarch.prod == 4) {
|
||||
unsigned int exec_ctrl;
|
||||
|
||||
/* dual issue hardware always present */
|
||||
cpu->extn.dual = 1;
|
||||
|
||||
READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
|
||||
|
||||
/* dual issue hardware enabled ? */
|
||||
cpu->extn.dual_enb = !(exec_ctrl & 1);
|
||||
|
||||
}
|
||||
READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
|
||||
cpu->extn.dual_enb = !(exec_ctrl & 1);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -263,7 +272,8 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
{
|
||||
struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
|
||||
struct bcr_identity *core = &cpu->core;
|
||||
int i, n = 0, ua = 0;
|
||||
char mpy_opt[16];
|
||||
int n = 0;
|
||||
|
||||
FIX_PTR(cpu);
|
||||
|
||||
|
|
@ -272,7 +282,7 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
core->family, core->cpu_id, core->chip_id);
|
||||
|
||||
n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
|
||||
cpu_id, cpu->name, cpu->details,
|
||||
cpu_id, cpu->name, cpu->release,
|
||||
is_isa_arcompact() ? "ARCompact" : "ARCv2",
|
||||
IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
|
||||
IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
|
||||
|
|
@ -283,61 +293,50 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
|
||||
IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
|
||||
|
||||
#ifdef __ARC_UNALIGNED__
|
||||
ua = 1;
|
||||
#endif
|
||||
n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s%s",
|
||||
IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
|
||||
IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
|
||||
IS_AVAIL1(cpu->isa.unalign, "unalign "), IS_USED_RUN(ua));
|
||||
|
||||
if (i)
|
||||
n += scnprintf(buf + n, len - n, "\n\t\t: ");
|
||||
|
||||
if (cpu->extn_mpy.ver) {
|
||||
if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
|
||||
n += scnprintf(buf + n, len - n, "mpy ");
|
||||
if (is_isa_arcompact()) {
|
||||
scnprintf(mpy_opt, 16, "mpy");
|
||||
} else {
|
||||
|
||||
int opt = 2; /* stock MPY/MPYH */
|
||||
|
||||
if (cpu->extn_mpy.dsp) /* OPT 7-9 */
|
||||
opt = cpu->extn_mpy.dsp + 6;
|
||||
|
||||
n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
|
||||
scnprintf(mpy_opt, 16, "mpy[opt %d] ", opt);
|
||||
}
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
|
||||
IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
|
||||
IS_AVAIL1(cpu->extn.norm, "norm "),
|
||||
IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
|
||||
IS_AVAIL1(cpu->extn.swap, "swap "),
|
||||
IS_AVAIL1(cpu->extn.minmax, "minmax "),
|
||||
IS_AVAIL1(cpu->extn.crc, "crc "),
|
||||
IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
|
||||
IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
|
||||
IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
|
||||
IS_AVAIL2(cpu->isa.unalign, "unalign ", CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS),
|
||||
IS_AVAIL1(cpu->extn_mpy.ver, mpy_opt),
|
||||
IS_AVAIL1(cpu->isa.div_rem, "div_rem "));
|
||||
|
||||
if (cpu->bpu.ver)
|
||||
if (cpu->bpu.ver) {
|
||||
n += scnprintf(buf + n, len - n,
|
||||
"BPU\t\t: %s%s match, cache:%d, Predict Table:%d Return stk: %d",
|
||||
IS_AVAIL1(cpu->bpu.full, "full"),
|
||||
IS_AVAIL1(!cpu->bpu.full, "partial"),
|
||||
cpu->bpu.num_cache, cpu->bpu.num_pred, cpu->bpu.ret_stk);
|
||||
|
||||
if (is_isa_arcv2()) {
|
||||
struct bcr_lpb lpb;
|
||||
if (is_isa_arcv2()) {
|
||||
struct bcr_lpb lpb;
|
||||
|
||||
READ_BCR(ARC_REG_LPB_BUILD, lpb);
|
||||
if (lpb.ver) {
|
||||
unsigned int ctl;
|
||||
ctl = read_aux_reg(ARC_REG_LPB_CTRL);
|
||||
READ_BCR(ARC_REG_LPB_BUILD, lpb);
|
||||
if (lpb.ver) {
|
||||
unsigned int ctl;
|
||||
ctl = read_aux_reg(ARC_REG_LPB_CTRL);
|
||||
|
||||
n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
|
||||
lpb.entries,
|
||||
IS_DISABLED_RUN(!ctl));
|
||||
n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
|
||||
lpb.entries,
|
||||
IS_DISABLED_RUN(!ctl));
|
||||
}
|
||||
}
|
||||
n += scnprintf(buf + n, len - n, "\n");
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "\n");
|
||||
return buf;
|
||||
}
|
||||
|
||||
|
|
@ -390,11 +389,6 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
|
|||
}
|
||||
}
|
||||
|
||||
n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
|
||||
EF_ARC_OSABI_CURRENT >> 8,
|
||||
EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
|
||||
"no-legacy-syscalls" : "64-bit data any register aligned");
|
||||
|
||||
return buf;
|
||||
}
|
||||
|
||||
|
|
@ -497,6 +491,8 @@ static inline bool uboot_arg_invalid(unsigned long addr)
|
|||
#define UBOOT_TAG_NONE 0
|
||||
#define UBOOT_TAG_CMDLINE 1
|
||||
#define UBOOT_TAG_DTB 2
|
||||
/* We always pass 0 as magic from U-boot */
|
||||
#define UBOOT_MAGIC_VALUE 0
|
||||
|
||||
void __init handle_uboot_args(void)
|
||||
{
|
||||
|
|
@ -511,6 +507,11 @@ void __init handle_uboot_args(void)
|
|||
goto ignore_uboot_args;
|
||||
}
|
||||
|
||||
if (uboot_magic != UBOOT_MAGIC_VALUE) {
|
||||
pr_warn(IGNORE_ARGS "non zero uboot magic\n");
|
||||
goto ignore_uboot_args;
|
||||
}
|
||||
|
||||
if (uboot_tag != UBOOT_TAG_NONE &&
|
||||
uboot_arg_invalid((unsigned long)uboot_arg)) {
|
||||
pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
|
||||
|
|
|
|||
|
|
@ -145,7 +145,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
|
|||
} else if (vec == ECR_V_PROTV) {
|
||||
if (cause_code == ECR_C_PROTV_INST_FETCH)
|
||||
pr_cont("Execute from Non-exec Page\n");
|
||||
else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
|
||||
else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
|
||||
IS_ENABLED(CONFIG_ISA_ARCOMPACT))
|
||||
pr_cont("Misaligned r/w from 0x%08lx\n", address);
|
||||
else
|
||||
pr_cont("%s access not allowed on page\n",
|
||||
|
|
@ -161,6 +162,8 @@ static void show_ecr_verbose(struct pt_regs *regs)
|
|||
pr_cont("Bus Error from Data Mem\n");
|
||||
else
|
||||
pr_cont("Bus Error, check PRM\n");
|
||||
} else if (vec == ECR_V_MISALIGN) {
|
||||
pr_cont("Misaligned r/w from 0x%08lx\n", address);
|
||||
#endif
|
||||
} else if (vec == ECR_V_TRAP) {
|
||||
if (regs->ecr_param == 5)
|
||||
|
|
|
|||
|
|
@ -8,4 +8,10 @@
|
|||
lib-y := strchr-700.o strcpy-700.o strlen.o memcmp.o
|
||||
|
||||
lib-$(CONFIG_ISA_ARCOMPACT) += memcpy-700.o memset.o strcmp.o
|
||||
lib-$(CONFIG_ISA_ARCV2) += memcpy-archs.o memset-archs.o strcmp-archs.o
|
||||
lib-$(CONFIG_ISA_ARCV2) += memset-archs.o strcmp-archs.o
|
||||
|
||||
ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
lib-$(CONFIG_ISA_ARCV2) +=memcpy-archs-unaligned.o
|
||||
else
|
||||
lib-$(CONFIG_ISA_ARCV2) +=memcpy-archs.o
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,47 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* ARCv2 memcpy implementation optimized for unaligned memory access using.
|
||||
*
|
||||
* Copyright (C) 2019 Synopsys
|
||||
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
# define LOADX(DST,RX) ldd.ab DST, [RX, 8]
|
||||
# define STOREX(SRC,RX) std.ab SRC, [RX, 8]
|
||||
# define ZOLSHFT 5
|
||||
# define ZOLAND 0x1F
|
||||
#else
|
||||
# define LOADX(DST,RX) ld.ab DST, [RX, 4]
|
||||
# define STOREX(SRC,RX) st.ab SRC, [RX, 4]
|
||||
# define ZOLSHFT 4
|
||||
# define ZOLAND 0xF
|
||||
#endif
|
||||
|
||||
ENTRY_CFI(memcpy)
|
||||
mov r3, r0 ; don;t clobber ret val
|
||||
|
||||
lsr.f lp_count, r2, ZOLSHFT
|
||||
lpnz @.Lcopy32_64bytes
|
||||
;; LOOP START
|
||||
LOADX (r6, r1)
|
||||
LOADX (r8, r1)
|
||||
LOADX (r10, r1)
|
||||
LOADX (r4, r1)
|
||||
STOREX (r6, r3)
|
||||
STOREX (r8, r3)
|
||||
STOREX (r10, r3)
|
||||
STOREX (r4, r3)
|
||||
.Lcopy32_64bytes:
|
||||
|
||||
and.f lp_count, r2, ZOLAND ;Last remaining 31 bytes
|
||||
lpnz @.Lcopyremainingbytes
|
||||
;; LOOP START
|
||||
ldb.ab r5, [r1, 1]
|
||||
stb.ab r5, [r3, 1]
|
||||
.Lcopyremainingbytes:
|
||||
|
||||
j [blink]
|
||||
END_CFI(memcpy)
|
||||
|
|
@ -26,8 +26,8 @@ config EZNPS_MTM_EXT
|
|||
help
|
||||
Here we add new hierarchy for CPUs topology.
|
||||
We got:
|
||||
Core
|
||||
Thread
|
||||
Core
|
||||
Thread
|
||||
At the new thread level each CPU represent one HW thread.
|
||||
At highest hierarchy each core contain 16 threads,
|
||||
any of them seem like CPU from Linux point of view.
|
||||
|
|
@ -35,10 +35,10 @@ config EZNPS_MTM_EXT
|
|||
core and HW scheduler round robin between them.
|
||||
|
||||
config EZNPS_MEM_ERROR_ALIGN
|
||||
bool "ARC-EZchip Memory error as an exception"
|
||||
depends on EZNPS_MTM_EXT
|
||||
default n
|
||||
help
|
||||
bool "ARC-EZchip Memory error as an exception"
|
||||
depends on EZNPS_MTM_EXT
|
||||
default n
|
||||
help
|
||||
On the real chip of the NPS, user memory errors are handled
|
||||
as a machine check exception, which is fatal, whereas on
|
||||
simulator platform for NPS, is handled as a Level 2 interrupt
|
||||
|
|
|
|||
|
|
@ -596,6 +596,7 @@ config ARCH_DAVINCI
|
|||
select HAVE_IDE
|
||||
select PM_GENERIC_DOMAINS if PM
|
||||
select PM_GENERIC_DOMAINS_OF if PM && OF
|
||||
select REGMAP_MMIO
|
||||
select RESET_CONTROLLER
|
||||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
|
|
|
|||
|
|
@ -57,6 +57,24 @@
|
|||
enable-active-high;
|
||||
};
|
||||
|
||||
/* TPS79501 */
|
||||
v1_8d_reg: fixedregulator-v1_8d {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v1_8d";
|
||||
vin-supply = <&vbat>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
/* TPS79501 */
|
||||
v3_3d_reg: fixedregulator-v3_3d {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v3_3d";
|
||||
vin-supply = <&vbat>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
|
|
@ -499,10 +517,10 @@
|
|||
status = "okay";
|
||||
|
||||
/* Regulators */
|
||||
AVDD-supply = <&vaux2_reg>;
|
||||
IOVDD-supply = <&vaux2_reg>;
|
||||
DRVDD-supply = <&vaux2_reg>;
|
||||
DVDD-supply = <&vbat>;
|
||||
AVDD-supply = <&v3_3d_reg>;
|
||||
IOVDD-supply = <&v3_3d_reg>;
|
||||
DRVDD-supply = <&v3_3d_reg>;
|
||||
DVDD-supply = <&v1_8d_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -73,6 +73,24 @@
|
|||
enable-active-high;
|
||||
};
|
||||
|
||||
/* TPS79518 */
|
||||
v1_8d_reg: fixedregulator-v1_8d {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v1_8d";
|
||||
vin-supply = <&vbat>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
/* TPS78633 */
|
||||
v3_3d_reg: fixedregulator-v3_3d {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v3_3d";
|
||||
vin-supply = <&vbat>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_s0>;
|
||||
|
|
@ -501,10 +519,10 @@
|
|||
status = "okay";
|
||||
|
||||
/* Regulators */
|
||||
AVDD-supply = <&vaux2_reg>;
|
||||
IOVDD-supply = <&vaux2_reg>;
|
||||
DRVDD-supply = <&vaux2_reg>;
|
||||
DVDD-supply = <&vbat>;
|
||||
AVDD-supply = <&v3_3d_reg>;
|
||||
IOVDD-supply = <&v3_3d_reg>;
|
||||
DRVDD-supply = <&v3_3d_reg>;
|
||||
DVDD-supply = <&v1_8d_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1762,7 +1762,7 @@
|
|||
reg = <0xcc000 0x4>;
|
||||
reg-names = "rev";
|
||||
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
|
||||
clocks = <&l4ls_clkctrl AM3_D_CAN0_CLKCTRL 0>;
|
||||
clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -1785,7 +1785,7 @@
|
|||
reg = <0xd0000 0x4>;
|
||||
reg-names = "rev";
|
||||
/* Domains (P, C): per_pwrdm, l4ls_clkdm */
|
||||
clocks = <&l4ls_clkctrl AM3_D_CAN1_CLKCTRL 0>;
|
||||
clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@
|
|||
};
|
||||
|
||||
&hdmi {
|
||||
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
||||
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&pwm {
|
||||
|
|
|
|||
|
|
@ -114,9 +114,9 @@
|
|||
reg = <2>;
|
||||
};
|
||||
|
||||
switch@0 {
|
||||
switch@10 {
|
||||
compatible = "qca,qca8334";
|
||||
reg = <0>;
|
||||
reg = <10>;
|
||||
|
||||
switch_ports: ports {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -125,7 +125,7 @@
|
|||
ethphy0: port@0 {
|
||||
reg = <0>;
|
||||
label = "cpu";
|
||||
phy-mode = "rgmii";
|
||||
phy-mode = "rgmii-id";
|
||||
ethernet = <&fec>;
|
||||
|
||||
fixed-link {
|
||||
|
|
|
|||
|
|
@ -264,7 +264,7 @@
|
|||
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
||||
vmcc-supply = <®_sd3_vmmc>;
|
||||
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
||||
bus-witdh = <4>;
|
||||
bus-width = <4>;
|
||||
no-1-8-v;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -275,7 +275,7 @@
|
|||
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
|
||||
vmcc-supply = <®_sd4_vmmc>;
|
||||
bus-witdh = <8>;
|
||||
bus-width = <8>;
|
||||
no-1-8-v;
|
||||
non-removable;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -91,6 +91,7 @@
|
|||
pinctrl-0 = <&pinctrl_enet>;
|
||||
phy-handle = <ðphy>;
|
||||
phy-mode = "rgmii";
|
||||
phy-reset-duration = <10>; /* in msecs */
|
||||
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
|
||||
phy-supply = <&vdd_eth_io_reg>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2016 Freescale Semiconductor, Inc.
|
||||
* Copyright (C) 2017 NXP
|
||||
|
|
|
|||
|
|
@ -254,6 +254,7 @@
|
|||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd";
|
||||
|
|
@ -430,7 +431,7 @@
|
|||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
card-detect-delay = <200>;
|
||||
broken-cd;
|
||||
disable-wp; /* wp not hooked up */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
||||
|
|
|
|||
|
|
@ -25,8 +25,6 @@
|
|||
|
||||
gpio_keys: gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwr_key_l>;
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@
|
|||
compatible = "arm,cortex-a12";
|
||||
reg = <0x501>;
|
||||
resets = <&cru SRST_CORE1>;
|
||||
operating-points = <&cpu_opp_table>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
clock-latency = <40000>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
|
|
@ -80,7 +80,7 @@
|
|||
compatible = "arm,cortex-a12";
|
||||
reg = <0x502>;
|
||||
resets = <&cru SRST_CORE2>;
|
||||
operating-points = <&cpu_opp_table>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
clock-latency = <40000>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
|
|
@ -90,7 +90,7 @@
|
|||
compatible = "arm,cortex-a12";
|
||||
reg = <0x503>;
|
||||
resets = <&cru SRST_CORE3>;
|
||||
operating-points = <&cpu_opp_table>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
clock-latency = <40000>;
|
||||
clocks = <&cru ARMCLK>;
|
||||
|
|
@ -1119,8 +1119,6 @@
|
|||
clock-names = "ref", "pclk";
|
||||
power-domains = <&power RK3288_PD_VIO>;
|
||||
rockchip,grf = <&grf>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
|
|
@ -1282,27 +1280,27 @@
|
|||
gpu_opp_table: gpu-opp-table {
|
||||
compatible = "operating-points-v2";
|
||||
|
||||
opp@100000000 {
|
||||
opp-100000000 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <950000>;
|
||||
};
|
||||
opp@200000000 {
|
||||
opp-200000000 {
|
||||
opp-hz = /bits/ 64 <200000000>;
|
||||
opp-microvolt = <950000>;
|
||||
};
|
||||
opp@300000000 {
|
||||
opp-300000000 {
|
||||
opp-hz = /bits/ 64 <300000000>;
|
||||
opp-microvolt = <1000000>;
|
||||
};
|
||||
opp@400000000 {
|
||||
opp-400000000 {
|
||||
opp-hz = /bits/ 64 <400000000>;
|
||||
opp-microvolt = <1100000>;
|
||||
};
|
||||
opp@500000000 {
|
||||
opp-500000000 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
opp-microvolt = <1200000>;
|
||||
};
|
||||
opp@600000000 {
|
||||
opp-600000000 {
|
||||
opp-hz = /bits/ 64 <600000000>;
|
||||
opp-microvolt = <1250000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -518,7 +518,7 @@
|
|||
#define PIN_PC9__GPIO PINMUX_PIN(PIN_PC9, 0, 0)
|
||||
#define PIN_PC9__FIQ PINMUX_PIN(PIN_PC9, 1, 3)
|
||||
#define PIN_PC9__GTSUCOMP PINMUX_PIN(PIN_PC9, 2, 1)
|
||||
#define PIN_PC9__ISC_D0 PINMUX_PIN(PIN_PC9, 2, 1)
|
||||
#define PIN_PC9__ISC_D0 PINMUX_PIN(PIN_PC9, 3, 1)
|
||||
#define PIN_PC9__TIOA4 PINMUX_PIN(PIN_PC9, 4, 2)
|
||||
#define PIN_PC10 74
|
||||
#define PIN_PC10__GPIO PINMUX_PIN(PIN_PC10, 0, 0)
|
||||
|
|
|
|||
|
|
@ -170,6 +170,9 @@ CONFIG_IMX_SDMA=y
|
|||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_IIO=y
|
||||
CONFIG_FSL_MX25_ADC=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_IMX1=y
|
||||
CONFIG_PWM_IMX27=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_VFAT_FS=y
|
||||
|
|
|
|||
|
|
@ -398,7 +398,7 @@ CONFIG_MAG3110=y
|
|||
CONFIG_MPL3115=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_FSL_FTM=y
|
||||
CONFIG_PWM_IMX=y
|
||||
CONFIG_PWM_IMX27=y
|
||||
CONFIG_NVMEM_IMX_OCOTP=y
|
||||
CONFIG_NVMEM_VF610_OCOTP=y
|
||||
CONFIG_TEE=y
|
||||
|
|
|
|||
|
|
@ -381,6 +381,17 @@ static inline int kvm_read_guest_lock(struct kvm *kvm,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static inline int kvm_write_guest_lock(struct kvm *kvm, gpa_t gpa,
|
||||
const void *data, unsigned long len)
|
||||
{
|
||||
int srcu_idx = srcu_read_lock(&kvm->srcu);
|
||||
int ret = kvm_write_guest(kvm, gpa, data, len);
|
||||
|
||||
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void *kvm_get_hyp_vector(void)
|
||||
{
|
||||
switch(read_cpuid_part()) {
|
||||
|
|
|
|||
|
|
@ -75,6 +75,8 @@ static inline bool kvm_stage2_has_pud(struct kvm *kvm)
|
|||
|
||||
#define S2_PMD_MASK PMD_MASK
|
||||
#define S2_PMD_SIZE PMD_SIZE
|
||||
#define S2_PUD_MASK PUD_MASK
|
||||
#define S2_PUD_SIZE PUD_SIZE
|
||||
|
||||
static inline bool kvm_stage2_has_pmd(struct kvm *kvm)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -55,53 +55,22 @@ static inline void syscall_set_return_value(struct task_struct *task,
|
|||
|
||||
static inline void syscall_get_arguments(struct task_struct *task,
|
||||
struct pt_regs *regs,
|
||||
unsigned int i, unsigned int n,
|
||||
unsigned long *args)
|
||||
{
|
||||
if (n == 0)
|
||||
return;
|
||||
args[0] = regs->ARM_ORIG_r0;
|
||||
args++;
|
||||
|
||||
if (i + n > SYSCALL_MAX_ARGS) {
|
||||
unsigned long *args_bad = args + SYSCALL_MAX_ARGS - i;
|
||||
unsigned int n_bad = n + i - SYSCALL_MAX_ARGS;
|
||||
pr_warn("%s called with max args %d, handling only %d\n",
|
||||
__func__, i + n, SYSCALL_MAX_ARGS);
|
||||
memset(args_bad, 0, n_bad * sizeof(args[0]));
|
||||
n = SYSCALL_MAX_ARGS - i;
|
||||
}
|
||||
|
||||
if (i == 0) {
|
||||
args[0] = regs->ARM_ORIG_r0;
|
||||
args++;
|
||||
i++;
|
||||
n--;
|
||||
}
|
||||
|
||||
memcpy(args, ®s->ARM_r0 + i, n * sizeof(args[0]));
|
||||
memcpy(args, ®s->ARM_r0 + 1, 5 * sizeof(args[0]));
|
||||
}
|
||||
|
||||
static inline void syscall_set_arguments(struct task_struct *task,
|
||||
struct pt_regs *regs,
|
||||
unsigned int i, unsigned int n,
|
||||
const unsigned long *args)
|
||||
{
|
||||
if (n == 0)
|
||||
return;
|
||||
regs->ARM_ORIG_r0 = args[0];
|
||||
args++;
|
||||
|
||||
if (i + n > SYSCALL_MAX_ARGS) {
|
||||
pr_warn("%s called with max args %d, handling only %d\n",
|
||||
__func__, i + n, SYSCALL_MAX_ARGS);
|
||||
n = SYSCALL_MAX_ARGS - i;
|
||||
}
|
||||
|
||||
if (i == 0) {
|
||||
regs->ARM_ORIG_r0 = args[0];
|
||||
args++;
|
||||
i++;
|
||||
n--;
|
||||
}
|
||||
|
||||
memcpy(®s->ARM_r0 + i, args, n * sizeof(args[0]));
|
||||
memcpy(®s->ARM_r0 + 1, args, 5 * sizeof(args[0]));
|
||||
}
|
||||
|
||||
static inline int syscall_get_arch(void)
|
||||
|
|
|
|||
|
|
@ -3,3 +3,4 @@
|
|||
generated-y += unistd-common.h
|
||||
generated-y += unistd-oabi.h
|
||||
generated-y += unistd-eabi.h
|
||||
generic-y += kvm_para.h
|
||||
|
|
|
|||
|
|
@ -1,2 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
||||
#include <asm-generic/kvm_para.h>
|
||||
|
|
@ -591,13 +591,13 @@ static int __init at91_pm_backup_init(void)
|
|||
|
||||
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");
|
||||
if (!np)
|
||||
goto securam_fail;
|
||||
goto securam_fail_no_ref_dev;
|
||||
|
||||
pdev = of_find_device_by_node(np);
|
||||
of_node_put(np);
|
||||
if (!pdev) {
|
||||
pr_warn("%s: failed to find securam device!\n", __func__);
|
||||
goto securam_fail;
|
||||
goto securam_fail_no_ref_dev;
|
||||
}
|
||||
|
||||
sram_pool = gen_pool_get(&pdev->dev, NULL);
|
||||
|
|
@ -620,6 +620,8 @@ static int __init at91_pm_backup_init(void)
|
|||
return 0;
|
||||
|
||||
securam_fail:
|
||||
put_device(&pdev->dev);
|
||||
securam_fail_no_ref_dev:
|
||||
iounmap(pm_data.sfrbu);
|
||||
pm_data.sfrbu = NULL;
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ void __init cns3xxx_map_io(void)
|
|||
/* used by entry-macro.S */
|
||||
void __init cns3xxx_init_irq(void)
|
||||
{
|
||||
gic_init(0, 29, IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
|
||||
gic_init(IOMEM(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
|
||||
IOMEM(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,30 +16,23 @@
|
|||
#include "cpuidle.h"
|
||||
#include "hardware.h"
|
||||
|
||||
static atomic_t master = ATOMIC_INIT(0);
|
||||
static DEFINE_SPINLOCK(master_lock);
|
||||
static int num_idle_cpus = 0;
|
||||
static DEFINE_SPINLOCK(cpuidle_lock);
|
||||
|
||||
static int imx6q_enter_wait(struct cpuidle_device *dev,
|
||||
struct cpuidle_driver *drv, int index)
|
||||
{
|
||||
if (atomic_inc_return(&master) == num_online_cpus()) {
|
||||
/*
|
||||
* With this lock, we prevent other cpu to exit and enter
|
||||
* this function again and become the master.
|
||||
*/
|
||||
if (!spin_trylock(&master_lock))
|
||||
goto idle;
|
||||
spin_lock(&cpuidle_lock);
|
||||
if (++num_idle_cpus == num_online_cpus())
|
||||
imx6_set_lpm(WAIT_UNCLOCKED);
|
||||
cpu_do_idle();
|
||||
imx6_set_lpm(WAIT_CLOCKED);
|
||||
spin_unlock(&master_lock);
|
||||
goto done;
|
||||
}
|
||||
spin_unlock(&cpuidle_lock);
|
||||
|
||||
idle:
|
||||
cpu_do_idle();
|
||||
done:
|
||||
atomic_dec(&master);
|
||||
|
||||
spin_lock(&cpuidle_lock);
|
||||
if (num_idle_cpus-- == num_online_cpus())
|
||||
imx6_set_lpm(WAIT_CLOCKED);
|
||||
spin_unlock(&cpuidle_lock);
|
||||
|
||||
return index;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -59,6 +59,7 @@ static void __init imx51_m4if_setup(void)
|
|||
return;
|
||||
|
||||
m4if_base = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
if (!m4if_base) {
|
||||
pr_err("Unable to map M4IF registers\n");
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -300,7 +300,7 @@ static struct resource iop13xx_adma_2_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(64);
|
||||
static u64 iop13xx_adma_dmamask = DMA_BIT_MASK(32);
|
||||
static struct iop_adma_platform_data iop13xx_adma_0_data = {
|
||||
.hw_id = 0,
|
||||
.pool_size = PAGE_SIZE,
|
||||
|
|
@ -324,7 +324,7 @@ static struct platform_device iop13xx_adma_0_channel = {
|
|||
.resource = iop13xx_adma_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop13xx_adma_0_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -336,7 +336,7 @@ static struct platform_device iop13xx_adma_1_channel = {
|
|||
.resource = iop13xx_adma_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop13xx_adma_1_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -348,7 +348,7 @@ static struct platform_device iop13xx_adma_2_channel = {
|
|||
.resource = iop13xx_adma_2_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop13xx_adma_2_data,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -152,7 +152,7 @@ static struct resource iop13xx_tpmi_3_resources[] = {
|
|||
}
|
||||
};
|
||||
|
||||
u64 iop13xx_tpmi_mask = DMA_BIT_MASK(64);
|
||||
u64 iop13xx_tpmi_mask = DMA_BIT_MASK(32);
|
||||
static struct platform_device iop13xx_tpmi_0_device = {
|
||||
.name = "iop-tpmi",
|
||||
.id = 0,
|
||||
|
|
@ -160,7 +160,7 @@ static struct platform_device iop13xx_tpmi_0_device = {
|
|||
.resource = iop13xx_tpmi_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -171,7 +171,7 @@ static struct platform_device iop13xx_tpmi_1_device = {
|
|||
.resource = iop13xx_tpmi_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -182,7 +182,7 @@ static struct platform_device iop13xx_tpmi_2_device = {
|
|||
.resource = iop13xx_tpmi_2_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -193,7 +193,7 @@ static struct platform_device iop13xx_tpmi_3_device = {
|
|||
.resource = iop13xx_tpmi_3_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop13xx_tpmi_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -65,6 +65,7 @@ static void m10v_smp_init(unsigned int max_cpus)
|
|||
writel(KERNEL_UNBOOT_FLAG, m10v_smp_base + cpu * 4);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static void m10v_cpu_die(unsigned int l_cpu)
|
||||
{
|
||||
gic_cpu_if_down(0);
|
||||
|
|
@ -83,12 +84,15 @@ static int m10v_cpu_kill(unsigned int l_cpu)
|
|||
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct smp_operations m10v_smp_ops __initdata = {
|
||||
.smp_prepare_cpus = m10v_smp_init,
|
||||
.smp_boot_secondary = m10v_boot_secondary,
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
.cpu_die = m10v_cpu_die,
|
||||
.cpu_kill = m10v_cpu_kill,
|
||||
#endif
|
||||
};
|
||||
CPU_METHOD_OF_DECLARE(m10v_smp, "socionext,milbeaut-m10v-smp", &m10v_smp_ops);
|
||||
|
||||
|
|
|
|||
|
|
@ -182,6 +182,7 @@ static struct resource latch1_resources[] = {
|
|||
|
||||
static struct bgpio_pdata latch1_pdata = {
|
||||
.label = LATCH1_LABEL,
|
||||
.base = -1,
|
||||
.ngpio = LATCH1_NGPIO,
|
||||
};
|
||||
|
||||
|
|
@ -219,6 +220,7 @@ static struct resource latch2_resources[] = {
|
|||
|
||||
static struct bgpio_pdata latch2_pdata = {
|
||||
.label = LATCH2_LABEL,
|
||||
.base = -1,
|
||||
.ngpio = LATCH2_NGPIO,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -250,8 +250,10 @@ static int __init omapdss_init_of(void)
|
|||
if (!node)
|
||||
return 0;
|
||||
|
||||
if (!of_device_is_available(node))
|
||||
if (!of_device_is_available(node)) {
|
||||
of_node_put(node);
|
||||
return 0;
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(node);
|
||||
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ struct platform_device iop3xx_dma_0_channel = {
|
|||
.resource = iop3xx_dma_0_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop3xx_dma_0_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -155,7 +155,7 @@ struct platform_device iop3xx_dma_1_channel = {
|
|||
.resource = iop3xx_dma_1_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop3xx_dma_1_data,
|
||||
},
|
||||
};
|
||||
|
|
@ -167,7 +167,7 @@ struct platform_device iop3xx_aau_channel = {
|
|||
.resource = iop3xx_aau_resources,
|
||||
.dev = {
|
||||
.dma_mask = &iop3xx_adma_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = (void *) &iop3xx_aau_data,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -622,7 +622,7 @@ static struct platform_device orion_xor0_shared = {
|
|||
.resource = orion_xor0_shared_resources,
|
||||
.dev = {
|
||||
.dma_mask = &orion_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &orion_xor0_pdata,
|
||||
},
|
||||
};
|
||||
|
|
@ -683,7 +683,7 @@ static struct platform_device orion_xor1_shared = {
|
|||
.resource = orion_xor1_shared_resources,
|
||||
.dev = {
|
||||
.dma_mask = &orion_xor_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(64),
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &orion_xor1_pdata,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -159,7 +159,6 @@ config ARM64
|
|||
select IRQ_DOMAIN
|
||||
select IRQ_FORCED_THREADING
|
||||
select MODULES_USE_ELF_RELA
|
||||
select MULTI_IRQ_HANDLER
|
||||
select NEED_DMA_MAP_STATE
|
||||
select NEED_SG_DMA_LENGTH
|
||||
select OF
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ config ARCH_BCM2835
|
|||
bool "Broadcom BCM2835 family"
|
||||
select TIMER_OF
|
||||
select GPIOLIB
|
||||
select MFD_CORE
|
||||
select PINCTRL
|
||||
select PINCTRL_BCM2835
|
||||
select ARM_AMBA
|
||||
|
|
|
|||
|
|
@ -162,6 +162,7 @@
|
|||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
iommus = <&smmu 1>;
|
||||
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -179,6 +180,7 @@
|
|||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
iommus = <&smmu 2>;
|
||||
altr,sysmgr-syscon = <&sysmgr 0x48 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -196,6 +198,7 @@
|
|||
rx-fifo-depth = <16384>;
|
||||
snps,multicast-filter-bins = <256>;
|
||||
iommus = <&smmu 3>;
|
||||
altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -321,7 +321,6 @@
|
|||
nvidia,default-trim = <0x9>;
|
||||
nvidia,dqs-trim = <63>;
|
||||
mmc-hs400-1_8v;
|
||||
supports-cqe;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Device Tree Source for the RZ/G2E (R8A774C0) SoC
|
||||
*
|
||||
* Copyright (C) 2018 Renesas Electronics Corp.
|
||||
* Copyright (C) 2018-2019 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
|
||||
|
|
@ -1150,9 +1150,8 @@
|
|||
<&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
|
||||
<&dmac2 0x5b>, <&dmac2 0x5a>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 202>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Device Tree Source for the R-Car E3 (R8A77990) SoC
|
||||
*
|
||||
* Copyright (C) 2018 Renesas Electronics Corp.
|
||||
* Copyright (C) 2018-2019 Renesas Electronics Corp.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/r8a77990-cpg-mssr.h>
|
||||
|
|
@ -1067,9 +1067,8 @@
|
|||
<&cpg CPG_CORE R8A77990_CLK_S3D1C>,
|
||||
<&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
|
||||
<&dmac2 0x5b>, <&dmac2 0x5a>;
|
||||
dma-names = "tx", "rx", "tx", "rx";
|
||||
dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
|
||||
dma-names = "tx", "rx";
|
||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 202>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -108,8 +108,8 @@
|
|||
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
snps,reset-delays-us = <0 10000 50000>;
|
||||
tx_delay = <0x25>;
|
||||
rx_delay = <0x11>;
|
||||
tx_delay = <0x24>;
|
||||
rx_delay = <0x18>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -46,8 +46,7 @@
|
|||
|
||||
vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb20_host_drv>;
|
||||
regulator-name = "vcc_host1_5v";
|
||||
|
|
|
|||
|
|
@ -1445,11 +1445,11 @@
|
|||
|
||||
sdmmc0 {
|
||||
sdmmc0_clk: sdmmc0-clk {
|
||||
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>;
|
||||
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_cmd: sdmmc0-cmd {
|
||||
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>;
|
||||
rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_dectn: sdmmc0-dectn {
|
||||
|
|
@ -1461,14 +1461,14 @@
|
|||
};
|
||||
|
||||
sdmmc0_bus1: sdmmc0-bus1 {
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>;
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_bus4: sdmmc0-bus4 {
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_4ma>,
|
||||
<1 RK_PA1 1 &pcfg_pull_up_4ma>,
|
||||
<1 RK_PA2 1 &pcfg_pull_up_4ma>,
|
||||
<1 RK_PA3 1 &pcfg_pull_up_4ma>;
|
||||
rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
|
||||
<1 RK_PA1 1 &pcfg_pull_up_8ma>,
|
||||
<1 RK_PA2 1 &pcfg_pull_up_8ma>,
|
||||
<1 RK_PA3 1 &pcfg_pull_up_8ma>;
|
||||
};
|
||||
|
||||
sdmmc0_gpio: sdmmc0-gpio {
|
||||
|
|
@ -1642,50 +1642,50 @@
|
|||
rgmiim1_pins: rgmiim1-pins {
|
||||
rockchip,pins =
|
||||
/* mac_txclk */
|
||||
<1 RK_PB4 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PB4 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_rxclk */
|
||||
<1 RK_PB5 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB5 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_mdio */
|
||||
<1 RK_PC3 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC3 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_txen */
|
||||
<1 RK_PD1 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PD1 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_clk */
|
||||
<1 RK_PC5 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC5 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxdv */
|
||||
<1 RK_PC6 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC6 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_mdc */
|
||||
<1 RK_PC7 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PC7 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxd1 */
|
||||
<1 RK_PB2 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB2 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxd0 */
|
||||
<1 RK_PB3 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB3 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_txd1 */
|
||||
<1 RK_PB0 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PB0 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd0 */
|
||||
<1 RK_PB1 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PB1 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_rxd3 */
|
||||
<1 RK_PB6 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB6 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_rxd2 */
|
||||
<1 RK_PB7 2 &pcfg_pull_none_2ma>,
|
||||
<1 RK_PB7 2 &pcfg_pull_none_4ma>,
|
||||
/* mac_txd3 */
|
||||
<1 RK_PC0 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PC0 2 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd2 */
|
||||
<1 RK_PC1 2 &pcfg_pull_none_12ma>,
|
||||
<1 RK_PC1 2 &pcfg_pull_none_8ma>,
|
||||
|
||||
/* mac_txclk */
|
||||
<0 RK_PB0 1 &pcfg_pull_none>,
|
||||
<0 RK_PB0 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txen */
|
||||
<0 RK_PB4 1 &pcfg_pull_none>,
|
||||
<0 RK_PB4 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_clk */
|
||||
<0 RK_PD0 1 &pcfg_pull_none>,
|
||||
<0 RK_PD0 1 &pcfg_pull_none_4ma>,
|
||||
/* mac_txd1 */
|
||||
<0 RK_PC0 1 &pcfg_pull_none>,
|
||||
<0 RK_PC0 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd0 */
|
||||
<0 RK_PC1 1 &pcfg_pull_none>,
|
||||
<0 RK_PC1 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd3 */
|
||||
<0 RK_PC7 1 &pcfg_pull_none>,
|
||||
<0 RK_PC7 1 &pcfg_pull_none_8ma>,
|
||||
/* mac_txd2 */
|
||||
<0 RK_PC6 1 &pcfg_pull_none>;
|
||||
<0 RK_PC6 1 &pcfg_pull_none_8ma>;
|
||||
};
|
||||
|
||||
rmiim1_pins: rmiim1-pins {
|
||||
|
|
|
|||
|
|
@ -158,6 +158,7 @@
|
|||
};
|
||||
|
||||
&hdmi {
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_cec>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -77,6 +77,7 @@
|
|||
#define ARM_CPU_IMP_QCOM 0x51
|
||||
#define ARM_CPU_IMP_NVIDIA 0x4E
|
||||
#define ARM_CPU_IMP_FUJITSU 0x46
|
||||
#define ARM_CPU_IMP_HISI 0x48
|
||||
|
||||
#define ARM_CPU_PART_AEM_V8 0xD0F
|
||||
#define ARM_CPU_PART_FOUNDATION 0xD00
|
||||
|
|
@ -107,6 +108,8 @@
|
|||
|
||||
#define FUJITSU_CPU_PART_A64FX 0x001
|
||||
|
||||
#define HISI_CPU_PART_TSV110 0xD01
|
||||
|
||||
#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)
|
||||
#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)
|
||||
#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)
|
||||
|
|
@ -126,10 +129,11 @@
|
|||
#define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)
|
||||
#define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)
|
||||
#define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)
|
||||
#define MIDR_HISI_TSV110 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV110)
|
||||
|
||||
/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */
|
||||
#define MIDR_FUJITSU_ERRATUM_010001 MIDR_FUJITSU_A64FX
|
||||
#define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_VARIANT(1))
|
||||
#define MIDR_FUJITSU_ERRATUM_010001_MASK (~MIDR_CPU_VAR_REV(1, 0))
|
||||
#define TCR_CLEAR_FUJITSU_ERRATUM_010001 (TCR_NFD1 | TCR_NFD0)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue