qlge: Add defines for firmware support.
Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ron Mercer
David S. Miller
parent
036b66879a
commit
b82808b759
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@ -164,7 +164,7 @@ enum {
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CSR_RP = (1 << 10),
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CSR_CMD_PARM_SHIFT = 22,
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CSR_CMD_NOP = 0x00000000,
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CSR_CMD_SET_RST = 0x1000000,
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CSR_CMD_SET_RST = 0x10000000,
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CSR_CMD_CLR_RST = 0x20000000,
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CSR_CMD_SET_PAUSE = 0x30000000,
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CSR_CMD_CLR_PAUSE = 0x40000000,
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@ -424,7 +424,7 @@ enum {
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RX_SYMBOL_ERR = 0x00000370,
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RX_MAC_ERR = 0x00000378,
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RX_CTL_PKTS = 0x00000380,
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RX_PAUSE_PKTS = 0x00000384,
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RX_PAUSE_PKTS = 0x00000388,
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RX_64_PKTS = 0x00000390,
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RX_65_TO_127_PKTS = 0x00000398,
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RX_128_255_PKTS = 0x000003a0,
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@ -733,6 +733,11 @@ enum {
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AEN_LINK_DOWN = 0x00008012,
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AEN_IDC_CMPLT = 0x00008100,
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AEN_IDC_REQ = 0x00008101,
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AEN_IDC_EXT = 0x00008102,
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AEN_DCBX_CHG = 0x00008110,
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AEN_AEN_LOST = 0x00008120,
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AEN_AEN_SFP_IN = 0x00008130,
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AEN_AEN_SFP_OUT = 0x00008131,
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AEN_FW_INIT_DONE = 0x00008400,
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AEN_FW_INIT_FAIL = 0x00008401,
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@ -742,40 +747,48 @@ enum {
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MB_CMD_MB_TEST = 0x00000006,
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MB_CMD_CSUM_TEST = 0x00000007, /* Verify Checksum */
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MB_CMD_ABOUT_FW = 0x00000008,
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MB_CMD_COPY_RISC_RAM = 0x0000000a,
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MB_CMD_LOAD_RISC_RAM = 0x0000000b,
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MB_CMD_DUMP_RISC_RAM = 0x0000000c,
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MB_CMD_WRITE_RAM = 0x0000000d,
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MB_CMD_INIT_RISC_RAM = 0x0000000e,
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MB_CMD_READ_RAM = 0x0000000f,
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MB_CMD_STOP_FW = 0x00000014,
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MB_CMD_MAKE_SYS_ERR = 0x0000002a,
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MB_CMD_WRITE_SFP = 0x00000030,
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MB_CMD_READ_SFP = 0x00000031,
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MB_CMD_INIT_FW = 0x00000060,
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MB_CMD_GET_INIT_CB = 0x00000061,
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MB_CMD_GET_IFCB = 0x00000061,
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MB_CMD_GET_FW_STATE = 0x00000069,
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MB_CMD_IDC_REQ = 0x00000100, /* Inter-Driver Communication */
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MB_CMD_IDC_ACK = 0x00000101, /* Inter-Driver Communication */
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MB_CMD_SET_WOL_MODE = 0x00000110, /* Wake On Lan */
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MB_WOL_DISABLE = 0x00000000,
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MB_WOL_MAGIC_PKT = 0x00000001,
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MB_WOL_FLTR = 0x00000002,
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MB_WOL_UCAST = 0x00000004,
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MB_WOL_MCAST = 0x00000008,
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MB_WOL_BCAST = 0x00000010,
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MB_WOL_LINK_UP = 0x00000020,
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MB_WOL_LINK_DOWN = 0x00000040,
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MB_WOL_DISABLE = 0,
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MB_WOL_MAGIC_PKT = (1 << 1),
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MB_WOL_FLTR = (1 << 2),
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MB_WOL_UCAST = (1 << 3),
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MB_WOL_MCAST = (1 << 4),
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MB_WOL_BCAST = (1 << 5),
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MB_WOL_LINK_UP = (1 << 6),
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MB_WOL_LINK_DOWN = (1 << 7),
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MB_CMD_SET_WOL_FLTR = 0x00000111, /* Wake On Lan Filter */
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MB_CMD_CLEAR_WOL_FLTR = 0x00000112, /* Wake On Lan Filter */
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MB_CMD_CLEAR_WOL_FLTR = 0x00000112, /* Wake On Lan Filter */
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MB_CMD_SET_WOL_MAGIC = 0x00000113, /* Wake On Lan Magic Packet */
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MB_CMD_CLEAR_WOL_MAGIC = 0x00000114, /* Wake On Lan Magic Packet */
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MB_CMD_CLEAR_WOL_MAGIC = 0x00000114,/* Wake On Lan Magic Packet */
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MB_CMD_SET_WOL_IMMED = 0x00000115,
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MB_CMD_PORT_RESET = 0x00000120,
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MB_CMD_SET_PORT_CFG = 0x00000122,
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MB_CMD_GET_PORT_CFG = 0x00000123,
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MB_CMD_SET_ASIC_VOLTS = 0x00000130,
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MB_CMD_GET_SNS_DATA = 0x00000131, /* Temp and Volt Sense data. */
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MB_CMD_GET_LINK_STS = 0x00000124,
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/* Mailbox Command Status. */
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MB_CMD_STS_GOOD = 0x00004000, /* Success. */
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MB_CMD_STS_INTRMDT = 0x00001000, /* Intermediate Complete. */
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MB_CMD_STS_ERR = 0x00004005, /* Error. */
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MB_CMD_STS_INVLD_CMD = 0x00004001, /* Invalid. */
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MB_CMD_STS_XFC_ERR = 0x00004002, /* Interface Error. */
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MB_CMD_STS_CSUM_ERR = 0x00004003, /* Csum Error. */
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MB_CMD_STS_ERR = 0x00004005, /* System Error. */
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MB_CMD_STS_PARAM_ERR = 0x00004006, /* Parameter Error. */
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};
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struct mbox_params {
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@ -967,6 +980,7 @@ struct ib_mac_iocb_rsp {
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__le16 vlan_id; /* 12 bits */
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#define IB_MAC_IOCB_RSP_C 0x1000 /* VLAN CFI bit */
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#define IB_MAC_IOCB_RSP_COS_SHIFT 12 /* class of service value */
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#define IB_MAC_IOCB_RSP_VLAN_MASK 0x0ffff
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__le16 reserved1;
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__le32 reserved2[6];
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@ -1032,6 +1046,7 @@ struct wqicb {
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#define Q_LEN_CPP_16 0x0001
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#define Q_LEN_CPP_32 0x0002
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#define Q_LEN_CPP_64 0x0003
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#define Q_LEN_CPP_512 0x0006
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__le16 flags;
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#define Q_PRI_SHIFT 1
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#define Q_FLAGS_LC 0x1000
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@ -1313,27 +1328,43 @@ enum {
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QL_DMA64 = (1 << 5),
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QL_PROMISCUOUS = (1 << 6),
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QL_ALLMULTI = (1 << 7),
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QL_PORT_CFG = (1 << 8),
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QL_CAM_RT_SET = (1 << 9),
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};
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/* link_status bit definitions */
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enum {
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LOOPBACK_MASK = 0x00000700,
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LOOPBACK_PCS = 0x00000100,
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LOOPBACK_HSS = 0x00000200,
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LOOPBACK_EXT = 0x00000300,
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PAUSE_MASK = 0x000000c0,
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PAUSE_STD = 0x00000040,
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PAUSE_PRI = 0x00000080,
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SPEED_MASK = 0x00000038,
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SPEED_100Mb = 0x00000000,
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SPEED_1Gb = 0x00000008,
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SPEED_10Gb = 0x00000010,
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LINK_TYPE_MASK = 0x00000007,
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LINK_TYPE_XFI = 0x00000001,
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LINK_TYPE_XAUI = 0x00000002,
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LINK_TYPE_XFI_BP = 0x00000003,
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LINK_TYPE_XAUI_BP = 0x00000004,
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LINK_TYPE_10GBASET = 0x00000005,
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STS_LOOPBACK_MASK = 0x00000700,
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STS_LOOPBACK_PCS = 0x00000100,
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STS_LOOPBACK_HSS = 0x00000200,
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STS_LOOPBACK_EXT = 0x00000300,
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STS_PAUSE_MASK = 0x000000c0,
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STS_PAUSE_STD = 0x00000040,
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STS_PAUSE_PRI = 0x00000080,
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STS_SPEED_MASK = 0x00000038,
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STS_SPEED_100Mb = 0x00000000,
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STS_SPEED_1Gb = 0x00000008,
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STS_SPEED_10Gb = 0x00000010,
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STS_LINK_TYPE_MASK = 0x00000007,
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STS_LINK_TYPE_XFI = 0x00000001,
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STS_LINK_TYPE_XAUI = 0x00000002,
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STS_LINK_TYPE_XFI_BP = 0x00000003,
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STS_LINK_TYPE_XAUI_BP = 0x00000004,
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STS_LINK_TYPE_10GBASET = 0x00000005,
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};
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/* link_config bit definitions */
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enum {
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CFG_JUMBO_FRAME_SIZE = 0x00010000,
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CFG_PAUSE_MASK = 0x00000060,
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CFG_PAUSE_STD = 0x00000020,
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CFG_PAUSE_PRI = 0x00000040,
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CFG_DCBX = 0x00000010,
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CFG_LOOPBACK_MASK = 0x00000007,
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CFG_LOOPBACK_PCS = 0x00000002,
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CFG_LOOPBACK_HSS = 0x00000004,
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CFG_LOOPBACK_EXT = 0x00000006,
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CFG_DEFAULT_MAX_FRAME_SIZE = 0x00002580,
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};
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/*
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@ -271,7 +271,8 @@ static int ql_get_settings(struct net_device *ndev,
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ecmd->advertising = ADVERTISED_10000baseT_Full;
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ecmd->autoneg = AUTONEG_ENABLE;
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ecmd->transceiver = XCVR_EXTERNAL;
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if ((qdev->link_status & LINK_TYPE_MASK) == LINK_TYPE_10GBASET) {
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if ((qdev->link_status & STS_LINK_TYPE_MASK) ==
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STS_LINK_TYPE_10GBASET) {
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ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
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ecmd->advertising |= (ADVERTISED_TP | ADVERTISED_Autoneg);
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ecmd->port = PORT_TP;
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