arm64 fixes:
- Don't taint the kernel if CPUs have different sets of page sizes supported (other than the one in use). - Issue I-cache maintenance for module ftrace trampoline. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl1W5VMACgkQa9axLQDI XvFAWQ//RrxMHeN7/Ynv1MDqucZlMpQJMUV2V0K5wYO6ZwGMKYXw62SBzb9AMv0y iFhYNZbtBoE2JhLNEfwhdNkk9NfUsKbUcfyt0cono2DU1tVihmmVqbNbairNhKVo j7vxnCx8SMQ5ZT+QaTpKUddzlzb4jdycXGYaje62bbA19BCOVVIuy61wGNtHP4IU 817RHqIj6aqIbmplt79+Q3vOopB8BbxrnpC5cp8rw1CKbfu7kQN4zePIA4Z4bhag G5hm+aTV1qzrmEud2WkuA7044vsw2Wkd/8gksRyQKkypfqfQ3NrASDn3xGqOi/5t 2DsyJPaVUC1tsJdrVqpfWZfLJJ8FGyox7aeXL7OdPrfWP6HI9jJnodRVH/av97g6 psaSoJNxXbVqrg/wva6i2f25KBYdp/vQW0Nmjljvt4dmEDrE/jpifAYAH/LUmi5H fMNXyOdeDcgUoVfcEk/S1leiDf0gUy+B8ylknk12knbMuk/9ATq/2H3RKqrRJYWL qUQBvB04d7NHZl8wl+IVLlK8g4x5Jeetjm7GHvLbOp9agb63kwVFq50c4zD052LA eKy6LbUO2xHyA3PrtvBem/hKZ/GCTh0o0xcwUkyNcsLUHfKnMcHLEH/WWd5rmYIQ xvbQVhVORR8ru7eCQCRMBmjGaHFz2ZQa4Q3V3qVBnX+q/F6dku8= =VneQ -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: - Don't taint the kernel if CPUs have different sets of page sizes supported (other than the one in use). - Issue I-cache maintenance for module ftrace trampoline. * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: ftrace: Ensure module ftrace trampoline is coherent with I-side arm64: cpufeature: Don't treat granule sizes as strict
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commit
b7e7c85dc7
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@ -184,9 +184,17 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {
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};
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static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = {
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S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI),
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S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI),
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI),
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/*
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* We already refuse to boot CPUs that don't support our configured
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* page size, so we can only detect mismatches for a page size other
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* than the one we're currently using. Unfortunately, SoCs like this
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* exist in the wild so, even though we don't like it, we'll have to go
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* along with it and treat them as non-strict.
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*/
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S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI),
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S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI),
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI),
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_BIGENDEL0_SHIFT, 4, 0),
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/* Linux shouldn't care about secure memory */
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_SNSMEM_SHIFT, 4, 0),
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@ -73,7 +73,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
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if (offset < -SZ_128M || offset >= SZ_128M) {
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#ifdef CONFIG_ARM64_MODULE_PLTS
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struct plt_entry trampoline;
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struct plt_entry trampoline, *dst;
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struct module *mod;
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/*
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@ -106,23 +106,27 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
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* to check if the actual opcodes are in fact identical,
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* regardless of the offset in memory so use memcmp() instead.
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*/
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trampoline = get_plt_entry(addr, mod->arch.ftrace_trampoline);
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if (memcmp(mod->arch.ftrace_trampoline, &trampoline,
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sizeof(trampoline))) {
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if (plt_entry_is_initialized(mod->arch.ftrace_trampoline)) {
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dst = mod->arch.ftrace_trampoline;
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trampoline = get_plt_entry(addr, dst);
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if (memcmp(dst, &trampoline, sizeof(trampoline))) {
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if (plt_entry_is_initialized(dst)) {
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pr_err("ftrace: far branches to multiple entry points unsupported inside a single module\n");
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return -EINVAL;
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}
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/* point the trampoline to our ftrace entry point */
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module_disable_ro(mod);
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*mod->arch.ftrace_trampoline = trampoline;
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*dst = trampoline;
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module_enable_ro(mod, true);
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/* update trampoline before patching in the branch */
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smp_wmb();
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/*
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* Ensure updated trampoline is visible to instruction
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* fetch before we patch in the branch.
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*/
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__flush_icache_range((unsigned long)&dst[0],
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(unsigned long)&dst[1]);
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}
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addr = (unsigned long)(void *)mod->arch.ftrace_trampoline;
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addr = (unsigned long)dst;
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#else /* CONFIG_ARM64_MODULE_PLTS */
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return -EINVAL;
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#endif /* CONFIG_ARM64_MODULE_PLTS */
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