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sh: pci: Disable MWI and make pci_dma_burst_advice() a bit more accurate. 

None of the SH PCI controllers support MWI, it is always treated as a
direct memory write, so simply disable it outright. In the case of the
PCI cache line size, consult that for the pci_dma_burst_advice()
strategy, and switch over to PCI_DMA_BURST_MULTIPLE, as PPC64.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2009-05-26 23:13:13 +09:00
parent d076d2bd0d
commit b7e2ac6194
1 changed files with 18 additions and 2 deletions
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20
arch/sh/include/asm/pci.h
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@ -89,12 +89,28 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
#endif #endif
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
/*
* None of the SH PCI controllers support MWI, it is always treated as a
* direct memory write.
*/
#define PCI_DISABLE_MWI
static inline void pci_dma_burst_advice(struct pci_dev *pdev, static inline void pci_dma_burst_advice(struct pci_dev *pdev,
enum pci_dma_burst_strategy *strat, enum pci_dma_burst_strategy *strat,
unsigned long *strategy_parameter) unsigned long *strategy_parameter)
{ {
*strat = PCI_DMA_BURST_INFINITY; unsigned long cacheline_size;
*strategy_parameter = ~0UL; u8 byte;
pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
if (byte == 0)
cacheline_size = L1_CACHE_BYTES;
else
cacheline_size = byte << 2;
*strat = PCI_DMA_BURST_MULTIPLE;
*strategy_parameter = cacheline_size;
} }
#endif #endif