aty128fb: Properly save PCI state before changing PCI PM level
This fixes aty128fb to properly save the PCI config space -before- it potentially switches the PM state of the chip. This avoids a warning with the new PM core and is the right thing to do anyway. I also replaced the hand-coded switch to D2 with a call to the genericc pci_set_power_state() and removed the code that switches it back to D0 since the generic code is doing that for us nowadays. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -2374,6 +2374,8 @@ static void aty128_set_suspend(struct aty128fb_par *par, int suspend)
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/* Set the chip into the appropriate suspend mode (we use D2,
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* D3 would require a complete re-initialisation of the chip,
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* including PCI config registers, clocks, AGP configuration, ...)
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*
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* For resume, the core will have already brought us back to D0
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*/
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if (suspend) {
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/* Make sure CRTC2 is reset. Remove that the day we decide to
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@ -2391,17 +2393,9 @@ static void aty128_set_suspend(struct aty128fb_par *par, int suspend)
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aty_st_le32(BUS_CNTL1, 0x00000010);
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aty_st_le32(MEM_POWER_MISC, 0x0c830000);
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mdelay(100);
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pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
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/* Switch PCI power management to D2 */
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pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL,
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(pwr_command & ~PCI_PM_CTRL_STATE_MASK) | 2);
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pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
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} else {
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/* Switch back PCI power management to D0 */
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mdelay(100);
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pci_write_config_word(pdev, par->pm_reg+PCI_PM_CTRL, 0);
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pci_read_config_word(pdev, par->pm_reg+PCI_PM_CTRL, &pwr_command);
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mdelay(100);
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pci_set_power_state(pdev, PCI_D2);
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}
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}
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@ -2410,6 +2404,12 @@ static int aty128_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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struct fb_info *info = pci_get_drvdata(pdev);
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struct aty128fb_par *par = info->par;
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/* Because we may change PCI D state ourselves, we need to
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* first save the config space content so the core can
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* restore it properly on resume.
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*/
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pci_save_state(pdev);
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/* We don't do anything but D2, for now we return 0, but
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* we may want to change that. How do we know if the BIOS
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* can properly take care of D3 ? Also, with swsusp, we
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@ -2476,6 +2476,11 @@ static int aty128_do_resume(struct pci_dev *pdev)
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if (pdev->dev.power.power_state.event == PM_EVENT_ON)
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return 0;
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/* PCI state will have been restored by the core, so
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* we should be in D0 now with our config space fully
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* restored
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*/
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/* Wakeup chip */
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aty128_set_suspend(par, 0);
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par->asleep = 0;
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