ARM: perf: extend interrupt-affinity property for PPIs
On systems containing multiple, heterogeneous clusters we need a way to associate a PMU "device" with the CPU(s) on which it exists. For PMUs that signal overflow with SPIs, this relationship is determined via the "interrupt-affinity" property, which contains a list of phandles to CPU nodes for the PMU. For PMUs using PPIs, the per-cpu nature of the interrupt isn't enough to determine the set of CPUs which actually contain the device. This patch allows the interrupt-affinity property to be specified on a PMU node irrespective of the interrupt type. For PPIs, it identifies the set of CPUs signalling the PPI in question. Tested-by: Stephen Boyd <sboyd@codeaurora.org> # Krait PMU Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -26,13 +26,19 @@ Required properties:
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Optional properties:
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- interrupt-affinity : Valid only when using SPIs, specifies a list of phandles
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to CPU nodes corresponding directly to the affinity of
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- interrupt-affinity : When using SPIs, specifies a list of phandles to CPU
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nodes corresponding directly to the affinity of
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the SPIs listed in the interrupts property.
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This property should be present when there is more than
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When using a PPI, specifies a list of phandles to CPU
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nodes corresponding to the set of CPUs which have
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a PMU of this type signalling the PPI listed in the
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interrupts property.
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This property should be present when there is more than
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a single SPI.
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- qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd
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events.
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@ -790,32 +790,39 @@ static int probe_current_pmu(struct arm_pmu *pmu,
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static int of_pmu_irq_cfg(struct arm_pmu *pmu)
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{
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int i, irq, *irqs;
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int *irqs, i = 0;
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bool using_spi = false;
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struct platform_device *pdev = pmu->plat_device;
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/* Don't bother with PPIs; they're already affine */
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irq = platform_get_irq(pdev, 0);
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if (irq >= 0 && irq_is_percpu(irq)) {
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cpumask_setall(&pmu->supported_cpus);
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return 0;
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}
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irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
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if (!irqs)
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return -ENOMEM;
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for (i = 0; i < pdev->num_resources; ++i) {
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do {
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struct device_node *dn;
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int cpu;
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int cpu, irq;
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dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity",
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i);
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if (!dn) {
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pr_warn("Failed to parse %s/interrupt-affinity[%d]\n",
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of_node_full_name(pdev->dev.of_node), i);
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/* See if we have an affinity entry */
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dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity", i);
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if (!dn)
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break;
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/* Check the IRQ type and prohibit a mix of PPIs and SPIs */
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irq = platform_get_irq(pdev, i);
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if (irq >= 0) {
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bool spi = !irq_is_percpu(irq);
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if (i > 0 && spi != using_spi) {
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pr_err("PPI/SPI IRQ type mismatch for %s!\n",
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dn->name);
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kfree(irqs);
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return -EINVAL;
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}
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using_spi = spi;
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}
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/* Now look up the logical CPU number */
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for_each_possible_cpu(cpu)
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if (arch_find_n_match_cpu_physical_id(dn, cpu, NULL))
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break;
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@ -824,20 +831,36 @@ static int of_pmu_irq_cfg(struct arm_pmu *pmu)
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pr_warn("Failed to find logical CPU for %s\n",
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dn->name);
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of_node_put(dn);
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cpumask_setall(&pmu->supported_cpus);
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break;
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}
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of_node_put(dn);
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irqs[i] = cpu;
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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}
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/* For SPIs, we need to track the affinity per IRQ */
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if (using_spi) {
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if (i >= pdev->num_resources) {
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of_node_put(dn);
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break;
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}
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if (i == pdev->num_resources) {
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pmu->irq_affinity = irqs;
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} else {
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kfree(irqs);
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irqs[i] = cpu;
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}
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/* Keep track of the CPUs containing this PMU type */
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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of_node_put(dn);
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i++;
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} while (1);
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/* If we didn't manage to parse anything, claim to support all CPUs */
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if (cpumask_weight(&pmu->supported_cpus) == 0)
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cpumask_setall(&pmu->supported_cpus);
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}
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/* If we matched up the IRQ affinities, use them to route the SPIs */
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if (using_spi && i == pdev->num_resources)
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pmu->irq_affinity = irqs;
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else
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kfree(irqs);
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return 0;
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}
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