arm: dts: zynqmp: DT changes for v4.19
- Use serdev for BT in zcu100 - Remove ep108 - Fix gpio-keys binding - Add suport for Ultra96 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAltQQncACgkQykllyylKDCGrfwCdGu2vhgN9ydfYvzpzBZPoj9/e IyYAn362LTeqkYOBUzAebB6XrS1kBSA9 =Np12 -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx into next/dt arm: dts: zynqmp: DT changes for v4.19 - Use serdev for BT in zcu100 - Remove ep108 - Fix gpio-keys binding - Add suport for Ultra96 * tag 'zynqmp-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx: arm64: dts: zynqmp: Add support for Avnet Ultra96 rev1 board arm64: dts: zynqmp: Remove #address/#size-cells from gpio-keys arm64: dts: zynqmp: Remove ep108 board arm64: dts: zynqmp: Use serdev for zcu100 BT Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
b68f95a5ec
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@ -1,5 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-ep108.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += avnet-ultra96-rev1.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1232-revA.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1254-revA.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1275-revA.dtb
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@ -0,0 +1,19 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Avnet Ultra96 rev1
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*
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* (C) Copyright 2018, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*/
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/dts-v1/;
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#include "zynqmp-zcu100-revC.dts"
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/ {
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model = "Avnet Ultra96 Rev1";
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compatible = "avnet,ultra96-rev1", "avnet,ultra96",
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"xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100",
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"xlnx,zynqmp";
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};
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@ -1,137 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* clock specification for Xilinx ZynqMP ep108 development board
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*
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* (C) Copyright 2015, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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/ {
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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i2c_clk: i2c_clk {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <111111111>;
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};
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sata_clk: sata_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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};
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clk100: clk100 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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clk600: clk600 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <600000000>;
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};
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};
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&can0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&can1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&fpd_dma_chan1 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan2 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan3 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan4 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan5 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan6 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan7 {
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clocks = <&clk600>, <&clk100>;
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};
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&fpd_dma_chan8 {
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clocks = <&clk600>, <&clk100>;
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};
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&gem0 {
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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};
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&gpio {
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clocks = <&misc_clk>;
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};
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&i2c0 {
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clocks = <&i2c_clk>;
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};
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&i2c1 {
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clocks = <&i2c_clk>;
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};
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&sata {
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clocks = <&sata_clk>;
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};
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&sdhci0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&sdhci1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&spi0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&spi1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&uart0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&usb0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&usb1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&watchdog0 {
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clocks= <&misc_clk>;
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};
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@ -1,154 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Xilinx ZynqMP ep108 development board
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*
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* (C) Copyright 2014 - 2015, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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/dts-v1/;
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#include "zynqmp.dtsi"
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#include "zynqmp-ep108-clk.dtsi"
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/ {
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model = "ZynqMP EP108";
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aliases {
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x40000000>;
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};
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&gem0 {
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status = "okay";
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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phy0: phy@0 {
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reg = <0>;
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max-speed = <100>;
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};
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};
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&gpio {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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eeprom@54 {
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compatible = "atmel,24c64";
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reg = <0x54>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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eeprom@55 {
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compatible = "atmel,24c64";
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reg = <0x55>;
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};
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};
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&sata {
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status = "okay";
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ceva,broken-gen2;
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/* SATA Phy OOB timing settings */
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ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
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ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
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ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
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ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>;
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ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
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ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
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ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
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ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>;
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};
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&sdhci0 {
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status = "okay";
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bus-width = <8>;
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};
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&sdhci1 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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num-cs = <1>;
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spi0_flash0: spi0_flash0@0 {
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compatible = "m25p80";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi0_flash0@0 {
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label = "spi0_flash0";
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reg = <0x0 0x100000>;
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};
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};
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};
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&spi1 {
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status = "okay";
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num-cs = <1>;
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spi1_flash0: spi1_flash0@0 {
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compatible = "m25p80";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi1_flash0@0 {
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label = "spi1_flash0";
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reg = <0x0 0x100000>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "peripheral";
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maximum-speed = "high-speed";
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};
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&usb1 {
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status = "okay";
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dr_mode = "host";
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maximum-speed = "high-speed";
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};
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&watchdog0 {
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status = "okay";
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};
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@ -44,8 +44,6 @@
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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sw4 {
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label = "sw4";
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@ -89,12 +87,6 @@
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gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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bt_power {
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label = "bt_power";
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gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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wmmcsdio_fixed: fixedregulator-mmcsdio {
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@ -267,6 +259,10 @@
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&uart0 {
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status = "okay";
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bluetooth {
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compatible = "ti,wl1831-st";
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enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
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};
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};
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&uart1 {
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@ -41,8 +41,6 @@
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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sw19 {
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label = "sw19";
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@ -41,8 +41,6 @@
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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sw19 {
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label = "sw19";
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@ -41,8 +41,6 @@
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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sw19 {
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label = "sw19";
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