nfp: bpf: expose command delay slots
Allow callers to control the delay slots of commands, instead of giving them just a wait/nowait choice. Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com> Reviewed-by: Quentin Monnet <quentin.monnet@netronome.com> Reviewed-by: Jiong Wang <jiong.wang@netronome.com> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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@ -103,23 +103,18 @@ nfp_prog_confirm_current_offset(struct nfp_prog *nfp_prog, unsigned int off)
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/* --- Emitters --- */
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static void
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__emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op,
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u8 mode, u8 xfer, u8 areg, u8 breg, u8 size, bool sync, bool indir)
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u8 mode, u8 xfer, u8 areg, u8 breg, u8 size, enum cmd_ctx_swap ctx,
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bool indir)
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{
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enum cmd_ctx_swap ctx;
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u64 insn;
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if (sync)
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ctx = CMD_CTX_SWAP;
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else
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ctx = CMD_CTX_NO_SWAP;
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insn = FIELD_PREP(OP_CMD_A_SRC, areg) |
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FIELD_PREP(OP_CMD_CTX, ctx) |
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FIELD_PREP(OP_CMD_B_SRC, breg) |
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FIELD_PREP(OP_CMD_TOKEN, cmd_tgt_act[op].token) |
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FIELD_PREP(OP_CMD_XFER, xfer) |
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FIELD_PREP(OP_CMD_CNT, size) |
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FIELD_PREP(OP_CMD_SIG, sync) |
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FIELD_PREP(OP_CMD_SIG, ctx != CMD_CTX_NO_SWAP) |
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FIELD_PREP(OP_CMD_TGT_CMD, cmd_tgt_act[op].tgt_cmd) |
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FIELD_PREP(OP_CMD_INDIR, indir) |
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FIELD_PREP(OP_CMD_MODE, mode);
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@ -129,7 +124,7 @@ __emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op,
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static void
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emit_cmd_any(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, u8 mode, u8 xfer,
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swreg lreg, swreg rreg, u8 size, bool sync, bool indir)
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swreg lreg, swreg rreg, u8 size, enum cmd_ctx_swap ctx, bool indir)
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{
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struct nfp_insn_re_regs reg;
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int err;
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@ -150,22 +145,22 @@ emit_cmd_any(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, u8 mode, u8 xfer,
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return;
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}
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__emit_cmd(nfp_prog, op, mode, xfer, reg.areg, reg.breg, size, sync,
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__emit_cmd(nfp_prog, op, mode, xfer, reg.areg, reg.breg, size, ctx,
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indir);
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}
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static void
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emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, u8 mode, u8 xfer,
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swreg lreg, swreg rreg, u8 size, bool sync)
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swreg lreg, swreg rreg, u8 size, enum cmd_ctx_swap ctx)
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{
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emit_cmd_any(nfp_prog, op, mode, xfer, lreg, rreg, size, sync, false);
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emit_cmd_any(nfp_prog, op, mode, xfer, lreg, rreg, size, ctx, false);
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}
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static void
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emit_cmd_indir(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, u8 mode, u8 xfer,
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swreg lreg, swreg rreg, u8 size, bool sync)
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swreg lreg, swreg rreg, u8 size, enum cmd_ctx_swap ctx)
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{
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emit_cmd_any(nfp_prog, op, mode, xfer, lreg, rreg, size, sync, true);
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emit_cmd_any(nfp_prog, op, mode, xfer, lreg, rreg, size, ctx, true);
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}
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static void
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@ -610,7 +605,7 @@ static int nfp_cpp_memcpy(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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/* Memory read from source addr into transfer-in registers. */
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emit_cmd_any(nfp_prog, CMD_TGT_READ32_SWAP,
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src_40bit_addr ? CMD_MODE_40b_BA : CMD_MODE_32b, 0,
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src_base, off, xfer_num - 1, true, len > 32);
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src_base, off, xfer_num - 1, CMD_CTX_SWAP, len > 32);
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/* Move from transfer-in to transfer-out. */
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for (i = 0; i < xfer_num; i++)
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@ -622,39 +617,39 @@ static int nfp_cpp_memcpy(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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/* Use single direct_ref write8. */
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emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 0,
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reg_a(meta->paired_st->dst_reg * 2), off, len - 1,
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true);
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CMD_CTX_SWAP);
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} else if (len <= 32 && IS_ALIGNED(len, 4)) {
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/* Use single direct_ref write32. */
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emit_cmd(nfp_prog, CMD_TGT_WRITE32_SWAP, CMD_MODE_32b, 0,
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reg_a(meta->paired_st->dst_reg * 2), off, xfer_num - 1,
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true);
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CMD_CTX_SWAP);
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} else if (len <= 32) {
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/* Use single indirect_ref write8. */
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wrp_immed(nfp_prog, reg_none(),
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CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, len - 1));
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emit_cmd_indir(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 0,
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reg_a(meta->paired_st->dst_reg * 2), off,
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len - 1, true);
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len - 1, CMD_CTX_SWAP);
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} else if (IS_ALIGNED(len, 4)) {
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/* Use single indirect_ref write32. */
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wrp_immed(nfp_prog, reg_none(),
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CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, xfer_num - 1));
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emit_cmd_indir(nfp_prog, CMD_TGT_WRITE32_SWAP, CMD_MODE_32b, 0,
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reg_a(meta->paired_st->dst_reg * 2), off,
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xfer_num - 1, true);
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xfer_num - 1, CMD_CTX_SWAP);
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} else if (len <= 40) {
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/* Use one direct_ref write32 to write the first 32-bytes, then
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* another direct_ref write8 to write the remaining bytes.
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*/
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emit_cmd(nfp_prog, CMD_TGT_WRITE32_SWAP, CMD_MODE_32b, 0,
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reg_a(meta->paired_st->dst_reg * 2), off, 7,
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true);
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CMD_CTX_SWAP);
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off = re_load_imm_any(nfp_prog, meta->paired_st->off + 32,
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imm_b(nfp_prog));
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emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 8,
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reg_a(meta->paired_st->dst_reg * 2), off, len - 33,
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true);
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CMD_CTX_SWAP);
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} else {
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/* Use one indirect_ref write32 to write 4-bytes aligned length,
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* then another direct_ref write8 to write the remaining bytes.
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@ -665,12 +660,12 @@ static int nfp_cpp_memcpy(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta)
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CMD_OVE_LEN | FIELD_PREP(CMD_OV_LEN, xfer_num - 2));
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emit_cmd_indir(nfp_prog, CMD_TGT_WRITE32_SWAP, CMD_MODE_32b, 0,
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reg_a(meta->paired_st->dst_reg * 2), off,
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xfer_num - 2, true);
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xfer_num - 2, CMD_CTX_SWAP);
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new_off = meta->paired_st->off + (xfer_num - 1) * 4;
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off = re_load_imm_any(nfp_prog, new_off, imm_b(nfp_prog));
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emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b,
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xfer_num - 1, reg_a(meta->paired_st->dst_reg * 2), off,
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(len & 0x3) - 1, true);
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(len & 0x3) - 1, CMD_CTX_SWAP);
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}
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/* TODO: The following extra load is to make sure data flow be identical
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@ -731,7 +726,7 @@ data_ld(struct nfp_prog *nfp_prog, swreg offset, u8 dst_gpr, int size)
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shift = size < 4 ? 4 - size : 0;
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emit_cmd(nfp_prog, CMD_TGT_READ8, CMD_MODE_32b, 0,
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pptr_reg(nfp_prog), offset, sz - 1, true);
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pptr_reg(nfp_prog), offset, sz - 1, CMD_CTX_SWAP);
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i = 0;
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if (shift)
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@ -761,7 +756,7 @@ data_ld_host_order(struct nfp_prog *nfp_prog, u8 dst_gpr,
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mask = size < 4 ? GENMASK(size - 1, 0) : 0;
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emit_cmd(nfp_prog, CMD_TGT_READ32_SWAP, mode, 0,
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lreg, rreg, sz / 4 - 1, true);
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lreg, rreg, sz / 4 - 1, CMD_CTX_SWAP);
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i = 0;
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if (mask)
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@ -841,7 +836,7 @@ data_stx_host_order(struct nfp_prog *nfp_prog, u8 dst_gpr, swreg offset,
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wrp_mov(nfp_prog, reg_xfer(i), reg_a(src_gpr + i));
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emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 0,
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reg_a(dst_gpr), offset, size - 1, true);
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reg_a(dst_gpr), offset, size - 1, CMD_CTX_SWAP);
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return 0;
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}
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@ -855,7 +850,7 @@ data_st_host_order(struct nfp_prog *nfp_prog, u8 dst_gpr, swreg offset,
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wrp_immed(nfp_prog, reg_xfer(1), imm >> 32);
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emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 0,
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reg_a(dst_gpr), offset, size - 1, true);
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reg_a(dst_gpr), offset, size - 1, CMD_CTX_SWAP);
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return 0;
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}
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@ -1876,7 +1871,7 @@ mem_ldx_data_init_pktcache(struct nfp_prog *nfp_prog,
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/* Cache memory into transfer-in registers. */
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emit_cmd_any(nfp_prog, CMD_TGT_READ32_SWAP, CMD_MODE_32b, 0, src_base,
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off, xfer_num - 1, true, indir);
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off, xfer_num - 1, CMD_CTX_SWAP, indir);
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}
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static int
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@ -2155,7 +2150,7 @@ mem_xadd(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, bool is64)
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FIELD_PREP(CMD_OV_LEN, 0x8 | is64 << 2));
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wrp_reg_or_subpart(nfp_prog, prev_alu, reg_b(src_gpr), 2, 2);
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emit_cmd_indir(nfp_prog, CMD_TGT_ADD_IMM, CMD_MODE_40b_BA, 0,
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addra, addrb, 0, false);
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addra, addrb, 0, CMD_CTX_NO_SWAP);
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return 0;
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}
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