sata_via: explain the magic fix
Add Joseph Chan's explanation of the problem and workaround to the VT6421 magic fix. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Joseph Chan <JosephChan@via.com.tw> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
parent
386f40c86d
commit
b475a3b83a
|
@ -578,10 +578,24 @@ static void svia_configure(struct pci_dev *pdev)
|
|||
|
||||
/*
|
||||
* vt6421 has problems talking to some drives. The following
|
||||
* is the magic fix from Joseph Chan <JosephChan@via.com.tw>.
|
||||
* Please add proper documentation if possible.
|
||||
* is the fix from Joseph Chan <JosephChan@via.com.tw>.
|
||||
*
|
||||
* When host issues HOLD, device may send up to 20DW of data
|
||||
* before acknowledging it with HOLDA and the host should be
|
||||
* able to buffer them in FIFO. Unfortunately, some WD drives
|
||||
* send upto 40DW before acknowledging HOLD and, in the
|
||||
* default configuration, this ends up overflowing vt6421's
|
||||
* FIFO, making the controller abort the transaction with
|
||||
* R_ERR.
|
||||
*
|
||||
* Rx52[2] is the internal 128DW FIFO Flow control watermark
|
||||
* adjusting mechanism enable bit and the default value 0
|
||||
* means host will issue HOLD to device when the left FIFO
|
||||
* size goes below 32DW. Setting it to 1 makes the watermark
|
||||
* 64DW.
|
||||
*
|
||||
* https://bugzilla.kernel.org/show_bug.cgi?id=15173
|
||||
* http://article.gmane.org/gmane.linux.ide/46352
|
||||
*/
|
||||
if (pdev->device == 0x3249) {
|
||||
pci_read_config_byte(pdev, 0x52, &tmp8);
|
||||
|
|
Loading…
Reference in New Issue