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i2c: tegra: Check DMA completion status in addition to left time 

It is more robust to check completion status in addition to the left time
in a case of DMA transfer because transfer's completion happens in two
phases [one is ISR, other is tasklet] and thus it is possible that DMA is
completed while I2C completion awaiting times out because of the deferred
notification done by the DMA driver. The DMA completion status becomes
100% actual after DMA synchronization. This fixes spurious DMA timeouts
when system is under load.

Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Dmitry Osipenko 2020-01-14 04:34:42 +03:00 committed by Wolfram Sang
parent 28d98666db
commit b3ec946975
1 changed files with 1 additions and 1 deletions
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2
drivers/i2c/busses/i2c-tegra.c
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@ -1224,7 +1224,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
i2c_dev->rx_dma_chan :
i2c_dev->tx_dma_chan);
if (time_left == 0) {
if (!time_left && !completion_done(&i2c_dev->dma_complete)) {
dev_err(i2c_dev->dev, "DMA transfer timeout\n");
tegra_i2c_init(i2c_dev, true);
return -ETIMEDOUT;