r8169: support the new RTL8411 chip.
Compared with previous chipsets, it needs no special action trough the
jumbo{enable/disable} helpers to operate with jumbo frames.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Acked-by: Francois Romieu <romieu@fr.zoreil.com>
This commit is contained in:
Hayes Wang
Francois Romieu
parent
5f886e0890
commit
b3d7b2f2f0
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@ -45,6 +45,7 @@
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#define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
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#define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
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#define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
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#define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
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#ifdef RTL8169_DEBUG
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#define assert(expr) \
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@ -135,6 +136,7 @@ enum mac_version {
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RTL_GIGA_MAC_VER_35,
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RTL_GIGA_MAC_VER_36,
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RTL_GIGA_MAC_VER_37,
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RTL_GIGA_MAC_VER_38,
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RTL_GIGA_MAC_NONE = 0xff,
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};
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@ -250,6 +252,9 @@ static const struct {
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[RTL_GIGA_MAC_VER_37] =
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_R("RTL8402", RTL_TD_1, FIRMWARE_8402_1,
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JUMBO_1K, true),
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[RTL_GIGA_MAC_VER_38] =
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_R("RTL8411", RTL_TD_1, FIRMWARE_8411_1,
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JUMBO_9K, false),
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};
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#undef _R
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@ -784,6 +789,7 @@ MODULE_FIRMWARE(FIRMWARE_8105E_1);
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MODULE_FIRMWARE(FIRMWARE_8168F_1);
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MODULE_FIRMWARE(FIRMWARE_8168F_2);
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MODULE_FIRMWARE(FIRMWARE_8402_1);
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MODULE_FIRMWARE(FIRMWARE_8411_1);
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static void rtl_lock_work(struct rtl8169_private *tp)
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{
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@ -1263,7 +1269,8 @@ static void rtl_link_chg_patch(struct rtl8169_private *tp)
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if (!netif_running(dev))
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return;
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if (tp->mac_version == RTL_GIGA_MAC_VER_34) {
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if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
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tp->mac_version == RTL_GIGA_MAC_VER_38) {
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if (RTL_R8(PHYstatus) & _1000bpsF) {
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rtl_eri_write(ioaddr, 0x1bc, ERIAR_MASK_1111,
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0x00000011, ERIAR_EXGMAC);
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@ -1884,6 +1891,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
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int mac_version;
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} mac_info[] = {
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/* 8168F family. */
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{ 0x7c800000, 0x48800000, RTL_GIGA_MAC_VER_38 },
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{ 0x7cf00000, 0x48100000, RTL_GIGA_MAC_VER_36 },
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{ 0x7cf00000, 0x48000000, RTL_GIGA_MAC_VER_35 },
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@ -3101,6 +3109,104 @@ static void rtl8168f_2_hw_phy_config(struct rtl8169_private *tp)
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rtl8168f_hw_phy_config(tp);
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}
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static void rtl8411_hw_phy_config(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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static const struct phy_reg phy_reg_init[] = {
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/* Channel estimation fine tune */
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{ 0x1f, 0x0003 },
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{ 0x09, 0xa20f },
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{ 0x1f, 0x0000 },
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/* Modify green table for giga & fnet */
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{ 0x1f, 0x0005 },
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{ 0x05, 0x8b55 },
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{ 0x06, 0x0000 },
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{ 0x05, 0x8b5e },
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{ 0x06, 0x0000 },
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{ 0x05, 0x8b67 },
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{ 0x06, 0x0000 },
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{ 0x05, 0x8b70 },
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{ 0x06, 0x0000 },
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{ 0x1f, 0x0000 },
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{ 0x1f, 0x0007 },
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{ 0x1e, 0x0078 },
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{ 0x17, 0x0000 },
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{ 0x19, 0x00aa },
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{ 0x1f, 0x0000 },
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/* Modify green table for 10M */
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{ 0x1f, 0x0005 },
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{ 0x05, 0x8b79 },
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{ 0x06, 0xaa00 },
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{ 0x1f, 0x0000 },
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/* Disable hiimpedance detection (RTCT) */
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{ 0x1f, 0x0003 },
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{ 0x01, 0x328a },
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{ 0x1f, 0x0000 }
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};
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rtl_apply_firmware(tp);
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rtl8168f_hw_phy_config(tp);
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/* Improve 2-pair detection performance */
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rtl_writephy(tp, 0x1f, 0x0005);
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rtl_writephy(tp, 0x05, 0x8b85);
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rtl_w1w0_phy(tp, 0x06, 0x4000, 0x0000);
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rtl_writephy(tp, 0x1f, 0x0000);
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rtl_writephy_batch(tp, phy_reg_init, ARRAY_SIZE(phy_reg_init));
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/* Modify green table for giga */
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rtl_writephy(tp, 0x1f, 0x0005);
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rtl_writephy(tp, 0x05, 0x8b54);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
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rtl_writephy(tp, 0x05, 0x8b5d);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0800);
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rtl_writephy(tp, 0x05, 0x8a7c);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
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rtl_writephy(tp, 0x05, 0x8a7f);
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rtl_w1w0_phy(tp, 0x06, 0x0100, 0x0000);
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rtl_writephy(tp, 0x05, 0x8a82);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
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rtl_writephy(tp, 0x05, 0x8a85);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
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rtl_writephy(tp, 0x05, 0x8a88);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x0100);
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rtl_writephy(tp, 0x1f, 0x0000);
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/* uc same-seed solution */
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rtl_writephy(tp, 0x1f, 0x0005);
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rtl_writephy(tp, 0x05, 0x8b85);
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rtl_w1w0_phy(tp, 0x06, 0x8000, 0x0000);
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rtl_writephy(tp, 0x1f, 0x0000);
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/* eee setting */
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rtl_w1w0_eri(ioaddr, 0x1b0, ERIAR_MASK_0001, 0x00, 0x03, ERIAR_EXGMAC);
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rtl_writephy(tp, 0x1f, 0x0005);
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rtl_writephy(tp, 0x05, 0x8b85);
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rtl_w1w0_phy(tp, 0x06, 0x0000, 0x2000);
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rtl_writephy(tp, 0x1f, 0x0004);
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rtl_writephy(tp, 0x1f, 0x0007);
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rtl_writephy(tp, 0x1e, 0x0020);
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rtl_w1w0_phy(tp, 0x15, 0x0000, 0x0100);
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rtl_writephy(tp, 0x1f, 0x0000);
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rtl_writephy(tp, 0x0d, 0x0007);
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rtl_writephy(tp, 0x0e, 0x003c);
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rtl_writephy(tp, 0x0d, 0x4007);
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rtl_writephy(tp, 0x0e, 0x0000);
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rtl_writephy(tp, 0x0d, 0x0000);
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/* Green feature */
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rtl_writephy(tp, 0x1f, 0x0003);
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rtl_w1w0_phy(tp, 0x19, 0x0000, 0x0001);
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rtl_w1w0_phy(tp, 0x10, 0x0000, 0x0400);
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rtl_writephy(tp, 0x1f, 0x0000);
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}
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static void rtl8102e_hw_phy_config(struct rtl8169_private *tp)
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{
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static const struct phy_reg phy_reg_init[] = {
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@ -3255,6 +3361,10 @@ static void rtl_hw_phy_config(struct net_device *dev)
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rtl8402_hw_phy_config(tp);
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break;
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case RTL_GIGA_MAC_VER_38:
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rtl8411_hw_phy_config(tp);
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break;
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default:
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break;
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}
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@ -3493,6 +3603,7 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp)
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case RTL_GIGA_MAC_VER_33:
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case RTL_GIGA_MAC_VER_34:
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case RTL_GIGA_MAC_VER_37:
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case RTL_GIGA_MAC_VER_38:
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RTL_W32(RxConfig, RTL_R32(RxConfig) |
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AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
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break;
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@ -3739,6 +3850,7 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
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case RTL_GIGA_MAC_VER_34:
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case RTL_GIGA_MAC_VER_35:
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case RTL_GIGA_MAC_VER_36:
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case RTL_GIGA_MAC_VER_38:
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ops->down = r8168_pll_power_down;
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ops->up = r8168_pll_power_up;
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break;
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@ -4025,7 +4137,8 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
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} else if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
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tp->mac_version == RTL_GIGA_MAC_VER_35 ||
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tp->mac_version == RTL_GIGA_MAC_VER_36 ||
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tp->mac_version == RTL_GIGA_MAC_VER_37) {
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tp->mac_version == RTL_GIGA_MAC_VER_37 ||
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tp->mac_version == RTL_GIGA_MAC_VER_38) {
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RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
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while (!(RTL_R32(TxConfig) & TXCFG_EMPTY))
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udelay(100);
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@ -4356,6 +4469,7 @@ static void __devinit rtl_init_csi_ops(struct rtl8169_private *tp)
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break;
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case RTL_GIGA_MAC_VER_37:
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case RTL_GIGA_MAC_VER_38:
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ops->write = r8402_csi_write;
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ops->read = r8402_csi_read;
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break;
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@ -4744,6 +4858,24 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
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RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
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}
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static void rtl_hw_start_8411(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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static const struct ephy_info e_info_8168f_1[] = {
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{ 0x06, 0x00c0, 0x0020 },
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{ 0x0f, 0xffff, 0x5200 },
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{ 0x1e, 0x0000, 0x4000 },
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{ 0x19, 0x0000, 0x0224 }
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};
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rtl_hw_start_8168f(tp);
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rtl_ephy_init(ioaddr, e_info_8168f_1, ARRAY_SIZE(e_info_8168f_1));
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rtl_w1w0_eri(ioaddr, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0x0000,
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ERIAR_EXGMAC);
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}
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static void rtl_hw_start_8168(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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@ -4841,6 +4973,10 @@ static void rtl_hw_start_8168(struct net_device *dev)
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rtl_hw_start_8168f_1(tp);
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break;
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case RTL_GIGA_MAC_VER_38:
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rtl_hw_start_8411(tp);
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break;
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default:
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printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n",
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dev->name, tp->mac_version);
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