arm64: dts: qcom: msm8916: Disable coresight by default
On some msm8916 devices, attempts at initializing coresight cause the boot to
fail. This was fixed by disabling the coresight-related nodes in the board dts
files. However, a cleaner approach was chosen for fixing the same issue on
msm8998: disabling coresight by default, and enabling it in board dts files
where desired.
This patch implements the same solution for msm8916, removes now redundant
overwrites in board specific dts files and and enables coresight in db410c's
board dts in order to keep the current behavior.
Fixes: b1fcc5702a
("arm64: dts: qcom: msm8916: Add CTI options")
Signed-off-by: Michael Srba <michael.srba@seznam.cz>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20200513184735.30104-1-michael.srba@seznam.cz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
parent
9fc18435d2
commit
b3d6fd8f25
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@ -519,6 +519,27 @@
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wcnss@a21b000 {
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status = "okay";
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};
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tpiu@820000 { status = "okay"; };
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funnel@821000 { status = "okay"; };
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replicator@824000 { status = "okay"; };
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etf@825000 { status = "okay"; };
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etr@826000 { status = "okay"; };
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funnel@841000 { status = "okay"; };
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debug@850000 { status = "okay"; };
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debug@852000 { status = "okay"; };
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debug@854000 { status = "okay"; };
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debug@856000 { status = "okay"; };
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etm@85c000 { status = "okay"; };
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etm@85d000 { status = "okay"; };
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etm@85e000 { status = "okay"; };
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etm@85f000 { status = "okay"; };
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cti@810000 { status = "okay"; };
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cti@811000 { status = "okay"; };
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cti@858000 { status = "okay"; };
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cti@859000 { status = "okay"; };
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cti@85a000 { status = "okay"; };
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cti@85b000 { status = "okay"; };
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};
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usb2513 {
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@ -82,29 +82,6 @@
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wcnss@a21b000 {
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status = "okay";
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};
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/*
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* Attempting to enable these devices causes a "synchronous
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* external abort". Suspected cause is that the debug power
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* domain is not enabled by default on this device.
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* Disable these devices for now to avoid the crash.
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*
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* See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
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*/
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tpiu@820000 { status = "disabled"; };
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funnel@821000 { status = "disabled"; };
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replicator@824000 { status = "disabled"; };
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etf@825000 { status = "disabled"; };
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etr@826000 { status = "disabled"; };
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funnel@841000 { status = "disabled"; };
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debug@850000 { status = "disabled"; };
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debug@852000 { status = "disabled"; };
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debug@854000 { status = "disabled"; };
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debug@856000 { status = "disabled"; };
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etm@85c000 { status = "disabled"; };
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etm@85d000 { status = "disabled"; };
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etm@85e000 { status = "disabled"; };
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etm@85f000 { status = "disabled"; };
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};
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// FIXME: Use extcon device provided by charger driver when available
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@ -75,29 +75,6 @@
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wcnss@a21b000 {
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status = "okay";
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};
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/*
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* Attempting to enable these devices causes a "synchronous
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* external abort". Suspected cause is that the debug power
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* domain is not enabled by default on this device.
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* Disable these devices for now to avoid the crash.
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*
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* See: https://lore.kernel.org/linux-arm-msm/20190618202623.GA53651@gerhold.net/
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*/
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tpiu@820000 { status = "disabled"; };
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funnel@821000 { status = "disabled"; };
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replicator@824000 { status = "disabled"; };
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etf@825000 { status = "disabled"; };
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etr@826000 { status = "disabled"; };
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funnel@841000 { status = "disabled"; };
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debug@850000 { status = "disabled"; };
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debug@852000 { status = "disabled"; };
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debug@854000 { status = "disabled"; };
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debug@856000 { status = "disabled"; };
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etm@85c000 { status = "disabled"; };
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etm@85d000 { status = "disabled"; };
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etm@85e000 { status = "disabled"; };
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etm@85f000 { status = "disabled"; };
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};
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gpio-keys {
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@ -1258,6 +1258,8 @@
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clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
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clock-names = "apb_pclk", "atclk";
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status = "disabled";
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in-ports {
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port {
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tpiu_in: endpoint {
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@ -1274,6 +1276,8 @@
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clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
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clock-names = "apb_pclk", "atclk";
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status = "disabled";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
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clock-names = "apb_pclk", "atclk";
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status = "disabled";
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out-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
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clock-names = "apb_pclk", "atclk";
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status = "disabled";
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in-ports {
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port {
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etf_in: endpoint {
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clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
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clock-names = "apb_pclk", "atclk";
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status = "disabled";
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in-ports {
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port {
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etr_in: endpoint {
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@ -1387,6 +1397,8 @@
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clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
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clock-names = "apb_pclk", "atclk";
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status = "disabled";
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in-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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cpu = <&CPU0>;
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status = "disabled";
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};
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debug@852000 {
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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cpu = <&CPU1>;
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status = "disabled";
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};
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debug@854000 {
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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cpu = <&CPU2>;
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status = "disabled";
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};
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debug@856000 {
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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cpu = <&CPU3>;
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status = "disabled";
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};
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etm0: etm@85c000 {
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cpu = <&CPU0>;
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status = "disabled";
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out-ports {
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port {
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etm0_out: endpoint {
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cpu = <&CPU1>;
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status = "disabled";
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out-ports {
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port {
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etm1_out: endpoint {
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cpu = <&CPU2>;
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status = "disabled";
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out-ports {
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port {
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etm2_out: endpoint {
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cpu = <&CPU3>;
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status = "disabled";
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out-ports {
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port {
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etm3_out: endpoint {
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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/* CTI 1 - TPIU connections */
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clocks = <&rpmcc RPM_QDSS_CLK>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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/* CTIs 2-11 - no information - not instantiated */
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cpu = <&CPU0>;
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arm,cs-dev-assoc = <&etm0>;
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status = "disabled";
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};
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/* CTI - CPU-1 */
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cpu = <&CPU1>;
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arm,cs-dev-assoc = <&etm1>;
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status = "disabled";
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};
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/* CTI - CPU-2 */
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cpu = <&CPU2>;
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arm,cs-dev-assoc = <&etm2>;
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status = "disabled";
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};
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/* CTI - CPU-3 */
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cpu = <&CPU3>;
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arm,cs-dev-assoc = <&etm3>;
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status = "disabled";
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};
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